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* arm: PR gas/25472 Enable DSP instructions with +mveAndre Vieira2020-01-311-6/+8
* Fix compile time build problem building the s390 assembler.Nick Clifton2020-01-311-1/+1
* [ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructions in MVE.Srinath Parvathaneni2020-01-311-4/+6
* x86: Add {vex} pseudo prefixH.J. Lu2020-01-171-3/+3
* [binutils][arm] PR25376 Change MVE into a CORE_HIGH featureAndre Vieira2020-01-161-7/+6
* x86: drop found_cpu_match local variableJan Beulich2020-01-161-8/+2
* MSP430: Fix relocation overflow when using #lo(EXP) macroJozef Lawrynowicz2020-01-151-11/+24
* Fix various assembler testsuite failures for the Z80 target.Sergey Belyashov2020-01-142-14/+55
* [gas][aarch64] Turn on SVE when using f32mm or f64mm extensionsMatthew Malcomson2020-01-131-2/+2
* [ARC][committed] Code cleanup and improvements.Claudiu Zissulescu2020-01-132-3/+16
* tic4x: sign extension using shiftsAlan Modra2020-01-131-1/+1
* Fix compile time warnings about comparisons always being false.Sergey Belyashov2020-01-091-89/+92
* x86: refine when to trigger optimizationsJan Beulich2020-01-091-10/+9
* x86-64: assert sane internal state for REX conversionsJan Beulich2020-01-091-1/+3
* x86: consistently convert to byte registers for TEST w/ imm optimizationJan Beulich2020-01-091-11/+10
* Make the assembler generate an error if there is an attempt to define a secti...Nick Clifton2020-01-081-0/+12
* ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'Alan Modra2020-01-081-2/+2
* [ARC] Improve parsing instruction operands.Claudiu Zissulescu2020-01-071-91/+110
* Allow individual targets to decide if string escapes should be allowed. Disa...Sergey Belyashov2020-01-032-1/+2
* Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A...Sergey Belyashov2020-01-022-455/+2046
* [ARM][gas] fix build breakage with gcc-10 by using correct enum typeSzabolcs Nagy2020-01-021-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2020-01-01237-237/+237
* x86: adjust ignored prefix warning for branchesJan Beulich2019-12-271-6/+6
* x86-64: correct / adjust prefix emissionJan Beulich2019-12-271-12/+11
* x86-64: fix Intel64 handling of branch with data16 prefixJan Beulich2019-12-271-5/+39
* x86: consolidate Disp<NN> handling a littleJan Beulich2019-12-272-46/+51
* i386: Also check R12-R15 registers when optimizing testq to testbH.J. Lu2019-12-121-3/+2
* i386: Add -mbranches-within-32B-boundariesH.J. Lu2019-12-121-0/+13
* i386: Align branches within a fixed boundaryH.J. Lu2019-12-122-3/+1074
* gas signed overflow fixesAlan Modra2019-12-1210-52/+51
* obj-evax.c tidyAlan Modra2019-12-121-29/+22
* [gas][arm] Add -mwarn-restrict-itAndre Vieira2019-12-111-0/+7
* x86: further refine SSE check (SSE4a, SHA, GFNI)Jan Beulich2019-12-111-0/+3
* [gas][arm] Set context table for '.arch_extension'Andre Vieira2019-12-101-0/+1
* x86/Intel: fold "xmmword" with "oword"Jan Beulich2019-12-091-11/+9
* x86/Intel: support "mmword ptr"Jan Beulich2019-12-091-2/+5
* x86/Intel: fix "near ptr" / "far ptr" handlingJan Beulich2019-12-091-3/+6
* x86/Intel: drop pointless suffix setting for "tbyte ptr"Jan Beulich2019-12-091-10/+5
* x86/Intel: drop pointless suffix setting for "fword ptr"Jan Beulich2019-12-091-2/+0
* x86/Intel: drop pointless special casing of LxSJan Beulich2019-12-091-6/+1
* Arm64: simplify Crypto arch extension handlingJan Beulich2019-12-051-3/+1
* Arm64: correct "sha3" arch-extension directive handlingJan Beulich2019-12-051-3/+2
* x86-64: accept 64-bit LFS/LGS/LSS forms with suffix or operand size specifierJan Beulich2019-12-041-0/+9
* x86-64/Intel: fix CALL/JMP with dword operandJan Beulich2019-12-041-2/+3
* x86: consolidate tracking of MMX register useJan Beulich2019-12-041-9/+3
* x86: make sure all PUSH/POP honor DefaultSizeJan Beulich2019-12-041-8/+14
* x86: drop some stray/bogus DefaultSizeJan Beulich2019-12-041-1/+3
* gas/riscv: Produce version 3 DWARF CIE by defaultAndrew Burgess2019-11-281-0/+6
* binutils/gas/riscv: Add DWARF register numbers for CSRsAndrew Burgess2019-11-281-0/+4
* gas/riscv: Remove unneeded structureAndrew Burgess2019-11-281-7/+1
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