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* sim: bfin: initial bf60x supportusers/vapier/sim/bfinMike Frysinger2022-11-113-8/+169
* se_all32bitopcodes: mark certain block of insns as invalid under simMike Frysinger2022-11-111-0/+5
* ignore more stuffMike Frysinger2022-11-111-0/+6
* sim: bfin: add new GPIO model (bf60x)Mike Frysinger2022-11-112-0/+381
* sim: bfin: add new DDE (distributed DMA engine) model (bf60x)Mike Frysinger2022-11-115-0/+772
* sim: bfin: add new SMC (static memory) model (bf60x)Mike Frysinger2022-11-114-0/+287
* sim: bfin: add new EFS (Electronic Fuse Serial) model (bf60x)Mike Frysinger2022-11-114-0/+226
* sim: bfin: add new SPU (system protection unit) model (bf60x)Mike Frysinger2022-11-114-0/+183
* sim: bfin: add new SEC (system event controller) model (bf60x)Mike Frysinger2022-11-114-0/+248
* sim: bfin: add new CGU (clock generation) model (bf60x)Mike Frysinger2022-11-114-0/+188
* sim: bfin: add new UART model (bf60x)Mike Frysinger2022-11-118-14/+380
* sim: bfin: handle invalid dsp32 mac/mult insnsMike Frysinger2022-11-111-7/+52
* b/sim/testsuite/sim/bfin/se_undefinedinstruction3.S is broke? need to test on...Mike Frysinger2022-11-111-0/+1
* sim: skip sysroot for most syscallsMike Frysinger2022-11-111-9/+31
* Revert "sim: bfin: add proper regs to dmac"Mike Frysinger2022-11-113-47/+0
* sim: bfin: add proper regs to dmacMike Frysinger2022-11-113-0/+47
* sim: bfin: make the core timer output port an edgeMike Frysinger2022-11-111-0/+2
* sim: bfin: keep output port levels from SIC level and up-to-dateMike Frysinger2022-11-111-24/+25
* sim: bfin: separate port levels from isa levels in the CECMike Frysinger2022-11-111-3/+25
* gdb: bfin: add some Blackfin-specific testsJie Zhang2022-11-112-1/+20
* sim: tweak signed to unsigned local varsMike Frysinger2022-11-116-21/+22
* sim: bfin: add bootromsMike Frysinger2022-11-1128-0/+82432
* gdb: ignore test generated filesMike Frysinger2022-11-111-0/+227
* gitignore: ignore site.{bak,exp} treewideMike Frysinger2022-11-111-0/+5
* sim: v850: rename v850.dc to align with other portsMike Frysinger2022-11-113-2/+2
* sim: igen: fix hang when decoding boolean rule constantsMike Frysinger2022-11-111-0/+2
* sim: igen: mark error func as noreturn since it exitsMike Frysinger2022-11-111-1/+1
* sim: igen: mark output funcs with printf attributeMike Frysinger2022-11-112-7/+4
* sim: igen: constify various func argumentsMike Frysinger2022-11-1131-265/+380
* sim: ppc: rename ppc-instructions to powerpc.igenMike Frysinger2022-11-114-6/+6
* i386: Check invalid (%dx) usageH.J. Lu2022-11-105-0/+44
* gdb: make "start" breakpoint inferior-specificSimon Marchi2022-11-104-1/+133
* gdb: Fix regressions caused by 041de3d73aa121f2ff0c077213598963bfb34b79Bruno Larsen2022-11-101-2/+2
* gdb/debuginfod: Improve progress updatesAaron Merey2022-11-106-162/+296
* gdb: add special handling for frame level 0 in frame_info_ptrSimon Marchi2022-11-102-6/+40
* gdb: add missing prepare_reinflate call in print_frame_infoSimon Marchi2022-11-101-0/+2
* gdb: use frame_id_p instead of comparing to null_frame_id in frame_info_ptr::...Simon Marchi2022-11-101-1/+1
* gdb: remove manual frame_info reinflation code in backtrace_command_1Simon Marchi2022-11-101-14/+1
* gdb: move frame_info_ptr method implementations to frame-info.cSimon Marchi2022-11-105-21/+55
* gdb: add prepare_reinflate/reinflate around print_frame_args in info_frame_co...Simon Marchi2022-11-102-0/+12
* gdb: clear other.m_cached_id in frame_info_ptr's move ctorSimon Marchi2022-11-101-0/+1
* gdb/c++: Improve error messages in overload resolutionBruno Larsen2022-11-103-4/+277
* gdb/testsuite: allowed for function_range to deal with mangled functionsBruno Larsen2022-11-101-1/+1
* ld/testsuite: skip ld-size when -shared is not supportedClément Chigot2022-11-101-0/+6
* mach-o reloc size overflowAlan Modra2022-11-101-1/+4
* Sanity check reloc count in get_reloc_upper_boundAlan Modra2022-11-105-34/+69
* gdb/testsuite: Fix rtld-step-nodebugsym.expLancelot SIX2022-11-101-1/+3
* sim: ppc: drop old makefile fragmentMike Frysinger2022-11-101-3/+0
* sim: ppc: drop support for dgen -L optionMike Frysinger2022-11-101-5/+1
* sim: ppc: collapse is_readonly & length switch tables heavilyMike Frysinger2022-11-101-7/+15
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