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-rw-r--r--sim/testsuite/sim/m32r/stb.cgs21
1 files changed, 21 insertions, 0 deletions
diff --git a/sim/testsuite/sim/m32r/stb.cgs b/sim/testsuite/sim/m32r/stb.cgs
new file mode 100644
index 00000000000..01283169023
--- /dev/null
+++ b/sim/testsuite/sim/m32r/stb.cgs
@@ -0,0 +1,21 @@
+# m32r testcase for stb $src1,@$src2
+# mach(): m32r m32rx
+
+ .include "testutils.inc"
+
+ start
+
+ .global stb
+stb:
+ mvaddr_h_gr r4, data_loc
+ mvi_h_gr r5, 0x1234
+
+ stb r5, @r4
+
+ ld r4, @r4
+ test_h_gr r4, 0x34000000 ; big endian processor
+
+ pass
+
+data_loc:
+ .word 0