summaryrefslogtreecommitdiff
path: root/sim/testsuite/sim/m32r/beq.cgs
diff options
context:
space:
mode:
Diffstat (limited to 'sim/testsuite/sim/m32r/beq.cgs')
-rw-r--r--sim/testsuite/sim/m32r/beq.cgs20
1 files changed, 20 insertions, 0 deletions
diff --git a/sim/testsuite/sim/m32r/beq.cgs b/sim/testsuite/sim/m32r/beq.cgs
new file mode 100644
index 00000000000..c4d6d8bf0aa
--- /dev/null
+++ b/sim/testsuite/sim/m32r/beq.cgs
@@ -0,0 +1,20 @@
+# m32r testcase for beq $src1,$src2,$disp16
+# mach(): m32r m32rx
+
+ .include "testutils.inc"
+
+ start
+
+ .global beq
+beq:
+ mvi_h_condbit 0
+ mvi_h_gr r4, 12
+ mvi_h_gr r5, 12
+ beq r4, r5, ok
+not_ok:
+ fail
+ok:
+ mvi_h_gr r5, 11
+ beq r4, r5, not_ok
+
+ pass