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-rw-r--r--sim/testsuite/sim/m32r/addv3.cgs28
1 files changed, 28 insertions, 0 deletions
diff --git a/sim/testsuite/sim/m32r/addv3.cgs b/sim/testsuite/sim/m32r/addv3.cgs
new file mode 100644
index 00000000000..a8c0a108561
--- /dev/null
+++ b/sim/testsuite/sim/m32r/addv3.cgs
@@ -0,0 +1,28 @@
+# m32r testcase for addv3 $dr,$sr,#$simm16
+# mach(): m32r m32rx
+
+ .include "testutils.inc"
+
+ start
+
+ .global addv3
+addv3:
+ mvi_h_condbit 0
+ mvi_h_gr r4, 1
+ mvi_h_gr r5, 1
+
+ addv3 r4, r5, #2
+
+ bc not_ok
+
+ test_h_gr r4, 3
+
+ mvi_h_gr r5, 0x7fff8001
+
+ addv3 r4, r5, #0x7fff
+
+ bnc not_ok
+
+ pass
+not_ok:
+ fail