summaryrefslogtreecommitdiff
path: root/sim/testsuite/sim/fr30/and.cgs
diff options
context:
space:
mode:
Diffstat (limited to 'sim/testsuite/sim/fr30/and.cgs')
-rw-r--r--sim/testsuite/sim/fr30/and.cgs51
1 files changed, 51 insertions, 0 deletions
diff --git a/sim/testsuite/sim/fr30/and.cgs b/sim/testsuite/sim/fr30/and.cgs
new file mode 100644
index 00000000000..49db6fd2ee1
--- /dev/null
+++ b/sim/testsuite/sim/fr30/and.cgs
@@ -0,0 +1,51 @@
+# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri
+# mach(): fr30
+
+ .include "testutils.inc"
+
+ START
+
+ .text
+ .global and
+and:
+ ; Test and $Rj,$Ri
+ mvi_h_gr 0xaaaaaaaa,r7
+ mvi_h_gr 0x55555555,r8
+ set_cc 0x0b ; Set mask opposite of expected
+ and r7,r8
+ test_cc 0 1 1 1
+ test_h_gr 0,r8
+
+ mvi_h_gr 0xffff0000,r8
+ set_cc 0x04 ; Set mask opposite of expected
+ and r7,r8
+ test_cc 1 0 0 0
+ test_h_gr 0xaaaa0000,r8
+
+ mvi_h_gr 0xffff,r8
+ set_cc 0x0d ; Set mask opposite of expected
+ and r7,r8
+ test_cc 0 0 0 1
+ test_h_gr 0xaaaa,r8
+
+ ; Test and $Rj,@$Ri
+ mvi_h_gr 0xaaaaaaaa,r7
+ mvi_h_mem 0x55555555,sp
+ set_cc 0x0b ; Set mask opposite of expected
+ and r7,@sp
+ test_cc 0 1 1 1
+ test_h_mem 0,sp
+
+ mvi_h_mem 0xffff0000,sp
+ set_cc 0x04 ; Set mask opposite of expected
+ and r7,@sp
+ test_cc 1 0 0 0
+ test_h_mem 0xaaaa0000,sp
+
+ mvi_h_mem 0xffff,sp
+ set_cc 0x0d ; Set mask opposite of expected
+ and r7,@sp
+ test_cc 0 0 0 1
+ test_h_mem 0xaaaa,sp
+
+ pass