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-rw-r--r--sim/testsuite/sim/fr30/addn2.cgs43
1 files changed, 43 insertions, 0 deletions
diff --git a/sim/testsuite/sim/fr30/addn2.cgs b/sim/testsuite/sim/fr30/addn2.cgs
new file mode 100644
index 00000000000..9525baf4502
--- /dev/null
+++ b/sim/testsuite/sim/fr30/addn2.cgs
@@ -0,0 +1,43 @@
+# fr30 testcase for addn2 $m4,$Ri
+# mach(): fr30
+
+ .include "testutils.inc"
+
+ START
+
+ .text
+ .global add
+add:
+ mvi_h_gr 30,r8
+ set_cc 0x0e ; Set mask opposite of normal result
+ addn2 -16,r8 ; Max value of immediate field
+ test_cc 1 1 1 0
+ test_h_gr 14,r8
+
+ set_cc 0x0e ; Set mask opposite of normal result
+ addn2 -3,r8 ; Mid value of immediate field
+ test_cc 1 1 1 0
+ test_h_gr 11,r8
+
+ set_cc 0x0e ; Set mask opposite of normal result
+ addn2 -1,r8 ; Min value of immediate field
+ test_cc 1 1 1 0
+ test_h_gr 10,r8
+
+ set_cc 0x0a ; Set mask opposite of normal result
+ addn2 -10,r8 ; Test zero and carry bits
+ test_cc 1 0 1 0
+ test_h_gr 0,r8
+
+ set_cc 0x07 ; Set mask opposite of normal result
+ addn2 -16,r8 ; Test negative bit
+ test_cc 0 1 1 1
+ test_h_gr -16,r8
+
+ mvi_h_gr 0x80000000,r8
+ set_cc 0x0c ; Set mask opposite of normal result
+ addn2 -1,r8 ; Test overflow bit
+ test_cc 1 1 0 0
+ test_h_gr 0x7fffffff,r8
+
+ pass