diff options
Diffstat (limited to 'sim/testsuite/bfin/se_excpt_ssstep.S')
| -rw-r--r-- | sim/testsuite/bfin/se_excpt_ssstep.S | 290 |
1 files changed, 290 insertions, 0 deletions
diff --git a/sim/testsuite/bfin/se_excpt_ssstep.S b/sim/testsuite/bfin/se_excpt_ssstep.S new file mode 100644 index 00000000000..5cb5558f30a --- /dev/null +++ b/sim/testsuite/bfin/se_excpt_ssstep.S @@ -0,0 +1,290 @@ +//Original:/proj/frio/dv/testcases/seq/se_excpt_ssstep/se_excpt_ssstep.dsp +// Description: EXCPT instruction vs Single Step Exception Priority +# mach: bfin +# sim: --environment operating + +#include "test.h" +.include "testutils.inc" +start + +// +// Constants and Defines +// + +include(gen_int.inc) +include(selfcheck.inc) +include(std.inc) +//include(mmrs.inc) +include(symtable.inc) + +#ifndef STACKSIZE +#define STACKSIZE 0x10 +#endif +#ifndef EVT +#define EVT 0xFFE02000 +#endif +#ifndef EVT15 +#define EVT15 0xFFE0203C +#endif +#ifndef EVT_OVERRIDE +#define EVT_OVERRIDE 0xFFE02100 +#endif +#ifndef ITABLE +#define ITABLE 0xF0000000 +#endif + +GEN_INT_INIT(ITABLE) // set location for interrupt table + +// +// Reset/Bootstrap Code +// (Here we should set the processor operating modes, initialize registers, +// etc.) +// + +BOOT: +INIT_R_REGS(0); // initialize general purpose regs + +INIT_P_REGS(0); // initialize the pointers + +INIT_I_REGS(0); // initialize the dsp address regs +INIT_M_REGS(0); +INIT_L_REGS(0); +INIT_B_REGS(0); + +LD32_LABEL(sp, KSTACK); // setup the stack pointer +FP = SP; // and frame pointer + +LD32(p0, EVT); // Setup Event Vectors and Handlers + +LD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0) + [ P0 ++ ] = R0; + +LD32_LABEL(r0, RHANDLE); // Reset Handler (Int1) + [ P0 ++ ] = R0; + +LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2) + [ P0 ++ ] = R0; + +LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3) + [ P0 ++ ] = R0; + + [ P0 ++ ] = R0; // IVT4 not used + +LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5) + [ P0 ++ ] = R0; + +LD32_LABEL(r0, THANDLE); // Timer Handler (Int6) + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I7HANDLE); // IVG7 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I8HANDLE); // IVG8 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I9HANDLE); // IVG9 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I10HANDLE);// IVG10 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I11HANDLE);// IVG11 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I12HANDLE);// IVG12 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I13HANDLE);// IVG13 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I14HANDLE);// IVG14 Handler + [ P0 ++ ] = R0; + +LD32_LABEL(r0, I15HANDLE);// IVG15 Handler + [ P0 ++ ] = R0; + +LD32(p0, EVT_OVERRIDE); + R0 = 0; + [ P0 ++ ] = R0; + R0 = -1; // Change this to mask interrupts (*) + [ P0 ] = R0; // IMASK + +DUMMY: + + R0 = 0 (Z); + +LT0 = r0; // set loop counters to something deterministic +LB0 = r0; +LC0 = r0; +LT1 = r0; +LB1 = r0; +LC1 = r0; + +ASTAT = r0; // reset other internal regs + +// The following code sets up the test for running in USER mode + +LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a + // ReturnFromInterrupt (RTI) +RETI = r0; // We need to load the return address + + R0 = 1; + +SYSCFG = r0; // Enable Supervisor Single Step + +CHECK_INIT_DEF(p2); //CHECK_INIT(p2, 0x2000); + + +// Comment the following line for a USER Mode test + +// JUMP STARTSUP; // jump to code start for SUPERVISOR mode + +RTI; + +STARTSUP: +LD32_LABEL(p1, BEGIN); + +LD32(p0, EVT15); + [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start + +RAISE 15; // after we RTI, INT 15 should be taken + +NOP; // Workaround for Bug 217 +RTI; + +// +// The Main Program +// + +STARTUSER: +LD32_LABEL(sp, USTACK); // setup the stack pointer +FP = SP; // set frame pointer +JUMP BEGIN; + +//********************************************************************* + +BEGIN: + + // COMMENT the following line for USER MODE tests +// [--sp] = RETI; // enable interrupts in supervisor mode + + // **** YOUR CODE GOES HERE **** + R0 = 0; + R0 = 0; + R0 = 0; + R0 = 0; + R0 = 0; +EXCPT 15; // single step shouldn't happen for this. + R0 = 0; + R0 = 0; + R0 = 0; + R0 = 0; + R0 = 0; + +EXCPT 3; // turn off single step via handler + +CHECKREG(r4, 1); // one EXCPT 15 instruction +CHECKREG(r5, 14); // 14 instructions are executed before we disable single step + + + // PUT YOUR TEST HERE! + + +END: +dbg_pass; // End the test + +//********************************************************************* + +// +// Handlers for Events +// + +EHANDLE: // Emulation Handler 0 +RTE; + +RHANDLE: // Reset Handler 1 +RTI; + +NHANDLE: // NMI Handler 2 +RTN; + +XHANDLE: // Exception Handler 3 + [ -- SP ] = ASTAT; // save what we damage + [ -- SP ] = ( R7:6 ); + R7 = SEQSTAT; + R7 <<= 26; + R7 >>= 26; // only want EXCAUSE + R6 = 0x10; // EXCAUSE 0x10 means Single Step +CC = r7 == r6; +IF CC JUMP SINGLESTEP (BP); // Go to Single Step Handler + + R6 = 15; // EXCAUSE 15 means EXCPT 15 instruction +CC = r7 == r6; +IF CC JUMP EXCPT15 (BP); + +SYSCFG = r0; // otherwise must be an EXCPT, so turn off singlestep + +JUMP.S OUT; + +EXCPT15: + R4 += 1; // R4 counts EXCPT 15s +JUMP.S OUT; + +SINGLESTEP: + R5 += 1; // R5 counts single step events + +OUT: + ( R7:6 ) = [ SP ++ ]; +ASTAT = [sp++]; +RTX; + +HWHANDLE: // HW Error Handler 5 +RTI; + +THANDLE: // Timer Handler 6 +RTI; + +I7HANDLE: // IVG 7 Handler +RTI; + +I8HANDLE: // IVG 8 Handler +RTI; + +I9HANDLE: // IVG 9 Handler +RTI; + +I10HANDLE: // IVG 10 Handler +RTI; + +I11HANDLE: // IVG 11 Handler +RTI; + +I12HANDLE: // IVG 12 Handler +RTI; + +I13HANDLE: // IVG 13 Handler +RTI; + +I14HANDLE: // IVG 14 Handler +RTI; + +I15HANDLE: // IVG 15 Handler +RTI; + +NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug + +// +// Data Segment +// + +.data +DATA: + .space (0x10); + +// Stack Segments (Both Kernel and User) + + .space (STACKSIZE); +KSTACK: + + .space (STACKSIZE); +USTACK: |