diff options
Diffstat (limited to 'sim/testsuite/bfin/c_dsp32alu_rl_rnd20_p.s')
| -rw-r--r-- | sim/testsuite/bfin/c_dsp32alu_rl_rnd20_p.s | 258 |
1 files changed, 258 insertions, 0 deletions
diff --git a/sim/testsuite/bfin/c_dsp32alu_rl_rnd20_p.s b/sim/testsuite/bfin/c_dsp32alu_rl_rnd20_p.s new file mode 100644 index 00000000000..ced4fccc693 --- /dev/null +++ b/sim/testsuite/bfin/c_dsp32alu_rl_rnd20_p.s @@ -0,0 +1,258 @@ +//Original:/testcases/core/c_dsp32alu_rl_rnd20_p/c_dsp32alu_rl_rnd20_p.dsp +// Spec Reference: dsp32alu dreg (half) +# mach: bfin + +.include "testutils.inc" + start + +imm32 r0, 0x75678911; +imm32 r1, 0xa789ab1d; +imm32 r2, 0x34745515; +imm32 r3, 0x4b677717; +imm32 r4, 0x5678791b; +imm32 r5, 0xc789a71d; +imm32 r6, 0x74445515; +imm32 r7, 0x86667777; +R0.L = R0 + R0 (RND20); +R1.L = R0 + R1 (RND20); +R2.L = R0 + R2 (RND20); +R3.L = R0 + R3 (RND20); +R4.L = R0 + R4 (RND20); +R5.L = R0 + R5 (RND20); +R6.L = R0 + R6 (RND20); +R7.L = R0 + R7 (RND20); +CHECKREG r0, 0x75670EAD; +CHECKREG r1, 0xA78901CF; +CHECKREG r2, 0x34740A9E; +CHECKREG r3, 0x4B670C0D; +CHECKREG r4, 0x56780CBE; +CHECKREG r5, 0xC78903CF; +CHECKREG r6, 0x74440E9B; +CHECKREG r7, 0x8666FFBD; + +imm32 r0, 0xe5678911; +imm32 r1, 0x2789ab1d; +imm32 r2, 0x3e445515; +imm32 r3, 0x46667717; +imm32 r4, 0x56e8891b; +imm32 r5, 0x678eab1d; +imm32 r6, 0x74445515; +imm32 r7, 0x86e67e77; +R0.L = R1 + R0 (RND20); +R1.L = R1 + R1 (RND20); +R2.L = R1 + R2 (RND20); +R3.L = R1 + R3 (RND20); +R4.L = R1 + R4 (RND20); +R5.L = R1 + R5 (RND20); +R6.L = R1 + R6 (RND20); +R7.L = R1 + R7 (RND20); +CHECKREG r0, 0xE56700CF; +CHECKREG r1, 0x278904F1; +CHECKREG r2, 0x3E44065D; +CHECKREG r3, 0x466606DF; +CHECKREG r4, 0x56E807E7; +CHECKREG r5, 0x678E08F1; +CHECKREG r6, 0x744409BD; +CHECKREG r7, 0x86E6FAE7; + +imm32 r0, 0xdd678911; +imm32 r1, 0x2789ab1d; +imm32 r2, 0x3d445515; +imm32 r3, 0x46667717; +imm32 r4, 0x56d8891b; +imm32 r5, 0x678dab1d; +imm32 r6, 0x7444d515; +imm32 r7, 0x86667d77; +R0.L = R2 + R0 (RND20); +R1.L = R2 + R1 (RND20); +R2.L = R2 + R2 (RND20); +R3.L = R2 + R3 (RND20); +R4.L = R2 + R4 (RND20); +R5.L = R2 + R5 (RND20); +R6.L = R2 + R6 (RND20); +R7.L = R2 + R7 (RND20); +CHECKREG r0, 0xDD6701AB; +CHECKREG r1, 0x2789064D; +CHECKREG r2, 0x3D4407A9; +CHECKREG r3, 0x4666083B; +CHECKREG r4, 0x56D80942; +CHECKREG r5, 0x678D0A4D; +CHECKREG r6, 0x74440B19; +CHECKREG r7, 0x8666FC3B; + +imm32 r0, 0xa5678911; +imm32 r1, 0x2a89ab1d; +imm32 r2, 0x34445515; +imm32 r3, 0x46a67717; +imm32 r4, 0x567a891b; +imm32 r5, 0x6789ab1d; +imm32 r6, 0x7444c515; +imm32 r7, 0x86667c77; +R0.L = R3 + R0 (RND20); +R1.L = R3 + R1 (RND20); +R2.L = R3 + R2 (RND20); +R3.L = R3 + R3 (RND20); +R4.L = R3 + R4 (RND20); +R5.L = R3 + R5 (RND20); +R6.L = R3 + R6 (RND20); +R7.L = R3 + R7 (RND20); +CHECKREG r0, 0xA567FEC1; +CHECKREG r1, 0x2A890713; +CHECKREG r2, 0x344407AF; +CHECKREG r3, 0x46A608D5; +CHECKREG r4, 0x567A09D2; +CHECKREG r5, 0x67890AE3; +CHECKREG r6, 0x74440BAF; +CHECKREG r7, 0x8666FCD1; + +imm32 r0, 0x15678911; +imm32 r1, 0x2789ab1d; +imm32 r2, 0x34445515; +imm32 r3, 0x46667717; +imm32 r4, 0x5678891b; +imm32 r5, 0x6789ab1d; +imm32 r6, 0x74445515; +imm32 r7, 0x86667777; +R0.L = R4 + R0 (RND20); +R1.L = R4 + R1 (RND20); +R2.L = R4 + R2 (RND20); +R3.L = R4 + R3 (RND20); +R4.L = R4 + R4 (RND20); +R5.L = R4 + R5 (RND20); +R6.L = R4 + R6 (RND20); +R7.L = R4 + R7 (RND20); +CHECKREG r0, 0x156706BE; +CHECKREG r1, 0x278907E0; +CHECKREG r2, 0x344408AC; +CHECKREG r3, 0x466609CE; +CHECKREG r4, 0x56780ACF; +CHECKREG r5, 0x67890BE0; +CHECKREG r6, 0x74440CAC; +CHECKREG r7, 0x8666FDCE; + +imm32 r0, 0x95678911; +imm32 r1, 0x8789ab1d; +imm32 r2, 0x74445515; +imm32 r3, 0x4a667717; +imm32 r4, 0x56b8891b; +imm32 r5, 0x678dab1d; +imm32 r6, 0x7444e515; +imm32 r7, 0x86667d77; +R0.L = R5 + R0 (RND20); +R1.L = R5 + R1 (RND20); +R2.L = R5 + R2 (RND20); +R3.L = R5 + R3 (RND20); +R4.L = R5 + R4 (RND20); +R5.L = R5 + R5 (RND20); +R6.L = R5 + R6 (RND20); +R7.L = R5 + R7 (RND20); +CHECKREG r0, 0x9567FFCF; +CHECKREG r1, 0x8789FEF1; +CHECKREG r2, 0x74440DBD; +CHECKREG r3, 0x4A660B1F; +CHECKREG r4, 0x56B80BE4; +CHECKREG r5, 0x678D0CF2; +CHECKREG r6, 0x74440DBD; +CHECKREG r7, 0x8666FEDF; + +imm32 r0, 0x35678911; +imm32 r1, 0x2459ab1d; +imm32 r2, 0x34465515; +imm32 r3, 0xe6667717; +imm32 r4, 0x5d78891b; +imm32 r5, 0x67b9ab1d; +imm32 r6, 0x744a5515; +imm32 r7, 0x8666c777; +R0.L = R6 + R0 (RND20); +R1.L = R6 + R1 (RND20); +R2.L = R6 + R2 (RND20); +R3.L = R6 + R3 (RND20); +R4.L = R6 + R4 (RND20); +R5.L = R6 + R5 (RND20); +R6.L = R6 + R6 (RND20); +R7.L = R6 + R7 (RND20); +CHECKREG r0, 0x35670A9B; +CHECKREG r1, 0x2459098A; +CHECKREG r2, 0x34460A89; +CHECKREG r3, 0xE66605AB; +CHECKREG r4, 0x5D780D1C; +CHECKREG r5, 0x67B90DC0; +CHECKREG r6, 0x744A0E89; +CHECKREG r7, 0x8666FFAB; + +imm32 r0, 0xa5678911; +imm32 r1, 0x2789ab1d; +imm32 r2, 0x3a445515; +imm32 r3, 0x4c667717; +imm32 r4, 0x56b8891b; +imm32 r5, 0x678dab1d; +imm32 r6, 0x74445515; +imm32 r7, 0x8666d777; +R0.L = R7 + R0 (RND20); +R1.L = R7 + R1 (RND20); +R2.L = R7 + R2 (RND20); +R3.L = R7 + R3 (RND20); +R4.L = R7 + R4 (RND20); +R5.L = R7 + R5 (RND20); +R6.L = R7 + R6 (RND20); +R7.L = R7 + R7 (RND20); +CHECKREG r0, 0xA567F2BD; +CHECKREG r1, 0x2789FADF; +CHECKREG r2, 0x3A44FC0B; +CHECKREG r3, 0x4C66FD2D; +CHECKREG r4, 0x56B8FDD2; +CHECKREG r5, 0x678DFEDF; +CHECKREG r6, 0x7444FFAB; +CHECKREG r7, 0x8666F0CD; + +imm32 r0, 0xabd78911; +imm32 r1, 0x2789ab1d; +imm32 r2, 0xd4445515; +imm32 r3, 0x4e667717; +imm32 r4, 0x56f8891b; +imm32 r5, 0x678aab1d; +imm32 r6, 0x7444b515; +imm32 r7, 0x86667d77; +R6.L = R2 + R3 (RND20); +R1.L = R4 + R5 (RND20); +R5.L = R7 + R2 (RND20); +R3.L = R0 + R0 (RND20); +R0.L = R3 + R4 (RND20); +R2.L = R5 + R7 (RND20); +R7.L = R6 + R7 (RND20); +R4.L = R1 + R6 (RND20); +CHECKREG r0, 0xABD70A56; +CHECKREG r1, 0x27890BE8; +CHECKREG r2, 0xD444FEDF; +CHECKREG r3, 0x4E66F57B; +CHECKREG r4, 0x56F809BD; +CHECKREG r5, 0x678AF5AB; +CHECKREG r6, 0x7444022B; +CHECKREG r7, 0x8666FFAB; + +imm32 r0, 0x15678911; +imm32 r1, 0x2789ab1d; +imm32 r2, 0x34445515; +imm32 r3, 0x46667717; +imm32 r4, 0x5678891b; +imm32 r5, 0x6789ab1d; +imm32 r6, 0x74445515; +imm32 r7, 0x86667777; +R3.L = R4 + R0 (RND20); +R1.L = R6 + R3 (RND20); +R4.L = R3 + R2 (RND20); +R6.L = R7 + R1 (RND20); +R2.L = R5 + R4 (RND20); +R7.L = R2 + R7 (RND20); +R0.L = R1 + R6 (RND20); +R5.L = R0 + R5 (RND20); +CHECKREG r0, 0x156709BD; +CHECKREG r1, 0x27890BAB; +CHECKREG r2, 0x34440BE0; +CHECKREG r3, 0x466606BE; +CHECKREG r4, 0x567807AB; +CHECKREG r5, 0x678907CF; +CHECKREG r6, 0x7444FADF; +CHECKREG r7, 0x8666FBAB; + +pass |