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Diffstat (limited to 'sim/mips/configure.in')
| -rw-r--r-- | sim/mips/configure.in | 170 |
1 files changed, 170 insertions, 0 deletions
diff --git a/sim/mips/configure.in b/sim/mips/configure.in new file mode 100644 index 00000000000..89959fe59af --- /dev/null +++ b/sim/mips/configure.in @@ -0,0 +1,170 @@ +dnl Process this file with autoconf to produce a configure script. +sinclude(../common/aclocal.m4) +AC_PREREQ(2.5)dnl +AC_INIT(Makefile.in) + +SIM_AC_COMMON + +dnl Options available in this module +SIM_AC_OPTION_INLINE() +SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT) +SIM_AC_OPTION_HOSTENDIAN +SIM_AC_OPTION_WARNINGS + +# DEPRECATED +# +# Instead of defining a `subtarget' macro, code should be checking +# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture +# in question. +# +case "${target}" in + mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; + *) SIM_SUBTARGET="";; +esac +AC_SUBST(SIM_SUBTARGET) + + + +# +# Select the byte order of the target +# +mips_endian= +default_endian= +case "${target}" in + mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;; + mips64*-*-*) default_endian=BIG_ENDIAN ;; + mips16*-*-*) default_endian=BIG_ENDIAN ;; + mips*-*-*) default_endian=BIG_ENDIAN ;; + *) default_endian=BIG_ENDIAN ;; +esac +SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian) + + + +# +# Select the bitsize of the target +# +mips_addr_bitsize= +case "${target}" in + mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; + mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; + mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; + *) mips_bitsize=64 ; mips_msb=63 ;; +esac +SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize) + + + +# +# Select the floating hardware support of the target +# +mips_fpu=HARDWARE_FLOATING_POINT +mips_fpu_bitsize= +case "${target}" in + mips*tx39*) mips_fpu=HARD_FLOATING_POINT + mips_fpu_bitsize=32 + ;; + mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; + mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; + mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; + *) mips_fpu=HARD_FLOATING_POINT ;; +esac +SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) + + + +# +# Select the level of SMP support +# +case "${target}" in + *) mips_smp=0 ;; +esac +SIM_AC_OPTION_SMP($mips_smp) + + + +# +# Select the IGEN architecture +# +sim_gen=IGEN +sim_igen_machine="-M mipsIV" +sim_m16_machine="-M mips16" +sim_igen_filter="32,64,f" +sim_m16_filter="16" +case "${target}" in + mips*tx39*) sim_gen=IGEN + sim_igen_filter="32,f" + sim_igen_machine="-M r3900" + ;; + mips64vr43*-*-*) sim_gen=IGEN + sim_igen_machine="-M mipsIV" + ;; + mips64vr5*-*-*) sim_gen=IGEN + sim_igen_machine="-M vr5000" + ;; + mips64vr41*) sim_gen=M16 + sim_igen_machine="-M vr4100" + sim_m16_machine="-M vr4100" + sim_igen_filter="32,64,f" + sim_m16_filter="16" + ;; + mips64*-*-*) sim_igen_filter="32,64,f" + sim_gen=IGEN + ;; + mips16*-*-*) sim_gen=M16 + sim_igen_filter="32,64,f" + sim_m16_filter="16" + ;; + mips*lsi*) sim_gen=M16 + sim_igen_machine="-M mipsIII,mips16" + sim_m16_machine="-M mips16,mipsIII" + sim_igen_filter="32,f" + sim_m16_filter="16" + ;; + mips*-*-*) sim_gen=IGEN + sim_igen_filter="32,f" + ;; +esac +sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}" +sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}" +AC_SUBST(sim_igen_flags) +AC_SUBST(sim_m16_flags) +AC_SUBST(sim_gen) + + +# +# Add simulated hardware devices +# +hw_enabled=no +case "${target}" in + mips*tx39*) + hw_enabled=yes + hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" + mips_extra_objs="dv-sockser.o" + SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1" + ;; + *) + mips_extra_objs="" + ;; +esac +SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices) +AC_SUBST(mips_extra_objs) + + +# Choose simulator engine +case "${target}" in + *) mips_igen_engine="engine.o" + ;; +esac +AC_SUBST(mips_igen_engine) + + +AC_PATH_X +mips_extra_libs="" +AC_SUBST(mips_extra_libs) + +AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h) +AC_CHECK_LIB(m, fabs) +AC_CHECK_FUNCS(aint anint sqrt) + +SIM_AC_OUTPUT |