diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/aarch64-asm-2.c | 34 | ||||
| -rw-r--r-- | opcodes/aarch64-asm.c | 50 | ||||
| -rw-r--r-- | opcodes/aarch64-asm.h | 2 | ||||
| -rw-r--r-- | opcodes/aarch64-dis-2.c | 702 | ||||
| -rw-r--r-- | opcodes/aarch64-dis.c | 60 | ||||
| -rw-r--r-- | opcodes/aarch64-dis.h | 2 | ||||
| -rw-r--r-- | opcodes/aarch64-opc-2.c | 8 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 79 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.h | 6 | ||||
| -rw-r--r-- | opcodes/aarch64-tbl.h | 43 |
10 files changed, 674 insertions, 312 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c index 332b3f77846..daba55b4c62 100644 --- a/opcodes/aarch64-asm-2.c +++ b/opcodes/aarch64-asm-2.c @@ -667,9 +667,9 @@ aarch64_insert_operand (const aarch64_operand *self, case 203: case 209: case 212: - case 214: - case 215: case 218: + case 219: + case 224: return aarch64_ins_regno (self, info, code, inst, errors); case 15: return aarch64_ins_reg_extended (self, info, code, inst, errors); @@ -681,7 +681,7 @@ aarch64_insert_operand (const aarch64_operand *self, case 33: case 34: case 35: - case 226: + case 234: return aarch64_ins_reglane (self, info, code, inst, errors); case 36: return aarch64_ins_reglist (self, info, code, inst, errors); @@ -726,10 +726,10 @@ aarch64_insert_operand (const aarch64_operand *self, case 192: case 193: case 194: - case 219: case 225: - case 230: - case 231: + case 233: + case 238: + case 239: return aarch64_ins_imm (self, info, code, inst, errors); case 44: case 45: @@ -889,21 +889,31 @@ aarch64_insert_operand (const aarch64_operand *self, case 211: case 213: return aarch64_ins_sve_reglist (self, info, code, inst, errors); + case 214: + case 215: case 216: case 217: + return aarch64_ins_sve_aligned_reglist (self, info, code, inst, errors); case 220: + case 222: + case 226: return aarch64_ins_sme_za_hv_tiles (self, info, code, inst, errors); case 221: - return aarch64_ins_sme_za_array (self, info, code, inst, errors); - case 222: - return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors); case 223: - return aarch64_ins_sme_sm_za (self, info, code, inst, errors); - case 224: - return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors); + return aarch64_ins_sme_za_hv_tiles_range (self, info, code, inst, errors); case 227: case 228: case 229: + return aarch64_ins_sme_za_array (self, info, code, inst, errors); + case 230: + return aarch64_ins_sme_addr_ri_u4xvl (self, info, code, inst, errors); + case 231: + return aarch64_ins_sme_sm_za (self, info, code, inst, errors); + case 232: + return aarch64_ins_sme_pred_reg_with_index (self, info, code, inst, errors); + case 235: + case 236: + case 237: return aarch64_ins_x0_to_x30 (self, info, code, inst, errors); default: assert (0); abort (); } diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index 10b70824b05..516aa8ecb81 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -1167,6 +1167,19 @@ aarch64_ins_sve_aimm (const aarch64_operand *self, return true; } +bool +aarch64_ins_sve_aligned_reglist (const aarch64_operand *self, + const aarch64_opnd_info *info, + aarch64_insn *code, + const aarch64_inst *inst ATTRIBUTE_UNUSED, + aarch64_operand_error *errors ATTRIBUTE_UNUSED) +{ + unsigned int num_regs = get_operand_specific_data (self); + unsigned int val = info->reglist.first_regno; + insert_field (self->fields[0], code, val / num_regs, 0); + return true; +} + /* Encode an SVE CPY/DUP immediate. */ bool aarch64_ins_sve_asimm (const aarch64_operand *self, @@ -1384,6 +1397,35 @@ aarch64_ins_sme_za_hv_tiles (const aarch64_operand *self, return true; } +bool +aarch64_ins_sme_za_hv_tiles_range (const aarch64_operand *self, + const aarch64_opnd_info *info, + aarch64_insn *code, + const aarch64_inst *inst ATTRIBUTE_UNUSED, + aarch64_operand_error *errors + ATTRIBUTE_UNUSED) +{ + int ebytes = aarch64_get_qualifier_esize (info->qualifier); + int range_size = get_opcode_dependent_value (inst->opcode); + int fld_v = info->indexed_za.v; + int fld_rv = info->indexed_za.index.regno - 12; + int imm = info->indexed_za.index.imm; + int max_value = 16 / range_size / ebytes; + + if (max_value == 0) + max_value = 1; + + assert (imm % range_size == 0 && (imm / range_size) < max_value); + int fld_zan_imm = (info->indexed_za.regno * max_value) | (imm / range_size); + assert (fld_zan_imm < (range_size == 4 && ebytes < 8 ? 4 : 8)); + + insert_field (self->fields[0], code, fld_v, 0); + insert_field (self->fields[1], code, fld_rv, 0); + insert_field (self->fields[2], code, fld_zan_imm, 0); + + return true; +} + /* Encode in SME instruction ZERO list of up to eight 64-bit element tile names separated by commas, encoded in the "imm8" field. @@ -1410,7 +1452,7 @@ aarch64_ins_sme_za_array (const aarch64_operand *self, const aarch64_inst *inst ATTRIBUTE_UNUSED, aarch64_operand_error *errors ATTRIBUTE_UNUSED) { - int regno = info->indexed_za.index.regno - 12; + int regno = info->indexed_za.index.regno & 3; int imm = info->indexed_za.index.imm; insert_field (self->fields[0], code, regno, 0); insert_field (self->fields[1], code, imm, 0); @@ -1858,6 +1900,11 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst) /* The variant is encoded as part of the immediate. */ break; + case sme_size_22: + insert_field (FLD_SME_size_22, &inst->value, + aarch64_get_variant (inst), 0); + break; + case sve_cpy: insert_fields (&inst->value, aarch64_get_variant (inst), 0, 2, FLD_SVE_M_14, FLD_size); @@ -1873,6 +1920,7 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst) break; case sve_limm: + case sme2_mov: /* For sve_limm, the .B, .H, and .S forms are just a convenience and depend on the immediate. They don't have a separate encoding. */ diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h index 56f53545531..eb881707b65 100644 --- a/opcodes/aarch64-asm.h +++ b/opcodes/aarch64-asm.h @@ -87,6 +87,7 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_lsl); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_sxtw); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_uxtw); AARCH64_DECL_OPD_INSERTER (ins_sve_aimm); +AARCH64_DECL_OPD_INSERTER (ins_sve_aligned_reglist); AARCH64_DECL_OPD_INSERTER (ins_sve_asimm); AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_one); AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_two); @@ -99,6 +100,7 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_scale); AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm); AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm); AARCH64_DECL_OPD_INSERTER (ins_sme_za_hv_tiles); +AARCH64_DECL_OPD_INSERTER (ins_sme_za_hv_tiles_range); AARCH64_DECL_OPD_INSERTER (ins_sme_za_list); AARCH64_DECL_OPD_INSERTER (ins_sme_za_array); AARCH64_DECL_OPD_INSERTER (ins_sme_addr_ri_u4xvl); diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c index 53fc8122ac8..3e7ca5cc373 100644 --- a/opcodes/aarch64-dis-2.c +++ b/opcodes/aarch64-dis-2.c @@ -96,74 +96,162 @@ aarch64_opcode_lookup_1 (uint32_t word) { if (((word >> 17) & 0x1) == 0) { - if (((word >> 19) & 0x1) == 0) + if (((word >> 18) & 0x1) == 0) { - if (((word >> 20) & 0x1) == 0) - { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000000xx000x0xxxxxxxxxxxxxxxxx - mov. */ - return 2389; - } - else + if (((word >> 19) & 0x1) == 0) { - if (((word >> 16) & 0x1) == 0) + if (((word >> 20) & 0x1) == 0) { - if (((word >> 22) & 0x1) == 0) - { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000000x0010x00xxxxxxxxxxxxxxxx - addha. */ - return 2357; - } - else - { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000000x1010x00xxxxxxxxxxxxxxxx - addha. */ - return 2358; - } + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx00000xxxxxxxxxxxxxxxxx + mov. */ + return 2389; } else { - if (((word >> 22) & 0x1) == 0) + if (((word >> 16) & 0x1) == 0) { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000000x0010x01xxxxxxxxxxxxxxxx - addva. */ - return 2361; + if (((word >> 22) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000x0010000xxxxxxxxxxxxxxxx + addha. */ + return 2357; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000x1010000xxxxxxxxxxxxxxxx + addha. */ + return 2358; + } } else { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000000x1010x01xxxxxxxxxxxxxxxx - addva. */ - return 2362; + if (((word >> 22) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000x0010001xxxxxxxxxxxxxxxx + addva. */ + return 2361; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000x1010001xxxxxxxxxxxxxxxx + addva. */ + return 2362; + } } } } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0x100xxxxxxxxxxxxxxxxx + zero. */ + return 2392; + } } else { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000000xx0x1x0xxxxxxxxxxxxxxxxx - zero. */ - return 2392; + if (((word >> 10) & 0x1) == 0) + { + if (((word >> 11) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx10xxxxx00xxxxxxxxxx + mov. */ + return 2426; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx10xxxxx10xxxxxxxxxx + mov. */ + return 2424; + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx10xxxxx01xxxxxxxxxx + mov. */ + return 2427; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx10xxxxx11xxxxxxxxxx + mov. */ + return 2425; + } + } } } else { - /* 33222222222211111111110000000000 - 10987654321098765432109876543210 - x1000000xx0xxx1xxxxxxxxxxxxxxxxx - mov. */ - return 2388; + if (((word >> 18) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx01xxxxxxxxxxxxxxxxx + mov. */ + return 2388; + } + else + { + if (((word >> 10) & 0x1) == 0) + { + if (((word >> 11) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx11xxxxx00xxxxxxxxxx + mov. */ + return 2422; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx11xxxxx10xxxxxxxxxx + mov. */ + return 2420; + } + } + else + { + if (((word >> 11) & 0x1) == 0) + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx11xxxxx01xxxxxxxxxx + mov. */ + return 2423; + } + else + { + /* 33222222222211111111110000000000 + 10987654321098765432109876543210 + x1000000xx0xx11xxxxx11xxxxxxxxxx + mov. */ + return 2421; + } + } + } } } } @@ -2896,7 +2984,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 00011001000xxxxxxxxx00xxxxxxxxxx stlurb. */ - return 2460; + return 2476; } else { @@ -2904,7 +2992,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 10011001000xxxxxxxxx00xxxxxxxxxx stlur. */ - return 2468; + return 2484; } } else @@ -2915,7 +3003,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 01011001000xxxxxxxxx00xxxxxxxxxx stlurh. */ - return 2464; + return 2480; } else { @@ -2923,7 +3011,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11011001000xxxxxxxxx00xxxxxxxxxx stlur. */ - return 2471; + return 2487; } } } @@ -2961,7 +3049,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0000x1xxxxxxxxxx cpyfp. */ - return 2520; + return 2536; } else { @@ -2969,7 +3057,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1000x1xxxxxxxxxx cpyfprn. */ - return 2526; + return 2542; } } else @@ -2980,7 +3068,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0100x1xxxxxxxxxx cpyfpwn. */ - return 2523; + return 2539; } else { @@ -2988,7 +3076,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1100x1xxxxxxxxxx cpyfpn. */ - return 2529; + return 2545; } } } @@ -3002,7 +3090,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0010x1xxxxxxxxxx cpyfprt. */ - return 2544; + return 2560; } else { @@ -3010,7 +3098,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1010x1xxxxxxxxxx cpyfprtrn. */ - return 2550; + return 2566; } } else @@ -3021,7 +3109,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0110x1xxxxxxxxxx cpyfprtwn. */ - return 2547; + return 2563; } else { @@ -3029,7 +3117,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1110x1xxxxxxxxxx cpyfprtn. */ - return 2553; + return 2569; } } } @@ -3046,7 +3134,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0001x1xxxxxxxxxx cpyfpwt. */ - return 2532; + return 2548; } else { @@ -3054,7 +3142,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1001x1xxxxxxxxxx cpyfpwtrn. */ - return 2538; + return 2554; } } else @@ -3065,7 +3153,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0101x1xxxxxxxxxx cpyfpwtwn. */ - return 2535; + return 2551; } else { @@ -3073,7 +3161,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1101x1xxxxxxxxxx cpyfpwtn. */ - return 2541; + return 2557; } } } @@ -3087,7 +3175,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0011x1xxxxxxxxxx cpyfpt. */ - return 2556; + return 2572; } else { @@ -3095,7 +3183,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1011x1xxxxxxxxxx cpyfptrn. */ - return 2562; + return 2578; } } else @@ -3106,7 +3194,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx0111x1xxxxxxxxxx cpyfptwn. */ - return 2559; + return 2575; } else { @@ -3114,7 +3202,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001000xxxxx1111x1xxxxxxxxxx cpyfptn. */ - return 2565; + return 2581; } } } @@ -3179,7 +3267,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 00011001010xxxxxxxxx00xxxxxxxxxx ldapurb. */ - return 2461; + return 2477; } else { @@ -3187,7 +3275,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 10011001010xxxxxxxxx00xxxxxxxxxx ldapur. */ - return 2469; + return 2485; } } else @@ -3198,7 +3286,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 01011001010xxxxxxxxx00xxxxxxxxxx ldapurh. */ - return 2465; + return 2481; } else { @@ -3206,7 +3294,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11011001010xxxxxxxxx00xxxxxxxxxx ldapur. */ - return 2472; + return 2488; } } } @@ -3244,7 +3332,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0000x1xxxxxxxxxx cpyfm. */ - return 2521; + return 2537; } else { @@ -3252,7 +3340,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1000x1xxxxxxxxxx cpyfmrn. */ - return 2527; + return 2543; } } else @@ -3263,7 +3351,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0100x1xxxxxxxxxx cpyfmwn. */ - return 2524; + return 2540; } else { @@ -3271,7 +3359,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1100x1xxxxxxxxxx cpyfmn. */ - return 2530; + return 2546; } } } @@ -3285,7 +3373,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0010x1xxxxxxxxxx cpyfmrt. */ - return 2545; + return 2561; } else { @@ -3293,7 +3381,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1010x1xxxxxxxxxx cpyfmrtrn. */ - return 2551; + return 2567; } } else @@ -3304,7 +3392,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0110x1xxxxxxxxxx cpyfmrtwn. */ - return 2548; + return 2564; } else { @@ -3312,7 +3400,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1110x1xxxxxxxxxx cpyfmrtn. */ - return 2554; + return 2570; } } } @@ -3329,7 +3417,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0001x1xxxxxxxxxx cpyfmwt. */ - return 2533; + return 2549; } else { @@ -3337,7 +3425,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1001x1xxxxxxxxxx cpyfmwtrn. */ - return 2539; + return 2555; } } else @@ -3348,7 +3436,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0101x1xxxxxxxxxx cpyfmwtwn. */ - return 2536; + return 2552; } else { @@ -3356,7 +3444,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1101x1xxxxxxxxxx cpyfmwtn. */ - return 2542; + return 2558; } } } @@ -3370,7 +3458,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0011x1xxxxxxxxxx cpyfmt. */ - return 2557; + return 2573; } else { @@ -3378,7 +3466,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1011x1xxxxxxxxxx cpyfmtrn. */ - return 2563; + return 2579; } } else @@ -3389,7 +3477,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx0111x1xxxxxxxxxx cpyfmtwn. */ - return 2560; + return 2576; } else { @@ -3397,7 +3485,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001010xxxxx1111x1xxxxxxxxxx cpyfmtn. */ - return 2566; + return 2582; } } } @@ -3465,7 +3553,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 00011001100xxxxxxxxx00xxxxxxxxxx ldapursb. */ - return 2463; + return 2479; } else { @@ -3473,7 +3561,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 10011001100xxxxxxxxx00xxxxxxxxxx ldapursw. */ - return 2470; + return 2486; } } else @@ -3482,7 +3570,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1011001100xxxxxxxxx00xxxxxxxxxx ldapursh. */ - return 2467; + return 2483; } } else @@ -3493,7 +3581,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0011001110xxxxxxxxx00xxxxxxxxxx ldapursb. */ - return 2462; + return 2478; } else { @@ -3501,7 +3589,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1011001110xxxxxxxxx00xxxxxxxxxx ldapursh. */ - return 2466; + return 2482; } } } @@ -3563,7 +3651,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0000x1xxxxxxxxxx cpyfe. */ - return 2522; + return 2538; } else { @@ -3571,7 +3659,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0000x1xxxxxxxxxx setp. */ - return 2616; + return 2632; } } else @@ -3582,7 +3670,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1000x1xxxxxxxxxx cpyfern. */ - return 2528; + return 2544; } else { @@ -3590,7 +3678,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1000x1xxxxxxxxxx sete. */ - return 2618; + return 2634; } } } @@ -3604,7 +3692,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0100x1xxxxxxxxxx cpyfewn. */ - return 2525; + return 2541; } else { @@ -3612,7 +3700,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0100x1xxxxxxxxxx setm. */ - return 2617; + return 2633; } } else @@ -3621,7 +3709,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1100x1xxxxxxxxxx cpyfen. */ - return 2531; + return 2547; } } } @@ -3637,7 +3725,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0010x1xxxxxxxxxx cpyfert. */ - return 2546; + return 2562; } else { @@ -3645,7 +3733,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0010x1xxxxxxxxxx setpn. */ - return 2622; + return 2638; } } else @@ -3656,7 +3744,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1010x1xxxxxxxxxx cpyfertrn. */ - return 2552; + return 2568; } else { @@ -3664,7 +3752,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1010x1xxxxxxxxxx seten. */ - return 2624; + return 2640; } } } @@ -3678,7 +3766,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0110x1xxxxxxxxxx cpyfertwn. */ - return 2549; + return 2565; } else { @@ -3686,7 +3774,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0110x1xxxxxxxxxx setmn. */ - return 2623; + return 2639; } } else @@ -3695,7 +3783,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1110x1xxxxxxxxxx cpyfertn. */ - return 2555; + return 2571; } } } @@ -3714,7 +3802,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0001x1xxxxxxxxxx cpyfewt. */ - return 2534; + return 2550; } else { @@ -3722,7 +3810,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0001x1xxxxxxxxxx setpt. */ - return 2619; + return 2635; } } else @@ -3733,7 +3821,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1001x1xxxxxxxxxx cpyfewtrn. */ - return 2540; + return 2556; } else { @@ -3741,7 +3829,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1001x1xxxxxxxxxx setet. */ - return 2621; + return 2637; } } } @@ -3755,7 +3843,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0101x1xxxxxxxxxx cpyfewtwn. */ - return 2537; + return 2553; } else { @@ -3763,7 +3851,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0101x1xxxxxxxxxx setmt. */ - return 2620; + return 2636; } } else @@ -3772,7 +3860,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1101x1xxxxxxxxxx cpyfewtn. */ - return 2543; + return 2559; } } } @@ -3788,7 +3876,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0011x1xxxxxxxxxx cpyfet. */ - return 2558; + return 2574; } else { @@ -3796,7 +3884,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0011x1xxxxxxxxxx setptn. */ - return 2625; + return 2641; } } else @@ -3807,7 +3895,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx1011x1xxxxxxxxxx cpyfetrn. */ - return 2564; + return 2580; } else { @@ -3815,7 +3903,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx1011x1xxxxxxxxxx setetn. */ - return 2627; + return 2643; } } } @@ -3829,7 +3917,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001100xxxxx0111x1xxxxxxxxxx cpyfetwn. */ - return 2561; + return 2577; } else { @@ -3837,7 +3925,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011001110xxxxx0111x1xxxxxxxxxx setmtn. */ - return 2626; + return 2642; } } else @@ -3846,7 +3934,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx0110011x0xxxxx1111x1xxxxxxxxxx cpyfetn. */ - return 2567; + return 2583; } } } @@ -4219,7 +4307,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1x11010110xxxx0x01000xxxxxxxxxx abs. */ - return 2645; + return 2661; } else { @@ -4237,7 +4325,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010110xxxxxx11000xxxxxxxxxx smax. */ - return 2648; + return 2664; } } } @@ -4317,7 +4405,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010x00xxxxxx0xx10xxxxxxxxxx setf8. */ - return 2458; + return 2474; } else { @@ -4325,7 +4413,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010x00xxxxxx1xx10xxxxxxxxxx setf16. */ - return 2459; + return 2475; } } else @@ -4432,7 +4520,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010110xxxxxx11010xxxxxxxxxx smin. */ - return 2650; + return 2666; } } } @@ -4448,7 +4536,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010110xxxx0x00110xxxxxxxxxx ctz. */ - return 2647; + return 2663; } else { @@ -4493,7 +4581,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010000xxxxxxxxx01xxxxxxxxxx rmif. */ - return 2457; + return 2473; } else { @@ -4587,7 +4675,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010x10xxxxxx11001xxxxxxxxxx umax. */ - return 2649; + return 2665; } } } @@ -4717,7 +4805,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010xx0xxxxxx11011xxxxxxxxxx umin. */ - return 2651; + return 2667; } } } @@ -4733,7 +4821,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xxx11010xx0xxxx0x00111xxxxxxxxxx cnt. */ - return 2646; + return 2662; } else { @@ -5575,7 +5663,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x01x1xxxxx000110xxxxxxxxxx usdot. */ - return 2477; + return 2493; } } } @@ -5649,7 +5737,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x01x1xxxxx000111xxxxxxxxxx sudot. */ - return 2478; + return 2494; } } } @@ -8323,7 +8411,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x0xx0xxxxx011110xxxxxxxxxx usdot. */ - return 2476; + return 2492; } } } @@ -10027,7 +10115,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0100xxx10101xxxxxxxxxxxxx bfcvtnt. */ - return 2505; + return 2521; } } else @@ -10270,7 +10358,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x00x1xxxxxx00xxxxxxxxxxxxx ld1rob. */ - return 2481; + return 2497; } else { @@ -10278,7 +10366,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x01x1xxxxxx00xxxxxxxxxxxxx ld1roh. */ - return 2482; + return 2498; } } else @@ -10510,7 +10598,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0011xxxxx010xxxxxxxxxxxxx bfdot. */ - return 2502; + return 2518; } else { @@ -10531,7 +10619,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx010xx0xxxxxxxxxx bfmlalb. */ - return 2509; + return 2525; } else { @@ -10539,7 +10627,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx010xx1xxxxxxxxxx bfmlalt. */ - return 2508; + return 2524; } } else @@ -10594,7 +10682,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11001x0011xxxxx1x0xxxxxxxxxxxxx bfdot. */ - return 2501; + return 2517; } else { @@ -10606,7 +10694,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx1x0xx0xxxxxxxxxx bfmlalb. */ - return 2507; + return 2523; } else { @@ -10614,7 +10702,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx1x0xx1xxxxxxxxxx bfmlalt. */ - return 2506; + return 2522; } } else @@ -10665,7 +10753,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x00x1xxxxx001xxxxxxxxxxxxx ld1rob. */ - return 2485; + return 2501; } else { @@ -10673,7 +10761,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x01x1xxxxx001xxxxxxxxxxxxx ld1roh. */ - return 2486; + return 2502; } } else @@ -11032,7 +11120,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0101xxxxx111xxxxxxxxxxxxx fmmla. */ - return 2479; + return 2495; } else { @@ -11065,7 +11153,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0011xxxxx111xxxxxxxxxxxxx bfmmla. */ - return 2503; + return 2519; } else { @@ -11095,7 +11183,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x0111xxxxx111xxxxxxxxxxxxx fmmla. */ - return 2480; + return 2496; } else { @@ -11224,7 +11312,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000x00xxxxxxxxxx zip1. */ - return 2489; + return 2505; } else { @@ -11234,7 +11322,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000010xxxxxxxxxx uzp1. */ - return 2491; + return 2507; } else { @@ -11242,7 +11330,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000110xxxxxxxxxx trn1. */ - return 2493; + return 2509; } } } @@ -11254,7 +11342,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000x01xxxxxxxxxx zip2. */ - return 2490; + return 2506; } else { @@ -11264,7 +11352,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000011xxxxxxxxxx uzp2. */ - return 2492; + return 2508; } else { @@ -11272,7 +11360,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000001x1101xxxxx000111xxxxxxxxxx trn2. */ - return 2494; + return 2510; } } } @@ -12331,7 +12419,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x1000xxxxx100110xxxxxxxxxx smmla. */ - return 2473; + return 2489; } else { @@ -12339,7 +12427,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x1100xxxxx100110xxxxxxxxxx usmmla. */ - return 2475; + return 2491; } } else @@ -12348,7 +12436,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010001x1x10xxxxx100110xxxxxxxxxx ummla. */ - return 2474; + return 2490; } } } @@ -13844,7 +13932,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x10x1xxxxx000xxxxxxxxxxxxx ld1row. */ - return 2483; + return 2499; } else { @@ -13852,7 +13940,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x11x1xxxxx000xxxxxxxxxxxxx ld1rod. */ - return 2484; + return 2500; } } } @@ -14226,7 +14314,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x10x1xxxxx001xxxxxxxxxxxxx ld1row. */ - return 2487; + return 2503; } else { @@ -14234,7 +14322,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 101001x11x1xxxxx001xxxxxxxxxxxxx ld1rod. */ - return 2488; + return 2504; } } } @@ -15679,7 +15767,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 011001x110001x10101xxxxxxxxxxxxx bfcvt. */ - return 2504; + return 2520; } } else @@ -17029,7 +17117,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1010100xxxxxxxxxxxxxxxxxxx1xxxx bc.c. */ - return 2640; + return 2656; } else { @@ -17609,7 +17697,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0000xxxxxxxxxxxx cpyp. */ - return 2568; + return 2584; } else { @@ -17617,7 +17705,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0000xxxxxxxxxxxx cpye. */ - return 2570; + return 2586; } } else @@ -17628,7 +17716,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1000xxxxxxxxxxxx cpyprn. */ - return 2574; + return 2590; } else { @@ -17636,7 +17724,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1000xxxxxxxxxxxx cpyern. */ - return 2576; + return 2592; } } } @@ -17650,7 +17738,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0100xxxxxxxxxxxx cpypwn. */ - return 2571; + return 2587; } else { @@ -17658,7 +17746,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0100xxxxxxxxxxxx cpyewn. */ - return 2573; + return 2589; } } else @@ -17669,7 +17757,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1100xxxxxxxxxxxx cpypn. */ - return 2577; + return 2593; } else { @@ -17677,7 +17765,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1100xxxxxxxxxxxx cpyen. */ - return 2579; + return 2595; } } } @@ -17694,7 +17782,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0010xxxxxxxxxxxx cpyprt. */ - return 2592; + return 2608; } else { @@ -17702,7 +17790,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0010xxxxxxxxxxxx cpyert. */ - return 2594; + return 2610; } } else @@ -17713,7 +17801,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1010xxxxxxxxxxxx cpyprtrn. */ - return 2598; + return 2614; } else { @@ -17721,7 +17809,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1010xxxxxxxxxxxx cpyertrn. */ - return 2600; + return 2616; } } } @@ -17735,7 +17823,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0110xxxxxxxxxxxx cpyprtwn. */ - return 2595; + return 2611; } else { @@ -17743,7 +17831,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0110xxxxxxxxxxxx cpyertwn. */ - return 2597; + return 2613; } } else @@ -17754,7 +17842,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1110xxxxxxxxxxxx cpyprtn. */ - return 2601; + return 2617; } else { @@ -17762,7 +17850,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1110xxxxxxxxxxxx cpyertn. */ - return 2603; + return 2619; } } } @@ -17782,7 +17870,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0001xxxxxxxxxxxx cpypwt. */ - return 2580; + return 2596; } else { @@ -17790,7 +17878,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0001xxxxxxxxxxxx cpyewt. */ - return 2582; + return 2598; } } else @@ -17801,7 +17889,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1001xxxxxxxxxxxx cpypwtrn. */ - return 2586; + return 2602; } else { @@ -17809,7 +17897,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1001xxxxxxxxxxxx cpyewtrn. */ - return 2588; + return 2604; } } } @@ -17823,7 +17911,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0101xxxxxxxxxxxx cpypwtwn. */ - return 2583; + return 2599; } else { @@ -17831,7 +17919,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0101xxxxxxxxxxxx cpyewtwn. */ - return 2585; + return 2601; } } else @@ -17842,7 +17930,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1101xxxxxxxxxxxx cpypwtn. */ - return 2589; + return 2605; } else { @@ -17850,7 +17938,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1101xxxxxxxxxxxx cpyewtn. */ - return 2591; + return 2607; } } } @@ -17867,7 +17955,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0011xxxxxxxxxxxx cpypt. */ - return 2604; + return 2620; } else { @@ -17875,7 +17963,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0011xxxxxxxxxxxx cpyet. */ - return 2606; + return 2622; } } else @@ -17886,7 +17974,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1011xxxxxxxxxxxx cpyptrn. */ - return 2610; + return 2626; } else { @@ -17894,7 +17982,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1011xxxxxxxxxxxx cpyetrn. */ - return 2612; + return 2628; } } } @@ -17908,7 +17996,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx0111xxxxxxxxxxxx cpyptwn. */ - return 2607; + return 2623; } else { @@ -17916,7 +18004,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx0111xxxxxxxxxxxx cpyetwn. */ - return 2609; + return 2625; } } else @@ -17927,7 +18015,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110100xxxxxx1111xxxxxxxxxxxx cpyptn. */ - return 2613; + return 2629; } else { @@ -17935,7 +18023,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110110xxxxxx1111xxxxxxxxxxxx cpyetn. */ - return 2615; + return 2631; } } } @@ -17969,7 +18057,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0000xxxxxxxxxxxx cpym. */ - return 2569; + return 2585; } else { @@ -17977,7 +18065,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0000xxxxxxxxxxxx setgp. */ - return 2628; + return 2644; } } else @@ -17988,7 +18076,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1000xxxxxxxxxxxx cpymrn. */ - return 2575; + return 2591; } else { @@ -17996,7 +18084,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1000xxxxxxxxxxxx setge. */ - return 2630; + return 2646; } } } @@ -18010,7 +18098,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0100xxxxxxxxxxxx cpymwn. */ - return 2572; + return 2588; } else { @@ -18018,7 +18106,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0100xxxxxxxxxxxx setgm. */ - return 2629; + return 2645; } } else @@ -18027,7 +18115,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1100xxxxxxxxxxxx cpymn. */ - return 2578; + return 2594; } } } @@ -18043,7 +18131,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0010xxxxxxxxxxxx cpymrt. */ - return 2593; + return 2609; } else { @@ -18051,7 +18139,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0010xxxxxxxxxxxx setgpn. */ - return 2634; + return 2650; } } else @@ -18062,7 +18150,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1010xxxxxxxxxxxx cpymrtrn. */ - return 2599; + return 2615; } else { @@ -18070,7 +18158,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1010xxxxxxxxxxxx setgen. */ - return 2636; + return 2652; } } } @@ -18084,7 +18172,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0110xxxxxxxxxxxx cpymrtwn. */ - return 2596; + return 2612; } else { @@ -18092,7 +18180,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0110xxxxxxxxxxxx setgmn. */ - return 2635; + return 2651; } } else @@ -18101,7 +18189,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1110xxxxxxxxxxxx cpymrtn. */ - return 2602; + return 2618; } } } @@ -18120,7 +18208,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0001xxxxxxxxxxxx cpymwt. */ - return 2581; + return 2597; } else { @@ -18128,7 +18216,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0001xxxxxxxxxxxx setgpt. */ - return 2631; + return 2647; } } else @@ -18139,7 +18227,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1001xxxxxxxxxxxx cpymwtrn. */ - return 2587; + return 2603; } else { @@ -18147,7 +18235,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1001xxxxxxxxxxxx setget. */ - return 2633; + return 2649; } } } @@ -18161,7 +18249,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0101xxxxxxxxxxxx cpymwtwn. */ - return 2584; + return 2600; } else { @@ -18169,7 +18257,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0101xxxxxxxxxxxx setgmt. */ - return 2632; + return 2648; } } else @@ -18178,7 +18266,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1101xxxxxxxxxxxx cpymwtn. */ - return 2590; + return 2606; } } } @@ -18194,7 +18282,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0011xxxxxxxxxxxx cpymt. */ - return 2605; + return 2621; } else { @@ -18202,7 +18290,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0011xxxxxxxxxxxx setgptn. */ - return 2637; + return 2653; } } else @@ -18213,7 +18301,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx1011xxxxxxxxxxxx cpymtrn. */ - return 2611; + return 2627; } else { @@ -18221,7 +18309,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx1011xxxxxxxxxxxx setgetn. */ - return 2639; + return 2655; } } } @@ -18235,7 +18323,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110101xxxxxx0111xxxxxxxxxxxx cpymtwn. */ - return 2608; + return 2624; } else { @@ -18243,7 +18331,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx01110111xxxxxx0111xxxxxxxxxxxx setgmtn. */ - return 2638; + return 2654; } } else @@ -18252,7 +18340,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx011101x1xxxxxx1111xxxxxxxxxxxx cpymtn. */ - return 2614; + return 2630; } } } @@ -18419,7 +18507,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x1001xxxxxxxxxx smmla. */ - return 2495; + return 2511; } } } @@ -18452,7 +18540,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x0101xxxxxxxxxx sdot. */ - return 2421; + return 2437; } } else @@ -18526,7 +18614,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x1011xxxxxxxxxx usmmla. */ - return 2497; + return 2513; } } } @@ -18559,7 +18647,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 0x001110xx0xxxxx1x0111xxxxxxxxxx usdot. */ - return 2498; + return 2514; } } else @@ -18606,7 +18694,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110000xxxxxxxxxxxxxxxxxxxxx eor3. */ - return 2428; + return 2444; } else { @@ -18614,7 +18702,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110100xxxxxxxxxxxxxxxxxxxxx xar. */ - return 2430; + return 2446; } } else @@ -18625,7 +18713,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110x10xxxxx0xxxxxxxxxxxxxxx sm3ss1. */ - return 2432; + return 2448; } else { @@ -18639,7 +18727,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110010xxxxx1xxx00xxxxxxxxxx sm3tt1a. */ - return 2433; + return 2449; } else { @@ -18647,7 +18735,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110110xxxxx1xxx00xxxxxxxxxx sha512su0. */ - return 2426; + return 2442; } } else @@ -18656,7 +18744,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110x10xxxxx1xxx10xxxxxxxxxx sm3tt2a. */ - return 2435; + return 2451; } } else @@ -18669,7 +18757,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110010xxxxx1xxx01xxxxxxxxxx sm3tt1b. */ - return 2434; + return 2450; } else { @@ -18677,7 +18765,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110110xxxxx1xxx01xxxxxxxxxx sm4e. */ - return 2439; + return 2455; } } else @@ -18686,7 +18774,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110x10xxxxx1xxx11xxxxxxxxxx sm3tt2b. */ - return 2436; + return 2452; } } } @@ -18867,7 +18955,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101110xx0xxxxx100101xxxxxxxxxx udot. */ - return 2420; + return 2436; } } else @@ -18898,7 +18986,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101110xx0xxxxx101x01xxxxxxxxxx ummla. */ - return 2496; + return 2512; } else { @@ -18917,7 +19005,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101110xx0xxxxx1x1011xxxxxxxxxx bfmmla. */ - return 2512; + return 2528; } else { @@ -18927,7 +19015,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx1011100x0xxxxx1x1111xxxxxxxxxx bfdot. */ - return 2510; + return 2526; } else { @@ -18937,7 +19025,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x01011101x0xxxxx1x1111xxxxxxxxxx bfmlalb. */ - return 2517; + return 2533; } else { @@ -18945,7 +19033,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11011101x0xxxxx1x1111xxxxxxxxxx bfmlalt. */ - return 2516; + return 2532; } } } @@ -19529,7 +19617,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 000011101x1xxxx1011010xxxxxxxxxx bfcvtn. */ - return 2513; + return 2529; } else { @@ -19537,7 +19625,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 010011101x1xxxx1011010xxxxxxxxxx bfcvtn2. */ - return 2514; + return 2530; } } } @@ -19855,7 +19943,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx0xxxxxxxxxxxxxxx bcax. */ - return 2431; + return 2447; } } else @@ -20466,7 +20554,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11001110xx1xxxxx100000xxxxxxxxxx sha512h. */ - return 2424; + return 2440; } } } @@ -20518,7 +20606,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 11001110xx1xxxxx110000xxxxxxxxxx sm3partw1. */ - return 2437; + return 2453; } } } @@ -20761,7 +20849,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx100010xxxxxxxxxx sha512su1. */ - return 2427; + return 2443; } } else @@ -20837,7 +20925,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x0011100x1xxxxx110010xxxxxxxxxx sm4ekey. */ - return 2440; + return 2456; } } else @@ -21663,7 +21751,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx100001xxxxxxxxxx sha512h2. */ - return 2425; + return 2441; } } else @@ -21695,7 +21783,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x0011100x1xxxxx110001xxxxxxxxxx sm3partw2. */ - return 2438; + return 2454; } } else @@ -21935,7 +22023,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 1x001110xx1xxxxx100011xxxxxxxxxx rax1. */ - return 2429; + return 2445; } } else @@ -21967,7 +22055,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x01011100x1xxxxx110011xxxxxxxxxx fmlal2. */ - return 2443; + return 2459; } else { @@ -21975,7 +22063,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11011100x1xxxxx110011xxxxxxxxxx fmlal2. */ - return 2447; + return 2463; } } } @@ -21997,7 +22085,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x01011101x1xxxxx110011xxxxxxxxxx fmlsl2. */ - return 2444; + return 2460; } else { @@ -22005,7 +22093,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x11011101x1xxxxx110011xxxxxxxxxx fmlsl2. */ - return 2448; + return 2464; } } } @@ -22044,7 +22132,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x00011100x1xxxxx111011xxxxxxxxxx fmlal. */ - return 2441; + return 2457; } else { @@ -22052,7 +22140,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10011100x1xxxxx111011xxxxxxxxxx fmlal. */ - return 2445; + return 2461; } } else @@ -22074,7 +22162,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x00011101x1xxxxx111011xxxxxxxxxx fmlsl. */ - return 2442; + return 2458; } else { @@ -22082,7 +22170,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x10011101x1xxxxx111011xxxxxxxxxx fmlsl. */ - return 2446; + return 2462; } } else @@ -23890,7 +23978,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0001111xxxxxxxx0000x0xxxxxxxxxx fmlal. */ - return 2449; + return 2465; } else { @@ -23898,7 +23986,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1001111xxxxxxxx0000x0xxxxxxxxxx fmlal. */ - return 2453; + return 2469; } } else @@ -23920,7 +24008,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0001111xxxxxxxx0100x0xxxxxxxxxx fmlsl. */ - return 2450; + return 2466; } else { @@ -23928,7 +24016,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1001111xxxxxxxx0100x0xxxxxxxxxx fmlsl. */ - return 2454; + return 2470; } } else @@ -24434,7 +24522,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0101111xxxxxxxx1000x0xxxxxxxxxx fmlal2. */ - return 2451; + return 2467; } else { @@ -24442,7 +24530,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1101111xxxxxxxx1000x0xxxxxxxxxx fmlal2. */ - return 2455; + return 2471; } } } @@ -24464,7 +24552,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x0101111xxxxxxxx1100x0xxxxxxxxxx fmlsl2. */ - return 2452; + return 2468; } else { @@ -24472,7 +24560,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x1101111xxxxxxxx1100x0xxxxxxxxxx fmlsl2. */ - return 2456; + return 2472; } } } @@ -24528,7 +24616,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx001111xxxxxxxx1110x0xxxxxxxxxx sdot. */ - return 2423; + return 2439; } else { @@ -24536,7 +24624,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx101111xxxxxxxx1110x0xxxxxxxxxx udot. */ - return 2422; + return 2438; } } } @@ -24639,7 +24727,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx00111100xxxxxx1111x0xxxxxxxxxx sudot. */ - return 2500; + return 2516; } else { @@ -24647,7 +24735,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx00111110xxxxxx1111x0xxxxxxxxxx usdot. */ - return 2499; + return 2515; } } else @@ -24658,7 +24746,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 xx00111101xxxxxx1111x0xxxxxxxxxx bfdot. */ - return 2511; + return 2527; } else { @@ -24668,7 +24756,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x000111111xxxxxx1111x0xxxxxxxxxx bfmlalb. */ - return 2519; + return 2535; } else { @@ -24676,7 +24764,7 @@ aarch64_opcode_lookup_1 (uint32_t word) 10987654321098765432109876543210 x100111111xxxxxx1111x0xxxxxxxxxx bfmlalt. */ - return 2518; + return 2534; } } } @@ -25165,8 +25253,24 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode) { case 2389: value = 2391; break; /* mov --> mova. */ case 2391: return NULL; /* mova --> NULL. */ + case 2426: value = 2434; break; /* mov --> mova. */ + case 2434: return NULL; /* mova --> NULL. */ + case 2424: value = 2432; break; /* mov --> mova. */ + case 2432: return NULL; /* mova --> NULL. */ + case 2427: value = 2435; break; /* mov --> mova. */ + case 2435: return NULL; /* mova --> NULL. */ + case 2425: value = 2433; break; /* mov --> mova. */ + case 2433: return NULL; /* mova --> NULL. */ case 2388: value = 2390; break; /* mov --> mova. */ case 2390: return NULL; /* mova --> NULL. */ + case 2422: value = 2430; break; /* mov --> mova. */ + case 2430: return NULL; /* mova --> NULL. */ + case 2420: value = 2428; break; /* mov --> mova. */ + case 2428: return NULL; /* mova --> NULL. */ + case 2423: value = 2431; break; /* mov --> mova. */ + case 2431: return NULL; /* mova --> NULL. */ + case 2421: value = 2429; break; /* mov --> mova. */ + case 2429: return NULL; /* mova --> NULL. */ case 2393: value = 2398; break; /* ld1b --> ld1b. */ case 2398: return NULL; /* ld1b --> NULL. */ case 2395: value = 2400; break; /* ld1w --> ld1w. */ @@ -25188,11 +25292,11 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode) case 2407: value = 2412; break; /* st1q --> st1q. */ case 2412: return NULL; /* st1q --> NULL. */ case 12: value = 19; break; /* add --> addg. */ - case 19: value = 2641; break; /* addg --> smax. */ - case 2641: value = 2642; break; /* smax --> umax. */ - case 2642: value = 2643; break; /* umax --> smin. */ - case 2643: value = 2644; break; /* smin --> umin. */ - case 2644: return NULL; /* umin --> NULL. */ + case 19: value = 2657; break; /* addg --> smax. */ + case 2657: value = 2658; break; /* smax --> umax. */ + case 2658: value = 2659; break; /* umax --> smin. */ + case 2659: value = 2660; break; /* smin --> umin. */ + case 2660: return NULL; /* umin --> NULL. */ case 16: value = 20; break; /* sub --> subg. */ case 20: return NULL; /* subg --> NULL. */ case 971: value = 975; break; /* stnp --> stp. */ @@ -25350,8 +25454,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode) case 824: return NULL; /* fsqrt --> NULL. */ case 832: value = 833; break; /* frintz --> frintz. */ case 833: return NULL; /* frintz --> NULL. */ - case 825: value = 2515; break; /* fcvt --> bfcvt. */ - case 2515: return NULL; /* bfcvt --> NULL. */ + case 825: value = 2531; break; /* fcvt --> bfcvt. */ + case 2531: return NULL; /* bfcvt --> NULL. */ case 834: value = 835; break; /* frinta --> frinta. */ case 835: return NULL; /* frinta --> NULL. */ case 836: value = 837; break; /* frintx --> frintx. */ @@ -25858,9 +25962,9 @@ aarch64_extract_operand (const aarch64_operand *self, case 203: case 209: case 212: - case 214: - case 215: case 218: + case 219: + case 224: return aarch64_ext_regno (self, info, code, inst, errors); case 10: return aarch64_ext_regrt_sysins (self, info, code, inst, errors); @@ -25876,7 +25980,7 @@ aarch64_extract_operand (const aarch64_operand *self, case 33: case 34: case 35: - case 226: + case 234: return aarch64_ext_reglane (self, info, code, inst, errors); case 36: return aarch64_ext_reglist (self, info, code, inst, errors); @@ -25922,10 +26026,10 @@ aarch64_extract_operand (const aarch64_operand *self, case 192: case 193: case 194: - case 219: case 225: - case 230: - case 231: + case 233: + case 238: + case 239: return aarch64_ext_imm (self, info, code, inst, errors); case 44: case 45: @@ -26087,21 +26191,31 @@ aarch64_extract_operand (const aarch64_operand *self, case 211: case 213: return aarch64_ext_sve_reglist (self, info, code, inst, errors); + case 214: + case 215: case 216: case 217: + return aarch64_ext_sve_aligned_reglist (self, info, code, inst, errors); case 220: + case 222: + case 226: return aarch64_ext_sme_za_hv_tiles (self, info, code, inst, errors); case 221: - return aarch64_ext_sme_za_array (self, info, code, inst, errors); - case 222: - return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors); case 223: - return aarch64_ext_sme_sm_za (self, info, code, inst, errors); - case 224: - return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors); + return aarch64_ext_sme_za_hv_tiles_range (self, info, code, inst, errors); case 227: case 228: case 229: + return aarch64_ext_sme_za_array (self, info, code, inst, errors); + case 230: + return aarch64_ext_sme_addr_ri_u4xvl (self, info, code, inst, errors); + case 231: + return aarch64_ext_sme_sm_za (self, info, code, inst, errors); + case 232: + return aarch64_ext_sme_pred_reg_with_index (self, info, code, inst, errors); + case 235: + case 236: + case 237: return aarch64_ext_x0_to_x30 (self, info, code, inst, errors); default: assert (0); abort (); } diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 49bfd46906e..7b2cf3130c4 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -1715,6 +1715,20 @@ aarch64_ext_sve_aimm (const aarch64_operand *self, && decode_sve_aimm (info, (uint8_t) info->imm.value)); } +bool +aarch64_ext_sve_aligned_reglist (const aarch64_operand *self, + aarch64_opnd_info *info, aarch64_insn code, + const aarch64_inst *inst ATTRIBUTE_UNUSED, + aarch64_operand_error *errors ATTRIBUTE_UNUSED) +{ + unsigned int num_regs = get_operand_specific_data (self); + unsigned int val = extract_field (self->fields[0], code, 0); + info->reglist.first_regno = val * num_regs; + info->reglist.num_regs = num_regs; + info->reglist.stride = 1; + return true; +} + /* Decode an SVE CPY/DUP immediate. */ bool aarch64_ext_sve_asimm (const aarch64_operand *self, @@ -1823,6 +1837,36 @@ aarch64_ext_sme_za_hv_tiles (const aarch64_operand *self, return true; } +bool +aarch64_ext_sme_za_hv_tiles_range (const aarch64_operand *self, + aarch64_opnd_info *info, aarch64_insn code, + const aarch64_inst *inst ATTRIBUTE_UNUSED, + aarch64_operand_error *errors + ATTRIBUTE_UNUSED) +{ + int ebytes = aarch64_get_qualifier_esize (info->qualifier); + int range_size = get_opcode_dependent_value (inst->opcode); + int fld_v = extract_field (self->fields[0], code, 0); + int fld_rv = extract_field (self->fields[1], code, 0); + int fld_zan_imm = extract_field (self->fields[2], code, 0); + int max_value = 16 / range_size / ebytes; + + if (max_value == 0) + max_value = 1; + + int regno = fld_zan_imm / max_value; + if (regno >= ebytes) + return false; + + info->indexed_za.regno = regno; + info->indexed_za.index.imm = (fld_zan_imm % max_value) * range_size; + info->indexed_za.index.countm1 = range_size - 1; + info->indexed_za.index.regno = fld_rv + 12; + info->indexed_za.v = fld_v; + + return true; +} + /* Decode in SME instruction ZERO list of up to eight 64-bit element tile names separated by commas, encoded in the "imm8" field. @@ -1850,10 +1894,15 @@ aarch64_ext_sme_za_array (const aarch64_operand *self, const aarch64_inst *inst ATTRIBUTE_UNUSED, aarch64_operand_error *errors ATTRIBUTE_UNUSED) { - int regno = extract_field (self->fields[0], code, 0) + 12; + int regno = extract_field (self->fields[0], code, 0); + if (info->type == AARCH64_OPND_SME_ZA_array_off4) + regno += 12; + else + regno += 8; int imm = extract_field (self->fields[1], code, 0); info->indexed_za.index.regno = regno; info->indexed_za.index.imm = imm; + info->indexed_za.group_size = get_opcode_dependent_value (inst->opcode); return true; } @@ -2979,6 +3028,10 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst) } break; + case sme_size_22: + variant = extract_field (FLD_SME_size_22, inst->value, 0); + break; + case sve_cpy: variant = extract_fields (inst->value, 0, 2, FLD_size, FLD_SVE_M_14); break; @@ -3006,6 +3059,11 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst) variant = 3; break; + case sme2_mov: + /* .D is preferred over the other sizes in disassembly. */ + variant = 3; + break; + case sme_misc: case sve_misc: /* These instructions have only a single variant. */ diff --git a/opcodes/aarch64-dis.h b/opcodes/aarch64-dis.h index 255445c9580..1d459858e0d 100644 --- a/opcodes/aarch64-dis.h +++ b/opcodes/aarch64-dis.h @@ -111,6 +111,7 @@ AARCH64_DECL_OPD_EXTRACTOR (ext_sve_addr_zz_lsl); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_addr_zz_sxtw); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_addr_zz_uxtw); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_aimm); +AARCH64_DECL_OPD_EXTRACTOR (ext_sve_aligned_reglist); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_asimm); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_float_half_one); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_float_half_two); @@ -123,6 +124,7 @@ AARCH64_DECL_OPD_EXTRACTOR (ext_sve_scale); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_shlimm); AARCH64_DECL_OPD_EXTRACTOR (ext_sve_shrimm); AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_hv_tiles); +AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_hv_tiles_range); AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_list); AARCH64_DECL_OPD_EXTRACTOR (ext_sme_za_array); AARCH64_DECL_OPD_EXTRACTOR (ext_sme_addr_ri_u4xvl); diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index b00b22aaaf7..f1103efd23f 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -238,13 +238,21 @@ const struct aarch64_operand aarch64_operands[] = {AARCH64_OPND_CLASS_SVE_REGLIST, "SVE_ZnxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn}, "a list of SVE vector registers"}, {AARCH64_OPND_CLASS_SVE_REG, "SVE_Zt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "an SVE vector register"}, {AARCH64_OPND_CLASS_SVE_REGLIST, "SVE_ZtxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of SVE vector registers"}, + {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn2}, "a list of SVE vector registers"}, + {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Zdnx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zdn4}, "a list of SVE vector registers"}, + {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx2", 2 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn2}, "a list of SVE vector registers"}, + {AARCH64_OPND_CLASS_SVE_REGLIST, "SME_Znx4", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Zn4}, "a list of SVE vector registers"}, {AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_2b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_2b}, "an SME ZA tile ZA0-ZA3"}, {AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_3b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_3b}, "an SME ZA tile ZA0-ZA7"}, {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_src", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_5}, "an SME horizontal or vertical vector access register"}, + {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_srcxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_V,FLD_SME_Rv,FLD_imm3_5}, "an SME horizontal or vertical vector access register"}, {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_dest", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"}, + {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_destxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_V,FLD_SME_Rv,FLD_imm3_0}, "an SME horizontal or vertical vector access register"}, {AARCH64_OPND_CLASS_PRED_REG, "SME_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pm}, "an SVE predicate register"}, {AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "a list of 64-bit ZA element tiles"}, {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_HV_idx_ldstr", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0}, "an SME horizontal or vertical vector access register"}, + {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_0", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_0}, "ZA array"}, + {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off3_5", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm3_5}, "ZA array"}, {AARCH64_OPND_CLASS_ZA_ACCESS, "SME_ZA_array_off4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Rv,FLD_imm4_0}, "ZA array"}, {AARCH64_OPND_CLASS_ADDRESS, "SME_ADDR_RI_U4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm4_0}, "memory offset"}, {AARCH64_OPND_CLASS_ADDRESS, "SME_SM_ZA", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "streaming mode"}, diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 1944b8fe87d..b3308955cc8 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -227,6 +227,10 @@ const aarch64_field fields[] = { 15, 1 }, /* SME_V: (horizontal / vertical tiles), bit 15. */ { 0, 2 }, /* SME_ZAda_2b: tile ZA0-ZA3. */ { 0, 3 }, /* SME_ZAda_3b: tile ZA0-ZA7. */ + { 1, 4 }, /* SME_Zdn2: Z0-Z31, multiple of 2, bits [4:1]. */ + { 2, 3 }, /* SME_Zdn4: Z0-Z31, multiple of 4, bits [4:2]. */ + { 6, 4 }, /* SME_Zn2: Z0-Z31, multiple of 2, bits [9:6]. */ + { 7, 3 }, /* SME_Zn4: Z0-Z31, multiple of 4, bits [9:7]. */ { 23, 1 }, /* SME_i1: immediate field, bit 23. */ { 22, 2 }, /* SME_size_22: size<1>, size<0> class field, [23:22]. */ { 22, 1 }, /* SME_tszh: immediate and qualifier field, bit 22. */ @@ -296,6 +300,8 @@ const aarch64_field fields[] = { 0, 4 }, /* cond2: condition in truly conditional-executed inst. */ { 5, 5 }, /* defgh: d:e:f:g:h bits in AdvSIMD modified immediate. */ { 21, 2 }, /* hw: in move wide constant instructions. */ + { 0, 3 }, /* imm3_0: general immediate in bits [2:0]. */ + { 5, 3 }, /* imm3_5: general immediate in bits [7:5]. */ { 10, 3 }, /* imm3_10: in add/sub extended reg instructions. */ { 0, 4 }, /* imm4_0: in rmif instructions. */ { 5, 4 }, /* imm4_5: in SME instructions. */ @@ -1546,6 +1552,10 @@ check_za_access (const aarch64_opnd_info *opnd, set_other_error (mismatch_detail, idx, _("expected a selection register in the" " range w12-w15")); + else if (min_wreg == 8) + set_other_error (mismatch_detail, idx, + _("expected a selection register in the" + " range w8-w11")); else abort (); return false; @@ -1574,6 +1584,12 @@ check_za_access (const aarch64_opnd_info *opnd, set_other_error (mismatch_detail, idx, _("expected a single offset rather than" " a range")); + else if (range_size == 2) + set_other_error (mismatch_detail, idx, + _("expected a range of two offsets")); + else if (range_size == 4) + set_other_error (mismatch_detail, idx, + _("expected a range of four offsets")); else abort (); return false; @@ -1715,9 +1731,33 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, break; case AARCH64_OPND_CLASS_SVE_REGLIST: - num = get_opcode_dependent_value (opcode); - if (!check_reglist (opnd, mismatch_detail, idx, num, 1)) - return 0; + switch (type) + { + case AARCH64_OPND_SME_Zdnx2: + case AARCH64_OPND_SME_Zdnx4: + case AARCH64_OPND_SME_Znx2: + case AARCH64_OPND_SME_Znx4: + num = get_operand_specific_data (&aarch64_operands[type]); + if (!check_reglist (opnd, mismatch_detail, idx, num, 1)) + return 0; + if ((opnd->reglist.first_regno % num) != 0) + { + set_other_error (mismatch_detail, idx, + _("start register out of range")); + return 0; + } + break; + + case AARCH64_OPND_SVE_ZnxN: + case AARCH64_OPND_SVE_ZtxN: + num = get_opcode_dependent_value (opcode); + if (!check_reglist (opnd, mismatch_detail, idx, num, 1)) + return 0; + break; + + default: + abort (); + } break; case AARCH64_OPND_CLASS_ZA_ACCESS: @@ -1739,6 +1779,25 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, return 0; break; + case AARCH64_OPND_SME_ZA_array_off3_0: + case AARCH64_OPND_SME_ZA_array_off3_5: + if (!check_za_access (opnd, mismatch_detail, idx, 8, 7, 1, + get_opcode_dependent_value (opcode))) + return 0; + break; + + case AARCH64_OPND_SME_ZA_HV_idx_srcxN: + case AARCH64_OPND_SME_ZA_HV_idx_destxN: + size = aarch64_get_qualifier_esize (opnd->qualifier); + num = get_opcode_dependent_value (opcode); + max_value = 16 / num / size; + if (max_value > 0) + max_value -= 1; + if (!check_za_access (opnd, mismatch_detail, idx, + 12, max_value, num, 0)) + return 0; + break; + default: abort (); } @@ -3709,6 +3768,10 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, case AARCH64_OPND_SVE_ZnxN: case AARCH64_OPND_SVE_ZtxN: + case AARCH64_OPND_SME_Zdnx2: + case AARCH64_OPND_SME_Zdnx4: + case AARCH64_OPND_SME_Znx2: + case AARCH64_OPND_SME_Znx4: print_register_list (buf, size, opnd, "z", styler); break; @@ -3732,7 +3795,9 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, break; case AARCH64_OPND_SME_ZA_HV_idx_src: + case AARCH64_OPND_SME_ZA_HV_idx_srcxN: case AARCH64_OPND_SME_ZA_HV_idx_dest: + case AARCH64_OPND_SME_ZA_HV_idx_destxN: case AARCH64_OPND_SME_ZA_HV_idx_ldstr: snprintf (buf, size, "%s%s[%s, %s%s%s%s%s]%s", opnd->type == AARCH64_OPND_SME_ZA_HV_idx_ldstr ? "{" : "", @@ -3760,9 +3825,15 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, print_sme_za_list (buf, size, opnd->reg.regno, styler); break; + case AARCH64_OPND_SME_ZA_array_off3_0: + case AARCH64_OPND_SME_ZA_array_off3_5: case AARCH64_OPND_SME_ZA_array_off4: snprintf (buf, size, "%s[%s, %s%s%s%s%s]", - style_reg (styler, "za"), + style_reg (styler, "za%s%s", + opnd->qualifier == AARCH64_OPND_QLF_NIL ? "" : ".", + (opnd->qualifier == AARCH64_OPND_QLF_NIL + ? "" + : aarch64_get_qualifier_name (opnd->qualifier))), style_reg (styler, "w%d", opnd->indexed_za.index.regno), style_imm (styler, "%" PRIi64, opnd->indexed_za.index.imm), opnd->indexed_za.index.countm1 ? ":" : "", diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h index e142ae6ee76..c604af5124c 100644 --- a/opcodes/aarch64-opc.h +++ b/opcodes/aarch64-opc.h @@ -55,6 +55,10 @@ enum aarch64_field_kind FLD_SME_V, FLD_SME_ZAda_2b, FLD_SME_ZAda_3b, + FLD_SME_Zdn2, + FLD_SME_Zdn4, + FLD_SME_Zn2, + FLD_SME_Zn4, FLD_SME_i1, FLD_SME_size_22, FLD_SME_tszh, @@ -124,6 +128,8 @@ enum aarch64_field_kind FLD_cond2, FLD_defgh, FLD_hw, + FLD_imm3_0, + FLD_imm3_5, FLD_imm3_10, FLD_imm4_0, FLD_imm4_5, diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 72f3c3ced88..93e124906d8 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2477,6 +2477,9 @@ static const aarch64_feature_set aarch64_feature_sme_f64f64 = static const aarch64_feature_set aarch64_feature_sme_i16i64 = AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME | AARCH64_FEATURE_SME_I16I64, 0); +static const aarch64_feature_set aarch64_feature_sme2 = + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME + | AARCH64_FEATURE_SME2, 0); static const aarch64_feature_set aarch64_feature_v8_6 = AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0); static const aarch64_feature_set aarch64_feature_v8_7 = @@ -2545,6 +2548,7 @@ static const aarch64_feature_set aarch64_feature_cssc = #define SME &aarch64_feature_sme #define SME_F64F64 &aarch64_feature_sme_f64f64 #define SME_I16I64 &aarch64_feature_sme_i16i64 +#define SME2 &aarch64_feature_sme2 #define ARMV8_6 &aarch64_feature_v8_6 #define ARMV8_6_SVE &aarch64_feature_v8_6 #define BFLOAT16_SVE &aarch64_feature_bfloat16_sve @@ -2656,6 +2660,9 @@ static const aarch64_feature_set aarch64_feature_cssc = #define SME_INSNC(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,CONSTRAINTS,TIED) \ { NAME, OPCODE, MASK, CLASS, OP, SME, OPS, QUALS, \ F_STRICT | FLAGS, CONSTRAINTS, TIED, NULL } +#define SME2_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \ + { NAME, OPCODE, MASK, CLASS, OP, SME2, OPS, QUALS, \ + F_STRICT | FLAGS, 0, TIED, NULL } #define SVE2BITPERM_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \ { NAME, OPCODE, MASK, CLASS, OP, SVE2_BITPERM, OPS, QUALS, \ FLAGS | F_STRICT, 0, TIED, NULL } @@ -5278,6 +5285,24 @@ const struct aarch64_opcode aarch64_opcode_table[] = SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_Pd, SVE_Pg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0), SME_INSN ("psel", 0x25204000, 0xff20c210, sme_psel, 0, OP3 (SVE_PNd, SVE_PNg4_10, SME_PnT_Wm_imm), OP_SVE_NN_BHSD, 0, 0), + /* SME2 extensions to SME. */ + SME2_INSN ("mov", 0xc0060800, 0xffff9f01, sme2_mov, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (2), 0), + SME2_INSN ("mov", 0xc0060c00, 0xffff9f03, sme2_mov, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (4), 0), + SME2_INSN ("mov", 0xc0060000, 0xff3f1f01, sme_size_22, 0, OP2 (SME_Zdnx2, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (2), 0), + SME2_INSN ("mov", 0xc0060400, 0xff3f1f03, sme_size_22, 0, OP2 (SME_Zdnx4, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (4), 0), + SME2_INSN ("mov", 0xc0040800, 0xffff9c38, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VV_BHSD, F_OD (2), 0), + SME2_INSN ("mov", 0xc0040c00, 0xffff9c78, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VV_BHSD, F_OD (4), 0), + SME2_INSN ("mov", 0xc0040000, 0xff3f1c38, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx2), OP_SVE_VV_BHSDQ, F_OD (2), 0), + SME2_INSN ("mov", 0xc0040400, 0xff3f1c78, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx4), OP_SVE_VV_BHSDQ, F_OD (4), 0), + SME2_INSN ("mova", 0xc0060800, 0xffff9f01, sme2_mov, 0, OP2 (SME_Zdnx2, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (2), 0), + SME2_INSN ("mova", 0xc0060c00, 0xffff9f03, sme2_mov, 0, OP2 (SME_Zdnx4, SME_ZA_array_off3_5), OP_SVE_VV_BHSD, F_OD (4), 0), + SME2_INSN ("mova", 0xc0060000, 0xff3f1f01, sme_size_22, 0, OP2 (SME_Zdnx2, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (2), 0), + SME2_INSN ("mova", 0xc0060400, 0xff3f1f03, sme_size_22, 0, OP2 (SME_Zdnx4, SME_ZA_HV_idx_srcxN), OP_SVE_VV_BHSDQ, F_OD (4), 0), + SME2_INSN ("mova", 0xc0040800, 0xffff9c38, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx2), OP_SVE_VV_BHSD, F_OD (2), 0), + SME2_INSN ("mova", 0xc0040c00, 0xffff9c78, sme2_mov, 0, OP2 (SME_ZA_array_off3_0, SME_Znx4), OP_SVE_VV_BHSD, F_OD (4), 0), + SME2_INSN ("mova", 0xc0040000, 0xff3f1c38, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx2), OP_SVE_VV_BHSDQ, F_OD (2), 0), + SME2_INSN ("mova", 0xc0040400, 0xff3f1c78, sme_size_22, 0, OP2 (SME_ZA_HV_idx_destxN, SME_Znx4), OP_SVE_VV_BHSDQ, F_OD (4), 0), + /* SIMD Dot Product (optional in v8.2-A). */ DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ), DOT_INSN ("sdot", 0xe009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ), @@ -5917,6 +5942,14 @@ const struct aarch64_opcode aarch64_opcode_table[] = "an SVE vector register") \ Y(SVE_REGLIST, sve_reglist, "SVE_ZtxN", 0, F(FLD_SVE_Zt), \ "a list of SVE vector registers") \ + Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zdnx2", 2 << OPD_F_OD_LSB, \ + F(FLD_SME_Zdn2), "a list of SVE vector registers") \ + Y(SVE_REGLIST, sve_aligned_reglist, "SME_Zdnx4", 4 << OPD_F_OD_LSB, \ + F(FLD_SME_Zdn4), "a list of SVE vector registers") \ + Y(SVE_REGLIST, sve_aligned_reglist, "SME_Znx2", 2 << OPD_F_OD_LSB, \ + F(FLD_SME_Zn2), "a list of SVE vector registers") \ + Y(SVE_REGLIST, sve_aligned_reglist, "SME_Znx4", 4 << OPD_F_OD_LSB, \ + F(FLD_SME_Zn4), "a list of SVE vector registers") \ Y(SVE_REG, regno, "SME_ZAda_2b", 0, F(FLD_SME_ZAda_2b), \ "an SME ZA tile ZA0-ZA3") \ Y(SVE_REG, regno, "SME_ZAda_3b", 0, F(FLD_SME_ZAda_3b), \ @@ -5924,9 +5957,15 @@ const struct aarch64_opcode aarch64_opcode_table[] = Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_src", 0, \ F(FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_5), \ "an SME horizontal or vertical vector access register") \ + Y(ZA_ACCESS, sme_za_hv_tiles_range, "SME_ZA_HV_idx_srcxN", 0, \ + F(FLD_SME_V,FLD_SME_Rv,FLD_imm3_5), \ + "an SME horizontal or vertical vector access register") \ Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_dest", 0, \ F(FLD_SME_size_22,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \ "an SME horizontal or vertical vector access register") \ + Y(ZA_ACCESS, sme_za_hv_tiles_range, "SME_ZA_HV_idx_destxN", 0, \ + F(FLD_SME_V,FLD_SME_Rv,FLD_imm3_0), \ + "an SME horizontal or vertical vector access register") \ Y(PRED_REG, regno, "SME_Pm", 0, F(FLD_SME_Pm), \ "an SVE predicate register") \ Y(SVE_REG, imm, "SME_list_of_64bit_tiles", 0, \ @@ -5934,6 +5973,10 @@ const struct aarch64_opcode aarch64_opcode_table[] = Y(ZA_ACCESS, sme_za_hv_tiles, "SME_ZA_HV_idx_ldstr", 0, \ F(FLD_SME_size_22,FLD_index2,FLD_SME_V,FLD_SME_Rv,FLD_imm4_0), \ "an SME horizontal or vertical vector access register") \ + Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_0", 0, \ + F(FLD_SME_Rv,FLD_imm3_0), "ZA array") \ + Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off3_5", 0, \ + F(FLD_SME_Rv,FLD_imm3_5), "ZA array") \ Y(ZA_ACCESS, sme_za_array, "SME_ZA_array_off4", 0, \ F(FLD_SME_Rv,FLD_imm4_0), "ZA array") \ Y(ADDRESS, sme_addr_ri_u4xvl, "SME_ADDR_RI_U4xVL", 0 << OPD_F_OD_LSB, \ |