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-rw-r--r--bfd/ChangeLog16
-rw-r--r--bfd/elf-bfd.h6
-rw-r--r--bfd/elf-eh-frame.c83
-rw-r--r--bfd/elf64-ppc.c46
-rw-r--r--ld/ChangeLog19
-rw-r--r--ld/testsuite/ld-alpha/tlsbin.dd10
-rw-r--r--ld/testsuite/ld-alpha/tlsbin.td12
-rw-r--r--ld/testsuite/ld-alpha/tlsbinr.dd2
-rw-r--r--ld/testsuite/ld-alpha/tlspic.dd10
-rw-r--r--ld/testsuite/ld-alpha/tlspic.rd2
-rw-r--r--ld/testsuite/ld-alpha/tlspic.sd14
-rw-r--r--ld/testsuite/ld-alpha/tlspic.td12
-rw-r--r--ld/testsuite/ld-elf/eh3.d12
-rw-r--r--ld/testsuite/ld-elf/eh6.d2
-rw-r--r--ld/testsuite/ld-mips-elf/eh-frame1-n64.d76
-rw-r--r--ld/testsuite/ld-mips-elf/eh-frame2-n64.d84
-rw-r--r--ld/testsuite/ld-mips-elf/eh-frame3.d46
-rw-r--r--ld/testsuite/ld-x86-64/pr20830a.d6
-rw-r--r--ld/testsuite/ld-x86-64/pr21038a.d6
-rw-r--r--ld/testsuite/ld-x86-64/pr21038b.d6
-rw-r--r--ld/testsuite/ld-x86-64/pr21038c.d6
21 files changed, 251 insertions, 225 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 848ee7fbf24..92682d56b9c 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,19 @@
+2017-03-05 Alan Modra <amodra@gmail.com>
+
+ * elf-bfd.h (struct eh_cie_fde): Add u.cie.per_encoding_aligned8.
+ * elf-eh-frame.c (size_of_output_cie_fde): Don't align here.
+ (next_cie_fde_offset): New function.
+ (_bfd_elf_parse_eh_frame): Set u.cie.per_encoding_aligned8.
+ (_bfd_elf_discard_section_eh_frame): Align zero terminator to
+ four bytes. Align CIEs to four or eight bytes depending on
+ per_encoding_aligned8. Align FDEs according to their encoding.
+ Pad last FDE to output section alignment.
+ (_bfd_elf_write_section_eh_frame): Adjust to suit. Remove
+ assertion.
+ * elf64-ppc.c (glink_eh_frame_cie): Delete padding.
+ (ppc64_elf_size_stubs): Pad glink eh_frame as per elf-eh-frame.c.
+ (ppc64_elf_finish_dynamic_sections): Adjust to suit.
+
2017-03-02 Martin Bickel <binutils@ineranves.de>
PR ld/21212
diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index f5a8d75e5a0..9e3d6f5fed8 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -342,6 +342,10 @@ struct eh_cie_fde
make_per_encoding_relative is. */
unsigned int per_encoding_relative : 1;
+ /* True if the CIE contains personality data aligned to a
+ multiple of eight bytes. */
+ unsigned int per_encoding_aligned8 : 1;
+
/* True if we need to add an 'R' (FDE encoding) entry to the
CIE's augmentation data. */
unsigned int add_fde_encoding : 1;
@@ -350,7 +354,7 @@ struct eh_cie_fde
unsigned int merged : 1;
/* Unused bits. */
- unsigned int pad1 : 18;
+ unsigned int pad1 : 17;
} cie;
} u;
unsigned int reloc_index;
diff --git a/bfd/elf-eh-frame.c b/bfd/elf-eh-frame.c
index 1b03b9b36d4..6967f37395f 100644
--- a/bfd/elf-eh-frame.c
+++ b/bfd/elf-eh-frame.c
@@ -309,11 +309,10 @@ extra_augmentation_data_bytes (struct eh_cie_fde *entry)
return size;
}
-/* Return the size that ENTRY will have in the output. ALIGNMENT is the
- required alignment of ENTRY in bytes. */
+/* Return the size that ENTRY will have in the output. */
static unsigned int
-size_of_output_cie_fde (struct eh_cie_fde *entry, unsigned int alignment)
+size_of_output_cie_fde (struct eh_cie_fde *entry)
{
if (entry->removed)
return 0;
@@ -321,8 +320,22 @@ size_of_output_cie_fde (struct eh_cie_fde *entry, unsigned int alignment)
return 4;
return (entry->size
+ extra_augmentation_string_bytes (entry)
- + extra_augmentation_data_bytes (entry)
- + alignment - 1) & -alignment;
+ + extra_augmentation_data_bytes (entry));
+}
+
+/* Return the offset of the FDE or CIE after ENT. */
+
+static unsigned int
+next_cie_fde_offset (struct eh_cie_fde *ent,
+ struct eh_cie_fde *last,
+ asection *sec)
+{
+ while (++ent < last)
+ {
+ if (!ent->removed)
+ return ent->new_offset;
+ }
+ return sec->size;
}
/* Assume that the bytes between *ITER and END are CFA instructions.
@@ -811,6 +824,8 @@ _bfd_elf_parse_eh_frame (bfd *abfd, struct bfd_link_info *info,
{
length = -(buf - ehbuf) & (per_width - 1);
REQUIRE (skip_bytes (&buf, end, length));
+ if (per_width == 8)
+ this_inf->u.cie.per_encoding_aligned8 = 1;
}
this_inf->u.cie.personality_offset = buf - start;
ENSURE_NO_RELOCS (buf);
@@ -1326,7 +1341,7 @@ _bfd_elf_discard_section_eh_frame
struct eh_cie_fde *ent;
struct eh_frame_sec_info *sec_info;
struct eh_frame_hdr_info *hdr_info;
- unsigned int ptr_size, offset;
+ unsigned int ptr_size, offset, eh_alignment;
if (sec->sec_info_type != SEC_INFO_TYPE_EH_FRAME)
return FALSE;
@@ -1406,14 +1421,46 @@ _bfd_elf_discard_section_eh_frame
sec_info->cies = NULL;
}
+ /* It may be that some .eh_frame input section has greater alignment
+ than other .eh_frame sections. In that case we run the risk of
+ padding with zeros before that section, which would be seen as a
+ zero terminator. Alignment padding must be added *inside* the
+ last FDE instead. For other FDEs we align according to their
+ encoding, in order to align FDE address range entries naturally. */
offset = 0;
for (ent = sec_info->entry; ent < sec_info->entry + sec_info->count; ++ent)
if (!ent->removed)
{
+ eh_alignment = 4;
+ if (ent->size == 4)
+ ;
+ else if (ent->cie)
+ {
+ if (ent->u.cie.per_encoding_aligned8)
+ eh_alignment = 8;
+ }
+ else
+ {
+ eh_alignment = get_DW_EH_PE_width (ent->fde_encoding, ptr_size);
+ if (eh_alignment < 4)
+ eh_alignment = 4;
+ }
+ offset = (offset + eh_alignment - 1) & -eh_alignment;
ent->new_offset = offset;
- offset += size_of_output_cie_fde (ent, ptr_size);
+ offset += size_of_output_cie_fde (ent);
}
+ /* Pad the last FDE out to the output section alignment if there are
+ following sections, in order to ensure no padding between this
+ section and the next. (Relies on the output section alignment
+ being the maximum of all input sections alignments, which is the
+ case unless someone is overriding alignment via scripts.) */
+ eh_alignment = 4;
+ if (sec->map_head.s != NULL
+ && (sec->map_head.s->size != 4
+ || sec->map_head.s->map_head.s != NULL))
+ eh_alignment = 1 << sec->output_section->alignment_power;
+ offset = (offset + eh_alignment - 1) & -eh_alignment;
sec->rawsize = sec->size;
sec->size = offset;
return offset != sec->rawsize;
@@ -1732,8 +1779,7 @@ _bfd_elf_write_section_eh_frame (bfd *abfd,
struct elf_link_hash_table *htab;
struct eh_frame_hdr_info *hdr_info;
unsigned int ptr_size;
- struct eh_cie_fde *ent;
- bfd_size_type sec_size;
+ struct eh_cie_fde *ent, *last_ent;
if (sec->sec_info_type != SEC_INFO_TYPE_EH_FRAME)
/* FIXME: octets_per_byte. */
@@ -1771,7 +1817,8 @@ _bfd_elf_write_section_eh_frame (bfd *abfd,
if (!ent->removed && ent->new_offset < ent->offset)
memmove (contents + ent->new_offset, contents + ent->offset, ent->size);
- for (ent = sec_info->entry; ent < sec_info->entry + sec_info->count; ++ent)
+ last_ent = sec_info->entry + sec_info->count;
+ for (ent = sec_info->entry; ent < last_ent; ++ent)
{
unsigned char *buf, *end;
unsigned int new_size;
@@ -1782,13 +1829,13 @@ _bfd_elf_write_section_eh_frame (bfd *abfd,
if (ent->size == 4)
{
/* Any terminating FDE must be at the end of the section. */
- BFD_ASSERT (ent == sec_info->entry + sec_info->count - 1);
+ BFD_ASSERT (ent == last_ent - 1);
continue;
}
buf = contents + ent->new_offset;
end = buf + ent->size;
- new_size = size_of_output_cie_fde (ent, ptr_size);
+ new_size = next_cie_fde_offset (ent, last_ent, sec) - ent->new_offset;
/* Update the size. It may be shrinked. */
bfd_put_32 (abfd, new_size - 4, buf);
@@ -2059,18 +2106,6 @@ _bfd_elf_write_section_eh_frame (bfd *abfd,
}
}
- /* We don't align the section to its section alignment since the
- runtime library only expects all CIE/FDE records aligned at
- the pointer size. _bfd_elf_discard_section_eh_frame should
- have padded CIE/FDE records to multiple of pointer size with
- size_of_output_cie_fde. */
- sec_size = sec->size;
- if (sec_info->count != 0
- && sec_info->entry[sec_info->count - 1].size == 4)
- sec_size -= 4;
- if ((sec_size % ptr_size) != 0)
- abort ();
-
/* FIXME: octets_per_byte. */
return bfd_set_section_contents (abfd, sec->output_section,
contents, (file_ptr) sec->output_offset,
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 5ecd1a3ca12..84cb2140872 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -12232,8 +12232,7 @@ static const unsigned char glink_eh_frame_cie[] =
65, /* RA reg. */
1, /* Augmentation size. */
DW_EH_PE_pcrel | DW_EH_PE_sdata4, /* FDE encoding. */
- DW_CFA_def_cfa, 1, 0, /* def_cfa: r1 offset 0. */
- 0, 0, 0, 0
+ DW_CFA_def_cfa, 1, 0 /* def_cfa: r1 offset 0. */
};
/* Stripping output sections is normally done before dynamic section
@@ -12686,21 +12685,19 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
&& !bfd_is_abs_section (htab->glink_eh_frame->output_section)
&& htab->glink_eh_frame->output_section->size != 0)
{
- size_t size = 0, align;
+ size_t size = 0, align = 4;
for (stub_sec = htab->params->stub_bfd->sections;
stub_sec != NULL;
stub_sec = stub_sec->next)
if ((stub_sec->flags & SEC_LINKER_CREATED) == 0)
- size += 24;
+ size += (17 + align - 1) & -align;
if (htab->glink != NULL && htab->glink->size != 0)
- size += 24;
+ size += (24 + align - 1) & -align;
if (size != 0)
- size += sizeof (glink_eh_frame_cie);
- align = 1;
- align <<= htab->glink_eh_frame->output_section->alignment_power;
- align -= 1;
- size = (size + align) & ~align;
+ size += (sizeof (glink_eh_frame_cie) + align - 1) & -align;
+ align = 1ul << htab->glink_eh_frame->output_section->alignment_power;
+ size = (size + align - 1) & -align;
htab->glink_eh_frame->rawsize = htab->glink_eh_frame->size;
htab->glink_eh_frame->size = size;
}
@@ -12745,12 +12742,13 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
return FALSE;
htab->glink_eh_frame->contents = p;
last_fde = p;
+ align = 4;
memcpy (p, glink_eh_frame_cie, sizeof (glink_eh_frame_cie));
/* CIE length (rewrite in case little-endian). */
- last_fde_len = sizeof (glink_eh_frame_cie) - 4;
+ last_fde_len = ((sizeof (glink_eh_frame_cie) + align - 1) & -align) - 4;
bfd_put_32 (htab->elf.dynobj, last_fde_len, p);
- p += sizeof (glink_eh_frame_cie);
+ p += last_fde_len + 4;
for (stub_sec = htab->params->stub_bfd->sections;
stub_sec != NULL;
@@ -12758,9 +12756,9 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
if ((stub_sec->flags & SEC_LINKER_CREATED) == 0)
{
last_fde = p;
- last_fde_len = 20;
+ last_fde_len = ((17 + align - 1) & -align) - 4;
/* FDE length. */
- bfd_put_32 (htab->elf.dynobj, 20, p);
+ bfd_put_32 (htab->elf.dynobj, last_fde_len, p);
p += 4;
/* CIE pointer. */
val = p - htab->glink_eh_frame->contents;
@@ -12774,14 +12772,14 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
/* Augmentation. */
p += 1;
/* Pad. */
- p += 7;
+ p += ((17 + align - 1) & -align) - 17;
}
if (htab->glink != NULL && htab->glink->size != 0)
{
last_fde = p;
- last_fde_len = 20;
+ last_fde_len = ((24 + align - 1) & -align) - 4;
/* FDE length. */
- bfd_put_32 (htab->elf.dynobj, 20, p);
+ bfd_put_32 (htab->elf.dynobj, last_fde_len, p);
p += 4;
/* CIE pointer. */
val = p - htab->glink_eh_frame->contents;
@@ -12802,15 +12800,14 @@ ppc64_elf_size_stubs (struct bfd_link_info *info)
*p++ = DW_CFA_advance_loc + 4;
*p++ = DW_CFA_restore_extended;
*p++ = 65;
+ p += ((24 + align - 1) & -align) - 24;
}
/* Subsume any padding into the last FDE if user .eh_frame
sections are aligned more than glink_eh_frame. Otherwise any
zero padding will be seen as a terminator. */
+ align = 1ul << htab->glink_eh_frame->output_section->alignment_power;
size = p - htab->glink_eh_frame->contents;
- align = 1;
- align <<= htab->glink_eh_frame->output_section->alignment_power;
- align -= 1;
- pad = ((size + align) & ~align) - size;
+ pad = ((size + align - 1) & -align) - size;
htab->glink_eh_frame->size = size + pad;
bfd_put_32 (htab->elf.dynobj, last_fde_len + pad, last_fde);
}
@@ -15667,8 +15664,10 @@ ppc64_elf_finish_dynamic_sections (bfd *output_bfd,
bfd_vma val;
bfd_byte *p;
asection *stub_sec;
+ size_t align = 4;
- p = htab->glink_eh_frame->contents + sizeof (glink_eh_frame_cie);
+ p = htab->glink_eh_frame->contents;
+ p += (sizeof (glink_eh_frame_cie) + align - 1) & -align;
for (stub_sec = htab->params->stub_bfd->sections;
stub_sec != NULL;
stub_sec = stub_sec->next)
@@ -15698,7 +15697,7 @@ ppc64_elf_finish_dynamic_sections (bfd *output_bfd,
/* Augmentation. */
p += 1;
/* Pad. */
- p += 7;
+ p += ((17 + align - 1) & -align) - 17;
}
if (htab->glink != NULL && htab->glink->size != 0)
{
@@ -15728,6 +15727,7 @@ ppc64_elf_finish_dynamic_sections (bfd *output_bfd,
p += 1;
/* Ops. */
p += 7;
+ p += ((24 + align - 1) & -align) - 24;
}
if (htab->glink_eh_frame->sec_info_type == SEC_INFO_TYPE_EH_FRAME
diff --git a/ld/ChangeLog b/ld/ChangeLog
index db2354a93ad..cbe44a2f79a 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,22 @@
+2017-03-05 Alan Modra <amodra@gmail.com>
+
+ * testsuite/ld-elf/eh3.d: Adjust for eh_frame alignment change.
+ * testsuite/ld-elf/eh6.d: Likewise.
+ * testsuite/ld-alpha/tlsbin.dd: Likewise.
+ * testsuite/ld-alpha/tlsbin.td: Likewise.
+ * testsuite/ld-alpha/tlsbinr.dd: Likewise.
+ * testsuite/ld-alpha/tlspic.dd: Likewise.
+ * testsuite/ld-alpha/tlspic.rd: Likewise.
+ * testsuite/ld-alpha/tlspic.sd: Likewise.
+ * testsuite/ld-alpha/tlspic.td: Likewise.
+ * testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise.
+ * testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise.
+ * testsuite/ld-mips-elf/eh-frame3.d: Likewise.
+ * testsuite/ld-x86-64/pr20830a.d: Likewise.
+ * testsuite/ld-x86-64/pr21038a.d: Likewise.
+ * testsuite/ld-x86-64/pr21038b.d: Likewise.
+ * testsuite/ld-x86-64/pr21038c.d: Likewise.
+
2017-03-03 Max Bolingbroke <batterseapower@hotmail.com>
PR 12969
diff --git a/ld/testsuite/ld-alpha/tlsbin.dd b/ld/testsuite/ld-alpha/tlsbin.dd
index 26f1797e75c..eab2fcde9fc 100644
--- a/ld/testsuite/ld-alpha/tlsbin.dd
+++ b/ld/testsuite/ld-alpha/tlsbin.dd
@@ -12,30 +12,30 @@ Disassembly of section \.text:
0+120001000 <fn2>:
120001000: 02 00 bb 27 ldah gp,2\(t12\)
- 120001004: b0 82 bd 23 lda gp,-32080\(gp\)
+ 120001004: a8 82 bd 23 lda gp,-32088\(gp\)
120001008: 3e 15 c2 43 subq sp,0x10,sp
12000100c: 00 00 5e b7 stq ra,0\(sp\)
120001010: 18 80 1d 22 lda a0,-32744\(gp\)
120001014: 08 80 7d a7 ldq t12,-32760\(gp\)
120001018: 00 40 5b 6b jsr ra,\(t12\),12000101c <.*>
12000101c: 02 00 ba 27 ldah gp,2\(ra\)
- 120001020: 94 82 bd 23 lda gp,-32108\(gp\)
+ 120001020: 8c 82 bd 23 lda gp,-32116\(gp\)
120001024: 38 80 1d 22 lda a0,-32712\(gp\)
120001028: 08 80 7d a7 ldq t12,-32760\(gp\)
12000102c: 00 40 5b 6b jsr ra,\(t12\),120001030 <.*>
120001030: 02 00 ba 27 ldah gp,2\(ra\)
- 120001034: 80 82 bd 23 lda gp,-32128\(gp\)
+ 120001034: 78 82 bd 23 lda gp,-32136\(gp\)
120001038: 28 80 1d 22 lda a0,-32728\(gp\)
12000103c: 08 80 7d a7 ldq t12,-32760\(gp\)
120001040: 00 40 5b 6b jsr ra,\(t12\),120001044 <.*>
120001044: 02 00 ba 27 ldah gp,2\(ra\)
- 120001048: 6c 82 bd 23 lda gp,-32148\(gp\)
+ 120001048: 64 82 bd 23 lda gp,-32156\(gp\)
12000104c: 21 00 20 20 lda t0,33\(v0\)
120001050: 28 80 1d 22 lda a0,-32728\(gp\)
120001054: 08 80 7d a7 ldq t12,-32760\(gp\)
120001058: 00 40 5b 6b jsr ra,\(t12\),12000105c <.*>
12000105c: 02 00 ba 27 ldah gp,2\(ra\)
- 120001060: 54 82 bd 23 lda gp,-32172\(gp\)
+ 120001060: 4c 82 bd 23 lda gp,-32180\(gp\)
120001064: 40 00 20 20 lda t0,64\(v0\)
120001068: 46 00 20 20 lda t0,70\(v0\)
12000106c: 00 00 20 24 ldah t0,0\(v0\)
diff --git a/ld/testsuite/ld-alpha/tlsbin.td b/ld/testsuite/ld-alpha/tlsbin.td
index 8bd7a6cef0d..b5772392419 100644
--- a/ld/testsuite/ld-alpha/tlsbin.td
+++ b/ld/testsuite/ld-alpha/tlsbin.td
@@ -9,9 +9,9 @@
.*: +file format elf64-alpha
Contents of section .tdata:
- 1?200110f0 11000000 12000000 13000000 14000000 .*
- 1?20011100 15000000 16000000 17000000 18000000 .*
- 1?20011110 41000000 42000000 43000000 44000000 .*
- 1?20011120 45000000 46000000 47000000 48000000 .*
- 1?20011130 01010000 02010000 03010000 04010000 .*
- 1?20011140 05010000 06010000 07010000 08010000 .*
+ 1?200110e8 11000000 12000000 13000000 14000000 .*
+ 1?200110f8 15000000 16000000 17000000 18000000 .*
+ 1?20011108 41000000 42000000 43000000 44000000 .*
+ 1?20011118 45000000 46000000 47000000 48000000 .*
+ 1?20011128 01010000 02010000 03010000 04010000 .*
+ 1?20011138 05010000 06010000 07010000 08010000 .*
diff --git a/ld/testsuite/ld-alpha/tlsbinr.dd b/ld/testsuite/ld-alpha/tlsbinr.dd
index ee55fa99406..44b50598158 100644
--- a/ld/testsuite/ld-alpha/tlsbinr.dd
+++ b/ld/testsuite/ld-alpha/tlsbinr.dd
@@ -12,7 +12,7 @@ Disassembly of section \.text:
0+120001000 <fn2>:
120001000: 02 00 bb 27 ldah gp,2\(t12\)
- 120001004: a0 82 bd 23 lda gp,-32096\(gp\)
+ 120001004: 98 82 bd 23 lda gp,-32104\(gp\)
120001008: 3e 15 c2 43 subq sp,0x10,sp
12000100c: 00 00 5e b7 stq ra,0\(sp\)
120001010: 08 80 1d a6 ldq a0,-32760\(gp\)
diff --git a/ld/testsuite/ld-alpha/tlspic.dd b/ld/testsuite/ld-alpha/tlspic.dd
index 4bd040c0354..bf645a4e04d 100644
--- a/ld/testsuite/ld-alpha/tlspic.dd
+++ b/ld/testsuite/ld-alpha/tlspic.dd
@@ -12,7 +12,7 @@ Disassembly of section .text:
0+1000 <fn1>:
1000: 02 00 bb 27 ldah gp,2\(t12\)
- 1004: 90 82 bd 23 lda gp,-32112\(gp\)
+ 1004: 88 82 bd 23 lda gp,-32120\(gp\)
1008: 3e 15 c2 43 subq sp,0x10,sp
100c: 00 00 5e b7 stq ra,0\(sp\)
1010: 08 00 3e b5 stq s0,8\(sp\)
@@ -22,23 +22,23 @@ Disassembly of section .text:
1020: 00 80 7d a7 ldq t12,-32768\(gp\)
1024: 00 40 5b 6b jsr ra,\(t12\),1028 <.*>
1028: 02 00 ba 27 ldah gp,2\(ra\)
- 102c: 68 82 bd 23 lda gp,-32152\(gp\)
+ 102c: 60 82 bd 23 lda gp,-32160\(gp\)
1030: 30 80 1d 22 lda a0,-32720\(gp\)
1034: 00 80 7d a7 ldq t12,-32768\(gp\)
1038: 00 40 5b 6b jsr ra,\(t12\),103c <.*>
103c: 02 00 ba 27 ldah gp,2\(ra\)
- 1040: 54 82 bd 23 lda gp,-32172\(gp\)
+ 1040: 4c 82 bd 23 lda gp,-32180\(gp\)
1044: 40 80 1d 22 lda a0,-32704\(gp\)
1048: 00 80 7d a7 ldq t12,-32768\(gp\)
104c: 00 40 5b 6b jsr ra,\(t12\),1050 <.*>
1050: 02 00 ba 27 ldah gp,2\(ra\)
- 1054: 40 82 bd 23 lda gp,-32192\(gp\)
+ 1054: 38 82 bd 23 lda gp,-32200\(gp\)
1058: 21 00 20 20 lda t0,33\(v0\)
105c: 40 80 1d 22 lda a0,-32704\(gp\)
1060: 00 80 7d a7 ldq t12,-32768\(gp\)
1064: 00 40 5b 6b jsr ra,\(t12\),1068 <.*>
1068: 02 00 ba 27 ldah gp,2\(ra\)
- 106c: 28 82 bd 23 lda gp,-32216\(gp\)
+ 106c: 20 82 bd 23 lda gp,-32224\(gp\)
1070: 40 00 20 20 lda t0,64\(v0\)
1074: 62 00 20 20 lda t0,98\(v0\)
1078: 00 00 20 24 ldah t0,0\(v0\)
diff --git a/ld/testsuite/ld-alpha/tlspic.rd b/ld/testsuite/ld-alpha/tlspic.rd
index f1fb974e677..4aeb5e360f3 100644
--- a/ld/testsuite/ld-alpha/tlspic.rd
+++ b/ld/testsuite/ld-alpha/tlspic.rd
@@ -37,7 +37,7 @@ Program Headers:
+LOAD +0x0+ 0x0+ 0x0+ 0x[0-9a-f]+ 0x[0-9a-f]+ R E 0x10000
+LOAD +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RW 0x10000
+DYNAMIC +0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ 0x[0-9a-f]+ RW +0x8
- +TLS +0x0+10e0 0x0+110e0 0x0+110e0 0x0+60 0x0+80 R +0x4
+ +TLS +0x0+10d8 0x0+110d8 0x0+110d8 0x0+60 0x0+80 R +0x4
#...
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 7 entries:
diff --git a/ld/testsuite/ld-alpha/tlspic.sd b/ld/testsuite/ld-alpha/tlspic.sd
index 573bc3d457a..7d02cf1ce5b 100644
--- a/ld/testsuite/ld-alpha/tlspic.sd
+++ b/ld/testsuite/ld-alpha/tlspic.sd
@@ -9,10 +9,10 @@
.*: +file format elf64-alpha
Contents of section .got:
- 11280 00000000 00000000 00000000 00000000 .*
- 11290 44040000 00000000 00000000 00000000 .*
- 112a0 00000000 00000000 71000000 00000000 .*
- 112b0 00000000 00000000 00000000 00000000 .*
- 112c0 00000000 00000000 44000000 00000000 .*
- 112d0 00000000 00000000 00000000 00000000 .*
- 112e0 00000000 00000000 .*
+ 11278 00000000 00000000 00000000 00000000 .*
+ 11288 44040000 00000000 00000000 00000000 .*
+ 11298 00000000 00000000 71000000 00000000 .*
+ 112a8 00000000 00000000 00000000 00000000 .*
+ 112b8 00000000 00000000 44000000 00000000 .*
+ 112c8 00000000 00000000 00000000 00000000 .*
+ 112d8 00000000 00000000 .*
diff --git a/ld/testsuite/ld-alpha/tlspic.td b/ld/testsuite/ld-alpha/tlspic.td
index cd09609e6b1..8ef7f3d7898 100644
--- a/ld/testsuite/ld-alpha/tlspic.td
+++ b/ld/testsuite/ld-alpha/tlspic.td
@@ -9,9 +9,9 @@
.*: +file format elf64-alpha
Contents of section .tdata:
- 110e0 11000000 12000000 13000000 14000000 .*
- 110f0 15000000 16000000 17000000 18000000 .*
- 11100 41000000 42000000 43000000 44000000 .*
- 11110 45000000 46000000 47000000 48000000 .*
- 11120 01010000 02010000 03010000 04010000 .*
- 11130 05010000 06010000 07010000 08010000 .*
+ 110d8 11000000 12000000 13000000 14000000 .*
+ 110e8 15000000 16000000 17000000 18000000 .*
+ 110f8 41000000 42000000 43000000 44000000 .*
+ 11108 45000000 46000000 47000000 48000000 .*
+ 11118 01010000 02010000 03010000 04010000 .*
+ 11128 05010000 06010000 07010000 08010000 .*
diff --git a/ld/testsuite/ld-elf/eh3.d b/ld/testsuite/ld-elf/eh3.d
index 6ac584a6222..38113411582 100644
--- a/ld/testsuite/ld-elf/eh3.d
+++ b/ld/testsuite/ld-elf/eh3.d
@@ -23,12 +23,20 @@ Contents of the .eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0018 0+001c 0+001c FDE cie=0+0000 pc=0+400078\.\.0+400090
+0+0018 0+0024 0+001c FDE cie=0+0000 pc=0+400078\.\.0+400090
DW_CFA_advance_loc: 8 to 0+400080
DW_CFA_def_cfa_offset: 16
DW_CFA_offset: r6 \(rbp\) at cfa-16
DW_CFA_advance_loc: 8 to 0+400088
DW_CFA_def_cfa_register: r6 \(rbp\)
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
+ DW_CFA_nop
-0+0038 ZERO terminator
+0+0040 ZERO terminator
#pass
diff --git a/ld/testsuite/ld-elf/eh6.d b/ld/testsuite/ld-elf/eh6.d
index 475b2a7c69a..69c4c85acd1 100644
--- a/ld/testsuite/ld-elf/eh6.d
+++ b/ld/testsuite/ld-elf/eh6.d
@@ -8,7 +8,7 @@
#...
Contents of the .eh_frame section:
-0+0000 0+001[4c] 0+0000 CIE
+0+0000 0+001[48] 0+0000 CIE
Version: 1
Augmentation: "zPR"
Code alignment factor: 1
diff --git a/ld/testsuite/ld-mips-elf/eh-frame1-n64.d b/ld/testsuite/ld-mips-elf/eh-frame1-n64.d
index cdc43bcf684..38022775ec4 100644
--- a/ld/testsuite/ld-mips-elf/eh-frame1-n64.d
+++ b/ld/testsuite/ld-mips-elf/eh-frame1-n64.d
@@ -12,25 +12,25 @@ Relocation section '\.rel\.dyn' .*:
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *
# Initial PCs for the FDEs attached to CIE 0x120
-0+00030148 [0-9a-f]+ R_MIPS_REL32 *
+0+00030140 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030168 [0-9a-f]+ R_MIPS_REL32 *
+0+00030160 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030308 [0-9a-f]+ R_MIPS_REL32 *
+0+00030300 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030328 [0-9a-f]+ R_MIPS_REL32 *
+0+00030320 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+000300cb [0-9a-f]+ R_MIPS_REL32 0+00+00+00 foo
+0+000300c7 [0-9a-f]+ R_MIPS_REL32 0+00+00+00 foo
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030138 [0-9a-f]+ R_MIPS_REL32 0+00+00+00 foo
+0+00030130 [0-9a-f]+ R_MIPS_REL32 0+00+00+00 foo
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030192 [0-9a-f]+ R_MIPS_REL32 0+00+00+00 foo
+0+0003018a [0-9a-f]+ R_MIPS_REL32 0+00+00+00 foo
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
Contents of the \.eh_frame section:
@@ -90,16 +90,12 @@ Contents of the \.eh_frame section:
DW_CFA_nop
# basic4 removed
-0+0098 0+001c 0+009c FDE cie=0+0000 pc=0+0200a0..0+0200f0
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+0098 0+0018 0+009c FDE cie=0+0000 pc=0+0200a0..0+0200f0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-0+00b8 0+0024 0+0000 CIE
+0+00b4 0+0020 0+0000 CIE
Version: 1
Augmentation: "zRP"
Code alignment factor: 1
@@ -116,12 +112,8 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+0000
DW_CFA_nop
DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-0+00e0 0+001c 0+002c FDE cie=0+00b8 pc=0+0200f0..0+020100
+0+00d8 0+001c 0+0028 FDE cie=0+00b4 pc=0+0200f0..0+020100
DW_CFA_advance_loc: 0 to 0+0200f0
DW_CFA_advance_loc: 0 to 0+0200f0
DW_CFA_advance_loc: 0 to 0+0200f0
@@ -130,7 +122,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+0200f0
DW_CFA_advance_loc: 0 to 0+0200f0
-0+0100 0+001c 0+004c FDE cie=0+00b8 pc=0+020100..0+020120
+0+00f8 0+001c 0+0048 FDE cie=0+00b4 pc=0+020100..0+020120
DW_CFA_advance_loc: 0 to 0+020100
DW_CFA_advance_loc: 0 to 0+020100
DW_CFA_advance_loc: 0 to 0+020100
@@ -139,7 +131,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020100
DW_CFA_advance_loc: 0 to 0+020100
-0+0120 0+001c 0+0000 CIE
+0+0118 0+001c 0+0000 CIE
Version: 1
Augmentation: "zP"
Code alignment factor: 1
@@ -148,7 +140,7 @@ Contents of the \.eh_frame section:
Augmentation data: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0+0140 0+001c 0+0024 FDE cie=0+0120 pc=0+020120..0+020130
+0+0138 0+001c 0+0024 FDE cie=0+0118 pc=0+020120..0+020130
DW_CFA_advance_loc: 0 to 0+020120
DW_CFA_advance_loc: 0 to 0+020120
DW_CFA_advance_loc: 0 to 0+020120
@@ -157,7 +149,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020120
DW_CFA_advance_loc: 0 to 0+020120
-0+0160 0+001c 0+0044 FDE cie=0+0120 pc=0+020130..0+020150
+0+0158 0+001c 0+0044 FDE cie=0+0118 pc=0+020130..0+020150
DW_CFA_advance_loc: 0 to 0+020130
DW_CFA_advance_loc: 0 to 0+020130
DW_CFA_advance_loc: 0 to 0+020130
@@ -166,7 +158,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020130
DW_CFA_advance_loc: 0 to 0+020130
-0+0180 0+001c 0+0000 CIE
+0+0178 0+001c 0+0000 CIE
Version: 1
Augmentation: "zPR"
Code alignment factor: 1
@@ -180,7 +172,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+0000
DW_CFA_advance_loc: 0 to 0+0000
-0+01a0 0+001c 0+0024 FDE cie=0+0180 pc=0+020150..0+020160
+0+0198 0+001c 0+0024 FDE cie=0+0178 pc=0+020150..0+020160
DW_CFA_advance_loc: 0 to 0+020150
DW_CFA_advance_loc: 0 to 0+020150
DW_CFA_advance_loc: 0 to 0+020150
@@ -191,7 +183,7 @@ Contents of the \.eh_frame section:
# FDE for .discard removed
# zPR2 removed
-0+01c0 0+001c 0+0044 FDE cie=0+0180 pc=0+020160..0+020190
+0+01b8 0+001c 0+0044 FDE cie=0+0178 pc=0+020160..0+020190
DW_CFA_advance_loc: 0 to 0+020160
DW_CFA_advance_loc: 0 to 0+020160
DW_CFA_advance_loc: 0 to 0+020160
@@ -200,7 +192,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020160
DW_CFA_advance_loc: 0 to 0+020160
-0+01e0 0+001c 0+0064 FDE cie=0+0180 pc=0+020190..0+0201d0
+0+01d8 0+001c 0+0064 FDE cie=0+0178 pc=0+020190..0+0201d0
DW_CFA_advance_loc: 0 to 0+020190
DW_CFA_advance_loc: 0 to 0+020190
DW_CFA_advance_loc: 0 to 0+020190
@@ -209,7 +201,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020190
DW_CFA_advance_loc: 0 to 0+020190
-0+0200 0+001c 0+0204 FDE cie=0+0000 pc=0+0201d0..0+0201e0
+0+01f8 0+001c 0+01fc FDE cie=0+0000 pc=0+0201d0..0+0201e0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -219,7 +211,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
# basic1 removed, followed by repeat of above
-0+0220 0+001c 0+0224 FDE cie=0+0000 pc=0+0201e0..0+0201f0
+0+0218 0+001c 0+021c FDE cie=0+0000 pc=0+0201e0..0+0201f0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -228,7 +220,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0240 0+001c 0+0244 FDE cie=0+0000 pc=0+0201f0..0+020210
+0+0238 0+001c 0+023c FDE cie=0+0000 pc=0+0201f0..0+020210
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -237,7 +229,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0260 0+001c 0+0264 FDE cie=0+0000 pc=0+020210..0+020240
+0+0258 0+001c 0+025c FDE cie=0+0000 pc=0+020210..0+020240
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -246,7 +238,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0280 0+001c 0+0284 FDE cie=0+0000 pc=0+020240..0+020280
+0+0278 0+001c 0+027c FDE cie=0+0000 pc=0+020240..0+020280
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -255,7 +247,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+02a0 0+001c 0+02a4 FDE cie=0+0000 pc=0+020280..0+0202d0
+0+0298 0+001c 0+029c FDE cie=0+0000 pc=0+020280..0+0202d0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -264,7 +256,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+02c0 0+001c 0+020c FDE cie=0+00b8 pc=0+0202d0..0+0202e0
+0+02b8 0+001c 0+0208 FDE cie=0+00b4 pc=0+0202d0..0+0202e0
DW_CFA_advance_loc: 0 to 0+0202d0
DW_CFA_advance_loc: 0 to 0+0202d0
DW_CFA_advance_loc: 0 to 0+0202d0
@@ -273,7 +265,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+0202d0
DW_CFA_advance_loc: 0 to 0+0202d0
-0+02e0 0+001c 0+022c FDE cie=0+00b8 pc=0+0202e0..0+020300
+0+02d8 0+001c 0+0228 FDE cie=0+00b4 pc=0+0202e0..0+020300
DW_CFA_advance_loc: 0 to 0+0202e0
DW_CFA_advance_loc: 0 to 0+0202e0
DW_CFA_advance_loc: 0 to 0+0202e0
@@ -282,7 +274,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+0202e0
DW_CFA_advance_loc: 0 to 0+0202e0
-0+0300 0+001c 0+01e4 FDE cie=0+0120 pc=0+020300..0+020310
+0+02f8 0+001c 0+01e4 FDE cie=0+0118 pc=0+020300..0+020310
DW_CFA_advance_loc: 0 to 0+020300
DW_CFA_advance_loc: 0 to 0+020300
DW_CFA_advance_loc: 0 to 0+020300
@@ -291,7 +283,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020300
DW_CFA_advance_loc: 0 to 0+020300
-0+0320 0+001c 0+0204 FDE cie=0+0120 pc=0+020310..0+020330
+0+0318 0+001c 0+0204 FDE cie=0+0118 pc=0+020310..0+020330
DW_CFA_advance_loc: 0 to 0+020310
DW_CFA_advance_loc: 0 to 0+020310
DW_CFA_advance_loc: 0 to 0+020310
@@ -300,7 +292,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020310
DW_CFA_advance_loc: 0 to 0+020310
-0+0340 0+001c 0+01c4 FDE cie=0+0180 pc=0+020330..0+020340
+0+0338 0+001c 0+01c4 FDE cie=0+0178 pc=0+020330..0+020340
DW_CFA_advance_loc: 0 to 0+020330
DW_CFA_advance_loc: 0 to 0+020330
DW_CFA_advance_loc: 0 to 0+020330
@@ -309,7 +301,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020330
DW_CFA_advance_loc: 0 to 0+020330
-0+0360 0+001c 0+01e4 FDE cie=0+0180 pc=0+020340..0+020370
+0+0358 0+001c 0+01e4 FDE cie=0+0178 pc=0+020340..0+020370
DW_CFA_advance_loc: 0 to 0+020340
DW_CFA_advance_loc: 0 to 0+020340
DW_CFA_advance_loc: 0 to 0+020340
@@ -318,7 +310,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020340
DW_CFA_advance_loc: 0 to 0+020340
-0+0380 0+001c 0+0204 FDE cie=0+0180 pc=0+020370..0+0203b0
+0+0378 0+001c 0+0204 FDE cie=0+0178 pc=0+020370..0+0203b0
DW_CFA_advance_loc: 0 to 0+020370
DW_CFA_advance_loc: 0 to 0+020370
DW_CFA_advance_loc: 0 to 0+020370
@@ -327,11 +319,7 @@ Contents of the \.eh_frame section:
DW_CFA_advance_loc: 0 to 0+020370
DW_CFA_advance_loc: 0 to 0+020370
-0+03a0 0+001c 0+03a4 FDE cie=0+0000 pc=0+0203b0..0+0203c0
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+0398 0+0018 0+039c FDE cie=0+0000 pc=0+0203b0..0+0203c0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
diff --git a/ld/testsuite/ld-mips-elf/eh-frame2-n64.d b/ld/testsuite/ld-mips-elf/eh-frame2-n64.d
index add403e4e4a..505e6dba3d4 100644
--- a/ld/testsuite/ld-mips-elf/eh-frame2-n64.d
+++ b/ld/testsuite/ld-mips-elf/eh-frame2-n64.d
@@ -12,25 +12,25 @@ Relocation section '\.rel\.dyn' .*:
*Type2: R_MIPS_NONE *
*Type3: R_MIPS_NONE *
# Initial PCs for the FDEs attached to CIE 0x118
-0+00030140 [0-9a-f]+ R_MIPS_REL32 *
+0+00030138 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030160 [0-9a-f]+ R_MIPS_REL32 *
+0+00030158 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030300 [0-9a-f]+ R_MIPS_REL32 *
+0+000302f0 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030320 [0-9a-f]+ R_MIPS_REL32 *
+0+00030310 [0-9a-f]+ R_MIPS_REL32 *
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+000300cb [0-9a-f]+ R_MIPS_REL32 0+000 foo
+0+000300c7 [0-9a-f]+ R_MIPS_REL32 0+000 foo
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+00030130 [0-9a-f]+ R_MIPS_REL32 0+000 foo
+0+00030128 [0-9a-f]+ R_MIPS_REL32 0+000 foo
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
-0+0003018a [0-9a-f]+ R_MIPS_REL32 0+000 foo
+0+0003017e [0-9a-f]+ R_MIPS_REL32 0+000 foo
*Type2: R_MIPS_64 *
*Type3: R_MIPS_NONE *
Contents of the \.eh_frame section:
@@ -90,16 +90,12 @@ Contents of the \.eh_frame section:
DW_CFA_nop
# basic4 removed
-0+0098 0+001c 0+009c FDE cie=0+0000 pc=0+0200a0..0+0200f0
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+0098 0+0018 0+009c FDE cie=0+0000 pc=0+0200a0..0+0200f0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-0+00b8 0+001c 0+0000 CIE
+0+00b4 0+0018 0+0000 CIE
Version: 1
Augmentation: "zRP"
Code alignment factor: 1
@@ -108,12 +104,8 @@ Contents of the \.eh_frame section:
Augmentation data: 1c 00 00 00 00 00 00 00 00 00
DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-0+00d8 0+001c 0+0024 FDE cie=0+00b8 pc=0+0200f0..0+020100
+0+00d0 0+001c 0+0020 FDE cie=0+00b4 pc=0+0200f0..0+020100
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -122,7 +114,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+00f8 0+001c 0+0044 FDE cie=0+00b8 pc=0+020100..0+020120
+0+00f0 0+001c 0+0040 FDE cie=0+00b4 pc=0+020100..0+020120
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -131,7 +123,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0118 0+001c 0+0000 CIE
+0+0110 0+001c 0+0000 CIE
Version: 1
Augmentation: "zP"
Code alignment factor: 1
@@ -140,7 +132,7 @@ Contents of the \.eh_frame section:
Augmentation data: 50 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-0+0138 0+001c 0+0024 FDE cie=0+0118 pc=0+020120..0+020130
+0+0130 0+001c 0+0024 FDE cie=0+0110 pc=0+020120..0+020130
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -149,16 +141,12 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0158 0+001c 0+0044 FDE cie=0+0118 pc=0+020130..0+020150
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+0150 0+0018 0+0044 FDE cie=0+0110 pc=0+020130..0+020150
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-0+0178 0+001c 0+0000 CIE
+0+016c 0+0018 0+0000 CIE
Version: 1
Augmentation: "zPR"
Code alignment factor: 1
@@ -167,12 +155,8 @@ Contents of the \.eh_frame section:
Augmentation data: 00 00 00 00 00 00 00 00 00 1c
DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-0+0198 0+001c 0+0024 FDE cie=0+0178 pc=0+020150..0+020160
+0+0188 0+001c 0+0020 FDE cie=0+016c pc=0+020150..0+020160
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -183,7 +167,7 @@ Contents of the \.eh_frame section:
# FDE for .discard removed
# zPR2 removed
-0+01b8 0+001c 0+0044 FDE cie=0+0178 pc=0+020160..0+020190
+0+01a8 0+001c 0+0040 FDE cie=0+016c pc=0+020160..0+020190
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -192,7 +176,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+01d8 0+001c 0+0064 FDE cie=0+0178 pc=0+020190..0+0201d0
+0+01c8 0+001c 0+0060 FDE cie=0+016c pc=0+020190..0+0201d0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -201,7 +185,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+01f8 0+001c 0+01fc FDE cie=0+0000 pc=0+0201d0..0+0201e0
+0+01e8 0+001c 0+01ec FDE cie=0+0000 pc=0+0201d0..0+0201e0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -211,7 +195,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
# basic1 removed, followed by repeat of above
-0+0218 0+001c 0+021c FDE cie=0+0000 pc=0+0201e0..0+0201f0
+0+0208 0+001c 0+020c FDE cie=0+0000 pc=0+0201e0..0+0201f0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -220,7 +204,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0238 0+001c 0+023c FDE cie=0+0000 pc=0+0201f0..0+020210
+0+0228 0+001c 0+022c FDE cie=0+0000 pc=0+0201f0..0+020210
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -229,7 +213,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0258 0+001c 0+025c FDE cie=0+0000 pc=0+020210..0+020240
+0+0248 0+001c 0+024c FDE cie=0+0000 pc=0+020210..0+020240
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -238,7 +222,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0278 0+001c 0+027c FDE cie=0+0000 pc=0+020240..0+020280
+0+0268 0+001c 0+026c FDE cie=0+0000 pc=0+020240..0+020280
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -247,7 +231,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0298 0+001c 0+029c FDE cie=0+0000 pc=0+020280..0+0202d0
+0+0288 0+001c 0+028c FDE cie=0+0000 pc=0+020280..0+0202d0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -256,7 +240,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+02b8 0+001c 0+0204 FDE cie=0+00b8 pc=0+0202d0..0+0202e0
+0+02a8 0+001c 0+01f8 FDE cie=0+00b4 pc=0+0202d0..0+0202e0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -265,7 +249,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+02d8 0+001c 0+0224 FDE cie=0+00b8 pc=0+0202e0..0+020300
+0+02c8 0+001c 0+0218 FDE cie=0+00b4 pc=0+0202e0..0+020300
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -274,7 +258,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+02f8 0+001c 0+01e4 FDE cie=0+0118 pc=0+020300..0+020310
+0+02e8 0+001c 0+01dc FDE cie=0+0110 pc=0+020300..0+020310
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -283,7 +267,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0318 0+001c 0+0204 FDE cie=0+0118 pc=0+020310..0+020330
+0+0308 0+001c 0+01fc FDE cie=0+0110 pc=0+020310..0+020330
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -292,7 +276,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0338 0+001c 0+01c4 FDE cie=0+0178 pc=0+020330..0+020340
+0+0328 0+001c 0+01c0 FDE cie=0+016c pc=0+020330..0+020340
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -301,7 +285,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0358 0+001c 0+01e4 FDE cie=0+0178 pc=0+020340..0+020370
+0+0348 0+001c 0+01e0 FDE cie=0+016c pc=0+020340..0+020370
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -310,7 +294,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0378 0+001c 0+0204 FDE cie=0+0178 pc=0+020370..0+0203b0
+0+0368 0+001c 0+0200 FDE cie=0+016c pc=0+020370..0+0203b0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -319,11 +303,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0398 0+001c 0+039c FDE cie=0+0000 pc=0+0203b0..0+0203c0
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+0388 0+0018 0+038c FDE cie=0+0000 pc=0+0203b0..0+0203c0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
diff --git a/ld/testsuite/ld-mips-elf/eh-frame3.d b/ld/testsuite/ld-mips-elf/eh-frame3.d
index 10d0cd851e7..ad6270ce244 100644
--- a/ld/testsuite/ld-mips-elf/eh-frame3.d
+++ b/ld/testsuite/ld-mips-elf/eh-frame3.d
@@ -87,16 +87,12 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0128 0+001c 0+0044 FDE cie=0+00e8 pc=0+020130..0+020150
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+0128 0+0018 0+0044 FDE cie=0+00e8 pc=0+020130..0+020150
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
-0+0148 0+001c 0+0000 CIE
+0+0144 0+0018 0+0000 CIE
Version: 1
Augmentation: "zPR"
Code alignment factor: 1
@@ -105,12 +101,8 @@ Contents of the \.eh_frame section:
Augmentation data: 00 00 00 00 00 50 60 70 80 00
DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
-0+0168 0+001c 0+0024 FDE cie=0+0148 pc=0+020150..0+020160
+0+0160 0+001c 0+0020 FDE cie=0+0144 pc=0+020150..0+020160
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -121,7 +113,7 @@ Contents of the \.eh_frame section:
# FDE for .discard removed
# zPR2 removed
-0+0188 0+001c 0+0044 FDE cie=0+0148 pc=0+020160..0+020190
+0+0180 0+001c 0+0040 FDE cie=0+0144 pc=0+020160..0+020190
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -130,7 +122,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+01a8 0+001c 0+0064 FDE cie=0+0148 pc=0+020190..0+0201d0
+0+01a0 0+001c 0+0060 FDE cie=0+0144 pc=0+020190..0+0201d0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -139,20 +131,20 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+01c8 0+0014 0+01cc FDE cie=0+0000 pc=0+0201d0..0+0201e0
+0+01c0 0+0014 0+01c4 FDE cie=0+0000 pc=0+0201d0..0+0201e0
# basic1 removed, followed by repeat of above
-0+01e0 0+0014 0+01e4 FDE cie=0+0000 pc=0+0201e0..0+0201f0
+0+01d8 0+0014 0+01dc FDE cie=0+0000 pc=0+0201e0..0+0201f0
-0+01f8 0+0014 0+01fc FDE cie=0+0000 pc=0+0201f0..0+020210
+0+01f0 0+0014 0+01f4 FDE cie=0+0000 pc=0+0201f0..0+020210
-0+0210 0+0014 0+0214 FDE cie=0+0000 pc=0+020210..0+020240
+0+0208 0+0014 0+020c FDE cie=0+0000 pc=0+020210..0+020240
-0+0228 0+0014 0+022c FDE cie=0+0000 pc=0+020240..0+020280
+0+0220 0+0014 0+0224 FDE cie=0+0000 pc=0+020240..0+020280
-0+0240 0+0014 0+0244 FDE cie=0+0000 pc=0+020280..0+0202d0
+0+0238 0+0014 0+023c FDE cie=0+0000 pc=0+020280..0+0202d0
-0+0258 0+001c 0+01d4 FDE cie=0+0088 pc=0+0202d0..0+0202e0
+0+0250 0+001c 0+01cc FDE cie=0+0088 pc=0+0202d0..0+0202e0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -161,7 +153,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0278 0+001c 0+01f4 FDE cie=0+0088 pc=0+0202e0..0+020300
+0+0270 0+001c 0+01ec FDE cie=0+0088 pc=0+0202e0..0+020300
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -170,7 +162,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0298 0+001c 0+01b4 FDE cie=0+00e8 pc=0+020300..0+020310
+0+0290 0+001c 0+01ac FDE cie=0+00e8 pc=0+020300..0+020310
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -179,7 +171,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+02b8 0+001c 0+01d4 FDE cie=0+00e8 pc=0+020310..0+020330
+0+02b0 0+001c 0+01cc FDE cie=0+00e8 pc=0+020310..0+020330
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -188,7 +180,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+02d8 0+001c 0+0194 FDE cie=0+0148 pc=0+020330..0+020340
+0+02d0 0+001c 0+0190 FDE cie=0+0144 pc=0+020330..0+020340
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -199,7 +191,7 @@ Contents of the \.eh_frame section:
# FDE for .discard removed
# zPR2 removed
-0+02f8 0+001c 0+01b4 FDE cie=0+0148 pc=0+020340..0+020370
+0+02f0 0+001c 0+01b0 FDE cie=0+0144 pc=0+020340..0+020370
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -208,7 +200,7 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0318 0+001c 0+01d4 FDE cie=0+0148 pc=0+020370..0+0203b0
+0+0310 0+001c 0+01d0 FDE cie=0+0144 pc=0+020370..0+0203b0
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
@@ -217,4 +209,4 @@ Contents of the \.eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+0338 0+0014 0+033c FDE cie=0+0000 pc=0+0203b0..0+0203c0
+0+0330 0+0014 0+0334 FDE cie=0+0000 pc=0+0203b0..0+0203c0
diff --git a/ld/testsuite/ld-x86-64/pr20830a.d b/ld/testsuite/ld-x86-64/pr20830a.d
index 87ea25d4592..caa4fe8b3fc 100644
--- a/ld/testsuite/ld-x86-64/pr20830a.d
+++ b/ld/testsuite/ld-x86-64/pr20830a.d
@@ -41,11 +41,7 @@ Contents of the .eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+58 0000000000000014 0000005c FDE cie=00000000 pc=0000000000000230..0000000000000238
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+58 0000000000000010 0000005c FDE cie=00000000 pc=0000000000000230..0000000000000238
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
diff --git a/ld/testsuite/ld-x86-64/pr21038a.d b/ld/testsuite/ld-x86-64/pr21038a.d
index f2f88eb9c83..e6829d5b31a 100644
--- a/ld/testsuite/ld-x86-64/pr21038a.d
+++ b/ld/testsuite/ld-x86-64/pr21038a.d
@@ -40,11 +40,7 @@ Contents of the .eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+58 0000000000000014 0000005c FDE cie=00000000 pc=0000000000000230..0000000000000238
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+58 0000000000000010 0000005c FDE cie=00000000 pc=0000000000000230..0000000000000238
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
diff --git a/ld/testsuite/ld-x86-64/pr21038b.d b/ld/testsuite/ld-x86-64/pr21038b.d
index 053d9086f8e..69b5c65a7a5 100644
--- a/ld/testsuite/ld-x86-64/pr21038b.d
+++ b/ld/testsuite/ld-x86-64/pr21038b.d
@@ -40,11 +40,7 @@ Contents of the .eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+58 0000000000000014 0000005c FDE cie=00000000 pc=0000000000000240..0000000000000248
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+58 0000000000000010 0000005c FDE cie=00000000 pc=0000000000000240..0000000000000248
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
diff --git a/ld/testsuite/ld-x86-64/pr21038c.d b/ld/testsuite/ld-x86-64/pr21038c.d
index 33ff4ed8532..5b6c22fdcca 100644
--- a/ld/testsuite/ld-x86-64/pr21038c.d
+++ b/ld/testsuite/ld-x86-64/pr21038c.d
@@ -49,11 +49,7 @@ Contents of the .eh_frame section:
DW_CFA_nop
DW_CFA_nop
-0+70 0000000000000014 00000074 FDE cie=00000000 pc=0000000000000280..0000000000000288
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
- DW_CFA_nop
+0+70 0000000000000010 00000074 FDE cie=00000000 pc=0000000000000280..0000000000000288
DW_CFA_nop
DW_CFA_nop
DW_CFA_nop
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