diff options
| author | Chris Demetriou <cgd@google.com> | 2002-06-04 22:38:41 +0000 |
|---|---|---|
| committer | Chris Demetriou <cgd@google.com> | 2002-06-04 22:38:41 +0000 |
| commit | ee7254b0cc380b91b93231b21fe5b40247180627 (patch) | |
| tree | 737e8cdaf91250806816c1592a4e1748aa0e08e2 /sim/mips/mips.igen | |
| parent | d3eb724f8198916e9fdd3805811f467167149f62 (diff) | |
| download | binutils-gdb-ee7254b0cc380b91b93231b21fe5b40247180627.tar.gz | |
2002-06-04 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (FGRIDX): Remove, replace all uses with...
(FGR_BASE): New macro.
(FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
(_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
(NR_FGR, FGR): Likewise.
* interp.c: Replace all uses of FGRIDX with FGR_BASE.
* mips.igen: Likewise.
Diffstat (limited to 'sim/mips/mips.igen')
| -rw-r--r-- | sim/mips/mips.igen | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index b282602b143..874b685aa73 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -4058,11 +4058,11 @@ if (X) { if (SizeFGR() == 64) - PENDING_FILL((FS + FGRIDX),GPR[RT]); + PENDING_FILL((FS + FGR_BASE),GPR[RT]); else if ((FS & 0x1) == 0) { - PENDING_FILL(((FS + 1) + FGRIDX),VH4_8(GPR[RT])); - PENDING_FILL((FS + FGRIDX),VL4_8(GPR[RT])); + PENDING_FILL(((FS + 1) + FGR_BASE),VH4_8(GPR[RT])); + PENDING_FILL((FS + FGR_BASE),VL4_8(GPR[RT])); } } else @@ -4264,10 +4264,10 @@ sim_io_eprintf (SD, "Warning: PC 0x%lx: MTC1 not DMTC1 with 64 bit regs\n", (long) CIA); - PENDING_FILL ((FS + FGRIDX), (SET64HI(0xDEADC0DE) | VL4_8(GPR[RT]))); + PENDING_FILL ((FS + FGR_BASE), (SET64HI(0xDEADC0DE) | VL4_8(GPR[RT]))); } else - PENDING_FILL ((FS + FGRIDX), VL4_8(GPR[RT])); + PENDING_FILL ((FS + FGR_BASE), VL4_8(GPR[RT])); } else /*MFC1*/ PENDING_FILL (RT, EXTEND32 (FGR[FS])); |