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authorMike Frysinger <vapier@gentoo.org>2015-12-25 04:12:55 -0500
committerMike Frysinger <vapier@gentoo.org>2015-12-25 04:24:06 -0500
commit8a0ebee658862bec66191df192c1d3b09bf0c943 (patch)
tree4e714c457a1130fcbb2b2f79f26c23ebd0db77d5 /sim/m32r
parent91d6df784db745df2b0a6827de8306246083bc94 (diff)
downloadbinutils-gdb-8a0ebee658862bec66191df192c1d3b09bf0c943.tar.gz
sim: move MACH/MODEL types into SIM_xxx namespace
The "MACH" and "MODEL" names are a bit generic and collide with symbols used by other sections of code (like h8300's opcodes). Since these are sim-specific types, they really should have a "SIM_" prefix.
Diffstat (limited to 'sim/m32r')
-rw-r--r--sim/m32r/ChangeLog8
-rw-r--r--sim/m32r/arch.c2
-rw-r--r--sim/m32r/cpuall.h6
-rw-r--r--sim/m32r/model.c6
-rw-r--r--sim/m32r/model2.c6
-rw-r--r--sim/m32r/modelx.c6
6 files changed, 21 insertions, 13 deletions
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
index f0007432d33..ce71d300842 100644
--- a/sim/m32r/ChangeLog
+++ b/sim/m32r/ChangeLog
@@ -1,5 +1,13 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
+ * arch.c: Rename MACH to SIM_MACH.
+ * cpuall.h: Likewise.
+ * model.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
+ SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
+ * model2.c, modelx.c: Likewise.
+
+2015-12-25 Mike Frysinger <vapier@gentoo.org>
+
* sim-main.h (WITH_SCACHE_PBB): Move from ...
* tconfig.h (WITH_SCACHE_PBB): ... here.
diff --git a/sim/m32r/arch.c b/sim/m32r/arch.c
index 794387a284f..ce000ae9d37 100644
--- a/sim/m32r/arch.c
+++ b/sim/m32r/arch.c
@@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
-const MACH *sim_machs[] =
+const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_M32RBF
& m32r_mach,
diff --git a/sim/m32r/cpuall.h b/sim/m32r/cpuall.h
index 6cbbaef7541..6a684dcf50c 100644
--- a/sim/m32r/cpuall.h
+++ b/sim/m32r/cpuall.h
@@ -44,9 +44,9 @@ This file is part of the GNU simulators.
#include "decode2.h"
#endif
-extern const MACH m32r_mach;
-extern const MACH m32rx_mach;
-extern const MACH m32r2_mach;
+extern const SIM_MACH m32r_mach;
+extern const SIM_MACH m32rx_mach;
+extern const SIM_MACH m32r2_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */
diff --git a/sim/m32r/model.c b/sim/m32r/model.c
index cb85757d941..b39104028ba 100644
--- a/sim/m32r/model.c
+++ b/sim/m32r/model.c
@@ -4297,7 +4297,7 @@ test_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
-static const MODEL m32r_models[] =
+static const SIM_MODEL m32r_models[] =
{
{ "m32r/d", & m32r_mach, MODEL_M32R_D, TIMING_DATA (& m32r_d_timing[0]), m32r_d_model_init },
{ "test", & m32r_mach, MODEL_TEST, TIMING_DATA (& test_timing[0]), test_model_init },
@@ -4306,7 +4306,7 @@ static const MODEL m32r_models[] =
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES m32rbf_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES m32rbf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@@ -4348,7 +4348,7 @@ m32r_init_cpu (SIM_CPU *cpu)
#endif
}
-const MACH m32r_mach =
+const SIM_MACH m32r_mach =
{
"m32r", "m32r", MACH_M32R,
32, 32, & m32r_models[0], & m32rbf_imp_properties,
diff --git a/sim/m32r/model2.c b/sim/m32r/model2.c
index 4a1943f37e8..5ff8118e27a 100644
--- a/sim/m32r/model2.c
+++ b/sim/m32r/model2.c
@@ -3192,7 +3192,7 @@ m32r2_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
-static const MODEL m32r2_models[] =
+static const SIM_MODEL m32r2_models[] =
{
{ "m32r2", & m32r2_mach, MODEL_M32R2, TIMING_DATA (& m32r2_timing[0]), m32r2_model_init },
{ 0 }
@@ -3200,7 +3200,7 @@ static const MODEL m32r2_models[] =
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES m32r2f_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES m32r2f_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@@ -3242,7 +3242,7 @@ m32r2_init_cpu (SIM_CPU *cpu)
#endif
}
-const MACH m32r2_mach =
+const SIM_MACH m32r2_mach =
{
"m32r2", "m32r2", MACH_M32R2,
32, 32, & m32r2_models[0], & m32r2f_imp_properties,
diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c
index e8de0de7abc..5546b494847 100644
--- a/sim/m32r/modelx.c
+++ b/sim/m32r/modelx.c
@@ -3010,7 +3010,7 @@ m32rx_model_init (SIM_CPU *cpu)
#define TIMING_DATA(td) 0
#endif
-static const MODEL m32rx_models[] =
+static const SIM_MODEL m32rx_models[] =
{
{ "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init },
{ 0 }
@@ -3018,7 +3018,7 @@ static const MODEL m32rx_models[] =
/* The properties of this cpu's implementation. */
-static const MACH_IMP_PROPERTIES m32rxf_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES m32rxf_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@@ -3060,7 +3060,7 @@ m32rx_init_cpu (SIM_CPU *cpu)
#endif
}
-const MACH m32rx_mach =
+const SIM_MACH m32rx_mach =
{
"m32rx", "m32rx", MACH_M32RX,
32, 32, & m32rx_models[0], & m32rxf_imp_properties,