sim: hoist cgen mloop rules up to common builds

These rules don't depend on the target compiler settings, so hoist
the build logic up to the common builds for better parallelization.

We have to extend the genmloop.sh logic a bit to allow outputting
to a subdir since it always assumed cwd was the right place.

We leave the cgen maintainer rules in the subdirs for now as they
aren't normally run, and they rely on cgen logic that has not yet
been generalized.

1 files changed, 352 insertions, 27 deletions

diff --git a/sim/Makefile.in b/sim/Makefile.in
index 1812f1508f9..07c89377e97 100644
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -103,6 +103,23 @@
 
 # See sim/Makefile.am
 #
+# Copyright (C) 2020-2021 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# See sim/Makefile.am
+#
 # Copyright (C) 2008-2021 Free Software Foundation, Inc.
 # Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com>
 #
@@ -121,6 +138,24 @@
 
 # See sim/Makefile.am
 #
+# Copyright (C) 2004-2021 Free Software Foundation, Inc.
+# Contributed by Axis Communications.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# See sim/Makefile.am
+#
 # Copyright (C) 1996-2021 Free Software Foundation, Inc.
 # Written by Cygnus Support.
 #
@@ -139,6 +174,60 @@
 
 # See sim/Makefile.am
 #
+# Copyright (C) 1998-2021 Free Software Foundation, Inc.
+# Contributed by Red Hat.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# See sim/Makefile.am
+#
+# Copyright (C) 1998-2021 Free Software Foundation, Inc.
+# Contributed by Red Hat.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# See sim/Makefile.am
+#
+# Copyright (C) 2009-2021 Free Software Foundation, Inc.
+# Contributed by Jon Beniston <jon@beniston.com>
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# See sim/Makefile.am
+#
 # Copyright (C) 2005-2021 Free Software Foundation, Inc.
 # Contributed by Red Hat, Inc.
 #
@@ -157,6 +246,24 @@
 
 # See sim/Makefile.am
 #
+# Copyright (C) 1996-2021 Free Software Foundation, Inc.
+# Contributed by Cygnus Support.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# See sim/Makefile.am
+#
 # Copyright (C) 1999-2021 Free Software Foundation, Inc.
 # Written by Cygnus Support.
 #
@@ -193,6 +300,23 @@
 
 # See sim/Makefile.am
 #
+# Copyright (C) 2017-2021 Free Software Foundation, Inc.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# See sim/Makefile.am
+#
 # Copyright (C) 1990-2021 Free Software Foundation, Inc.
 # Written by Cygnus Support.
 #
@@ -322,41 +446,69 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
 	testsuite/common/alu-tst$(EXEEXT)
 
 # This makes sure build tools are available before building the arch-subdirs.
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_5 = $(cr16_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_cr16_TRUE@am__append_6 = cr16/gencode
+@SIM_ENABLE_ARCH_bpf_TRUE@am__append_5 = $(bpf_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_bpf_TRUE@am__append_6 = $(bpf_BUILD_OUTPUTS)
+
+# This makes sure build tools are available before building the arch-subdirs.
 @SIM_ENABLE_ARCH_cr16_TRUE@am__append_7 = $(cr16_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_8 = cr16/gencode
+@SIM_ENABLE_ARCH_cr16_TRUE@am__append_9 = $(cr16_BUILD_OUTPUTS)
+
+# This makes sure build tools are available before building the arch-subdirs.
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_10 = $(cris_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_cris_TRUE@am__append_11 = $(cris_BUILD_OUTPUTS)
+
+# This makes sure build tools are available before building the arch-subdirs.
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_12 = $(d10v_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_13 = d10v/gencode
+@SIM_ENABLE_ARCH_d10v_TRUE@am__append_14 = $(d10v_BUILD_OUTPUTS)
+
+# This makes sure build tools are available before building the arch-subdirs.
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_15 = $(frv_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_frv_TRUE@am__append_16 = $(frv_BUILD_OUTPUTS)
+
+# This makes sure build tools are available before building the arch-subdirs.
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_17 = $(iq2000_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_iq2000_TRUE@am__append_18 = $(iq2000_BUILD_OUTPUTS)
 
 # This makes sure build tools are available before building the arch-subdirs.
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_8 = $(d10v_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_9 = d10v/gencode
-@SIM_ENABLE_ARCH_d10v_TRUE@am__append_10 = $(d10v_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_19 = $(lm32_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_lm32_TRUE@am__append_20 = $(lm32_BUILD_OUTPUTS)
 
 # This makes sure build tools are available before building the arch-subdirs.
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_11 = $(m32c_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_12 = m32c/opc2c
-@SIM_ENABLE_ARCH_m32c_TRUE@am__append_13 = \
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_21 = $(m32c_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_22 = m32c/opc2c
+@SIM_ENABLE_ARCH_m32c_TRUE@am__append_23 = \
 @SIM_ENABLE_ARCH_m32c_TRUE@	$(m32c_BUILD_OUTPUTS) \
 @SIM_ENABLE_ARCH_m32c_TRUE@	m32c/m32c.c.log \
 @SIM_ENABLE_ARCH_m32c_TRUE@	m32c/r8c.c.log
 
 
 # This makes sure build tools are available before building the arch-subdirs.
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_14 = $(m68hc11_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_15 = m68hc11/gencode
-@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_16 = $(m68hc11_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_24 = $(m32r_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m32r_TRUE@am__append_25 = $(m32r_BUILD_OUTPUTS)
+
+# This makes sure build tools are available before building the arch-subdirs.
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_26 = $(m68hc11_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_27 = m68hc11/gencode
+@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_28 = $(m68hc11_BUILD_OUTPUTS)
+
+# This makes sure build tools are available before building the arch-subdirs.
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_29 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_30 = $(mn10300_BUILD_OUTPUTS)
 
 # This makes sure build tools are available before building the arch-subdirs.
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_17 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_18 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_31 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_32 = $(or1k_BUILD_OUTPUTS)
 
 # This makes sure build tools are available before building the arch-subdirs.
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_19 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_20 = sh/gencode
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_21 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_33 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_34 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_35 = $(sh_BUILD_OUTPUTS)
 
 # This makes sure build tools are available before building the arch-subdirs.
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_22 = $(v850_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_23 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_36 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_37 = $(v850_BUILD_OUTPUTS)
 subdir = .
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -1002,6 +1154,7 @@ zlibdir = @zlibdir@
 zlibinc = @zlibinc@
 AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects
 ACLOCAL_AMFLAGS = -Im4 -I.. -I../config
+srccom = $(srcdir)/common
 srcroot = $(srcdir)/..
 SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
 AM_MAKEFLAGS = SIM_PRIMARY_TARGET=$(SIM_PRIMARY_TARGET)
@@ -1015,9 +1168,11 @@ CLEANFILES = common/version.c common/version.c-stamp \
 	testsuite/common/bits64m63.c
 DISTCLEANFILES = 
 MOSTLYCLEANFILES = core $(am__append_4) site-srcdir.exp testrun.log \
-	testrun.sum $(am__append_7) $(am__append_10) $(am__append_13) \
-	$(am__append_16) $(am__append_18) $(am__append_21) \
-	$(am__append_23)
+	testrun.sum $(am__append_6) $(am__append_9) $(am__append_11) \
+	$(am__append_14) $(am__append_16) $(am__append_18) \
+	$(am__append_20) $(am__append_23) $(am__append_25) \
+	$(am__append_28) $(am__append_30) $(am__append_32) \
+	$(am__append_35) $(am__append_37)
 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
 AM_CPPFLAGS = -I$(srcroot)/include $(SIM_INLINE) -I$(srcdir)/common
 COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS) $(CFLAGS_FOR_BUILD)
@@ -1029,9 +1184,11 @@ LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@
 # This makes sure common parts are available before building the arch-subdirs
 # which will refer to these.
 SIM_ALL_RECURSIVE_DEPS = common/libcommon.a $(am__append_1) \
-	$(am__append_5) $(am__append_8) $(am__append_11) \
-	$(am__append_14) $(am__append_17) $(am__append_19) \
-	$(am__append_22)
+	$(am__append_5) $(am__append_7) $(am__append_10) \
+	$(am__append_12) $(am__append_15) $(am__append_17) \
+	$(am__append_19) $(am__append_21) $(am__append_24) \
+	$(am__append_26) $(am__append_29) $(am__append_31) \
+	$(am__append_33) $(am__append_36)
 pkginclude_HEADERS = \
 	$(srcroot)/include/sim/callback.h \
 	$(srcroot)/include/sim/sim.h
@@ -1105,6 +1262,14 @@ testsuite_common_CPPFLAGS = \
 	-I$(srcroot)/include \
 	-I../bfd
 
+@SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \
+@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/eng-le.h \
+@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/mloop-le.c \
+@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/stamp-mloop-le \
+@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/eng-be.h \
+@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/mloop-be.c \
+@SIM_ENABLE_ARCH_bpf_TRUE@	bpf/stamp-mloop-be
+
 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \
 @SIM_ENABLE_ARCH_cr16_TRUE@	cr16/gencode$(EXEEXT) \
 @SIM_ENABLE_ARCH_cr16_TRUE@	cr16/simops.h \
@@ -1112,6 +1277,14 @@ testsuite_common_CPPFLAGS = \
 
 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c
 @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o
+@SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \
+@SIM_ENABLE_ARCH_cris_TRUE@	cris/engv10.h \
+@SIM_ENABLE_ARCH_cris_TRUE@	cris/mloopv10f.c \
+@SIM_ENABLE_ARCH_cris_TRUE@	cris/stamp-mloop-v10f \
+@SIM_ENABLE_ARCH_cris_TRUE@	cris/engv32.h \
+@SIM_ENABLE_ARCH_cris_TRUE@	cris/mloopv32f.c \
+@SIM_ENABLE_ARCH_cris_TRUE@	cris/stamp-mloop-v32f
+
 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \
 @SIM_ENABLE_ARCH_d10v_TRUE@	d10v/gencode$(EXEEXT) \
 @SIM_ENABLE_ARCH_d10v_TRUE@	d10v/simops.h \
@@ -1119,6 +1292,21 @@ testsuite_common_CPPFLAGS = \
 
 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c
 @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o
+@SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \
+@SIM_ENABLE_ARCH_frv_TRUE@	frv/eng.h \
+@SIM_ENABLE_ARCH_frv_TRUE@	frv/mloop.c \
+@SIM_ENABLE_ARCH_frv_TRUE@	frv/stamp-mloop
+
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \
+@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/eng.h \
+@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/mloop.c \
+@SIM_ENABLE_ARCH_iq2000_TRUE@	iq2000/stamp-mloop
+
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \
+@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/eng.h \
+@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/mloop.c \
+@SIM_ENABLE_ARCH_lm32_TRUE@	lm32/stamp-mloop
+
 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \
 @SIM_ENABLE_ARCH_m32c_TRUE@	m32c/opc2c$(EXEEXT) \
 @SIM_ENABLE_ARCH_m32c_TRUE@	m32c/m32c.c \
@@ -1129,6 +1317,17 @@ testsuite_common_CPPFLAGS = \
 # opc2c leaks memory, and therefore makes AddressSanitizer unhappy.  Disable
 # leak detection while running it.
 @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT)
+@SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/eng.h \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloop.c \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/engx.h \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloopx.c \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop-x \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/eng2.h \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/mloop2.c \
+@SIM_ENABLE_ARCH_m32r_TRUE@	m32r/stamp-mloop-2
+
 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \
 @SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/gencode$(EXEEXT) \
 @SIM_ENABLE_ARCH_m68hc11_TRUE@	m68hc11/m68hc11int.c \
@@ -1160,6 +1359,11 @@ testsuite_common_CPPFLAGS = \
 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen
 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen
 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \
+@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/eng.h \
+@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/mloop.c \
+@SIM_ENABLE_ARCH_or1k_TRUE@	or1k/stamp-mloop
+
 @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \
 @SIM_ENABLE_ARCH_sh_TRUE@	sh/gencode$(EXEEXT) \
 @SIM_ENABLE_ARCH_sh_TRUE@	sh/code.c \
@@ -1198,7 +1402,7 @@ all: config.h
 .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs
 am--refresh: Makefile
 	@:
-$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/cr16/local.mk $(srcdir)/d10v/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
+$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/frv/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/or1k/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps)
 	@for dep in $?; do \
 	  case '$(am__configure_deps)' in \
 	    *$$dep*) \
@@ -1220,7 +1424,7 @@ Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status
 	    echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \
 	    cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \
 	esac;
-$(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/cr16/local.mk $(srcdir)/d10v/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
+$(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/frv/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/or1k/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty):
 
 $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES)
 	$(SHELL) ./config.status --recheck
@@ -2196,7 +2400,7 @@ uninstall-am: uninstall-pkgincludeHEADERS
 # An alternative is to slurp in the tables at runtime.
 .PHONY: nltvals
 nltvals:
-	$(srcdir)/common/gennltvals.py --cpp "$(CPP)"
+	$(srccom)/gennltvals.py --cpp "$(CPP)"
 
 common/version.c: common/version.c-stamp ; @true
 common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh
@@ -2281,6 +2485,26 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen testsuite/common/bits-ts
 	$(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp
 	$(AM_V_at)mv $@.tmp $@
 
+@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true
+@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_bpf_TRUE@		-mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \
+@SIM_ENABLE_ARCH_bpf_TRUE@		-infile $(srcdir)/bpf/mloop.in \
+@SIM_ENABLE_ARCH_bpf_TRUE@		-outfile-prefix bpf/ -outfile-suffix -le
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)touch $@
+
+@SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true
+@SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_bpf_TRUE@		-mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \
+@SIM_ENABLE_ARCH_bpf_TRUE@		-infile $(srcdir)/bpf/mloop.in \
+@SIM_ENABLE_ARCH_bpf_TRUE@		-outfile-prefix bpf/ -outfile-suffix -be
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c
+@SIM_ENABLE_ARCH_bpf_TRUE@	$(AM_V_at)touch $@
+
 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp)
 @SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD)
@@ -2297,6 +2521,30 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen testsuite/common/bits-ts
 @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT)
 @SIM_ENABLE_ARCH_cr16_TRUE@	$(AM_V_GEN)$< >$@
 
+# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
+# than the apparent; some "mono" feature is work in progress)?
+@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true
+@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_cris_TRUE@		-mono -no-fast -pbb -switch semcrisv10f-switch.c \
+@SIM_ENABLE_ARCH_cris_TRUE@		-cpu crisv10f \
+@SIM_ENABLE_ARCH_cris_TRUE@		-infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)touch $@
+
+# FIXME: What is mono and what does "Use of `mono' is wip" mean (other
+# than the apparent; some "mono" feature is work in progress)?
+@SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true
+@SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_cris_TRUE@		-mono -no-fast -pbb -switch semcrisv32f-switch.c \
+@SIM_ENABLE_ARCH_cris_TRUE@		-cpu crisv32f \
+@SIM_ENABLE_ARCH_cris_TRUE@		-infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c
+@SIM_ENABLE_ARCH_cris_TRUE@	$(AM_V_at)touch $@
+
 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp)
 @SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD)
@@ -2313,6 +2561,39 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen testsuite/common/bits-ts
 @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT)
 @SIM_ENABLE_ARCH_d10v_TRUE@	$(AM_V_GEN)$< >$@
 
+# FIXME: Use of `mono' is wip.
+@SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true
+@SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in
+@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_frv_TRUE@		-mono -scache -parallel-generic-write -parallel-only \
+@SIM_ENABLE_ARCH_frv_TRUE@		-cpu frvbf \
+@SIM_ENABLE_ARCH_frv_TRUE@		-infile $(srcdir)/frv/mloop.in -outfile-prefix frv/
+@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h
+@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c
+@SIM_ENABLE_ARCH_frv_TRUE@	$(AM_V_at)touch $@
+
+# FIXME: Use of `mono' is wip.
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true
+@SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in
+@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_iq2000_TRUE@		-mono -fast -pbb -switch sem-switch.c \
+@SIM_ENABLE_ARCH_iq2000_TRUE@		-cpu iq2000bf \
+@SIM_ENABLE_ARCH_iq2000_TRUE@		-infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/
+@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h
+@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c
+@SIM_ENABLE_ARCH_iq2000_TRUE@	$(AM_V_at)touch $@
+
+# FIXME: Use of `mono' is wip.
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in
+@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_lm32_TRUE@		-mono -fast -pbb -switch sem-switch.c \
+@SIM_ENABLE_ARCH_lm32_TRUE@		-cpu lm32bf \
+@SIM_ENABLE_ARCH_lm32_TRUE@		-infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/
+@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h
+@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
+@SIM_ENABLE_ARCH_lm32_TRUE@	$(AM_V_at)touch $@
+
 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp)
 @SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD)
@@ -2329,6 +2610,39 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen testsuite/common/bits-ts
 @SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp
 @SIM_ENABLE_ARCH_m32c_TRUE@	$(AM_V_at)mv $@.tmp $@
 
+# FIXME: Use of `mono' is wip.
+@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true
+@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -fast -pbb -switch sem-switch.c \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32rbf \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@
+
+# FIXME: Use of `mono' is wip.
+@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true
+@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -no-fast -pbb -parallel-write -switch semx-switch.c \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32rxf \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@
+
+# FIXME: Use of `mono' is wip.
+@SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true
+@SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-cpu m32r2f \
+@SIM_ENABLE_ARCH_m32r_TRUE@		-infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c
+@SIM_ENABLE_ARCH_m32r_TRUE@	$(AM_V_at)touch $@
+
 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp)
 @SIM_ENABLE_ARCH_m68hc11_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD)
@@ -2386,6 +2700,17 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen testsuite/common/bits-ts
 @SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-irun.c mn10300/irun.c
 @SIM_ENABLE_ARCH_mn10300_TRUE@	$(AM_V_at)touch $@
 
+# FIXME: Use of `mono' is wip.
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true
+@SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in
+@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
+@SIM_ENABLE_ARCH_or1k_TRUE@		-mono -fast -pbb -switch sem-switch.c \
+@SIM_ENABLE_ARCH_or1k_TRUE@		-cpu or1k32bf \
+@SIM_ENABLE_ARCH_or1k_TRUE@		-infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/
+@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h
+@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c
+@SIM_ENABLE_ARCH_or1k_TRUE@	$(AM_V_at)touch $@
+
 # These rules are copied from automake, but tweaked to use FOR_BUILD variables.
 @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp)
 @SIM_ENABLE_ARCH_sh_TRUE@	$(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD)