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authorRichard Sandiford <richard.sandiford@arm.com>2021-11-30 17:50:25 +0000
committerRichard Sandiford <richard.sandiford@arm.com>2021-11-30 17:50:25 +0000
commited96bdcba59ec5bba01de1b1db398f338f9200b1 (patch)
tree3aa29e4f6223f8e6d35b9cff98bc5a1a42e5b5aa /opcodes
parentb009f915c9e744b1671f72806c5714af00a8ee89 (diff)
downloadbinutils-gdb-ed96bdcba59ec5bba01de1b1db398f338f9200b1.tar.gz
aarch64: Remove ZIDR_EL1
ZIDR_EL1 was part of an early version of SVE, but didn't make it to the final release. opcodes/ * aarch64-opc.c (aarch64_sys_regs): Remove zidr_el1 entry. gas/ * testsuite/gas/aarch64/sve-sysreg.s: Remove zidr_el1. * testsuite/gas/aarch64/sve-sysreg.d: Update accordingly. * testsuite/gas/aarch64/sve-sysreg-invalid.l: Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/aarch64-opc.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 34b141eaed0..ace7032b7fb 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -4119,7 +4119,6 @@ const aarch64_sys_reg aarch64_sys_regs [] =
SR_SVE ("zcr_el12", CPENC (3,5,C1,C2,0), 0),
SR_SVE ("zcr_el2", CPENC (3,4,C1,C2,0), 0),
SR_SVE ("zcr_el3", CPENC (3,6,C1,C2,0), 0),
- SR_SVE ("zidr_el1", CPENC (3,0,C0,C0,7), 0),
SR_CORE ("ttbr0_el1", CPENC (3,0,C2,C0,0), 0),
SR_CORE ("ttbr1_el1", CPENC (3,0,C2,C0,1), 0),
SR_V8_A ("ttbr0_el2", CPENC (3,4,C2,C0,0), 0),