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authorAlan Modra <amodra@gmail.com>2008-08-14 13:56:00 +0000
committerAlan Modra <amodra@gmail.com>2008-08-14 13:56:00 +0000
commit899d85beadd08b604d95d700c80f8270964dd449 (patch)
tree5702af76bef853491d842890013146a8adad0aac /opcodes
parent70df0c05f204148bbdd9476bffce4630a8798777 (diff)
downloadbinutils-gdb-899d85beadd08b604d95d700c80f8270964dd449.tar.gz
PR 6825
* ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/ppc-opc.c6
2 files changed, 8 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b7936acf8e1..eb26e1faf56 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ PR 6825
+ * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
+
2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add syscall and sysret for Cpu64.
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index e0d833cf6bd..0faf528ddcd 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -3081,7 +3081,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"rfdi", XL(19,39), 0xffffffff, E500MC, {0}},
{"rfi", XL(19,50), 0xffffffff, COM, {0}},
-{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE, {0}},
+{"rfci", XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300, {0}},
{"rfsvc", XL(19,82), 0xffffffff, POWER, {0}},
@@ -3790,7 +3790,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"div", XO(31,331,0,0), XO_MASK, M601, {RT, RA, RB}},
{"div.", XO(31,331,0,1), XO_MASK, M601, {RT, RA, RB}},
-{"mfpmr", X(31,334), X_MASK, PPCPMR, {RT, PMR}},
+{"mfpmr", X(31,334), X_MASK, PPCPMR|PPCE300, {RT, PMR}},
{"mfmq", XSPR(31,339, 0), XSPR_MASK, M601, {RT}},
{"mfxer", XSPR(31,339, 1), XSPR_MASK, COM, {RT}},
@@ -4094,7 +4094,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"divwu", XO(31,459,0,0), XO_MASK, PPC, {RT, RA, RB}},
{"divwu.", XO(31,459,0,1), XO_MASK, PPC, {RT, RA, RB}},
-{"mtpmr", X(31,462), X_MASK, PPCPMR, {PMR, RS}},
+{"mtpmr", X(31,462), X_MASK, PPCPMR|PPCE300, {PMR, RS}},
{"mtmq", XSPR(31,467, 0), XSPR_MASK, M601, {RS}},
{"mtxer", XSPR(31,467, 1), XSPR_MASK, COM, {RS}},