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authorJan Beulich <jbeulich@suse.com>2023-03-31 08:26:06 +0200
committerJan Beulich <jbeulich@suse.com>2023-03-31 08:26:06 +0200
commit6967633c8b4902a7576e64c4ecf2ab6098c888f0 (patch)
treed6e3bfd227488c15a8829a5528ce15977d1e9884 /opcodes
parent695a8c347a3de35b29c2184d487a487a1b0348cd (diff)
downloadbinutils-gdb-6967633c8b4902a7576e64c4ecf2ab6098c888f0.tar.gz
x86: convert testcases to use .insn
This can't be done for all insns currently encoded with .byte. For one outside of 64-bit mode unused (typically ignored) register encoding bits in VEX/XOP/EVEX prefixes can't be set to their non-default values, since the necessary registers cannot be specified (and some of these bits can't even be used outside of 64-bit mode). And then there are odd tests like the first one in bad-bcast.s: Its purpose is to illegaly set EVEX.b together with EVEX.W (which could be expressed; note though EVEX.W set is invalid on its own), but then it also clears EVEX.B and EVEX.R' plus it sets EVEX.vvvv to other than 0xf (rendering the test ambiguous, because that's another #UD reason). In {,x86-64-}disassem.s many bogus encodings exist - some with ModR/M byte but insufficient displacement bytes, some using SIB encoding with the SIB byte actually being the supposed immediate. Some of these could be expressed by .insn, but I don't want to introduce bogus examples. These will all need adjustment anyway once the disassembler is improved in the way it deals with unrecognized encodings. Generally generated code is meant to remain the same. {,x86-64-}nops.d are exceptions because insn prefixes are emitted in a different order. opcode{,-intel,-suffix}.d are also adjusted (along with an according correction to opcode.s) to cover an apparent typo in the original tests (xor when or was meant). Where necessary --divide is added as gas option, to allow for the use of the extension opcode functionality. Comments are being adjusted where obviously wrong/misleading.
Diffstat (limited to 'opcodes')
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