RISC-V: Print symbol address for jalr w/ zero offset.

	ld/
	* testsuite/ld-riscv-elf/disas-jalr.d: New.
	* testsuite/ld-riscv-elf/disas-jalr.s: New.
	* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run new testcase.

	opcodes/
	* riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
	jalr.

2 files changed, 7 insertions, 0 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 076cd149fb5..fcfef762b5e 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-05  Jim Wilson  <jimw@sifive.com>
+
+	* riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
+	jalr.
+
 2018-01-03  Alan Modra  <amodra@gmail.com>
 
 	Update year range in copyright notice of all files.
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 972cbcfd2f3..cc427b4b935 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -226,6 +226,8 @@ print_insn_args (const char *d, insn_t l, bfd_vma pc, disassemble_info *info)
 
 	case 'b':
 	case 's':
+	  if ((l & MASK_JALR) == MATCH_JALR)
+	    maybe_print_address (pd, rs1, 0);
 	  print (info->stream, "%s", riscv_gpr_names[rs1]);
 	  break;