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| author | Richard Ball <richard.ball@arm.com> | 2023-02-28 10:55:25 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2023-02-28 10:55:25 +0000 |
| commit | 31f2faf5cf112931cfb8c0564a2b78477c907fe3 (patch) | |
| tree | e79a0b1a64d08cf9c0779c3e42fa6dcaef4e0f66 /opcodes | |
| parent | 26c294bd1b8d95b421487294863eb1560b65580d (diff) | |
| download | binutils-gdb-31f2faf5cf112931cfb8c0564a2b78477c907fe3.tar.gz | |
[Aarch64] Add Binutils support for MEC
This change supports MEC which is part of RME (Realm Management Extension).
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 9 |
2 files changed, 13 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a6e68d59dbb..9cf68d744b9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2023-02-28 Richard Ball <richard.ball@arm.com> + + * aarch64-opc.c: Add MEC system registers. + 2023-01-03 Nick Clifton <nickc@redhat.com> * po/de.po: Updated German translation. diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 886befff99e..e271b0d5e8e 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -5010,6 +5010,15 @@ const aarch64_sys_reg aarch64_sys_regs [] = SR_CORE ("gpccr_el3", CPENC (3,6,C2,C1,6), 0), SR_CORE ("gptbr_el3", CPENC (3,6,C2,C1,4), 0), + SR_CORE ("mecidr_el2", CPENC (3,4,C10,C8,7), F_REG_READ), + SR_CORE ("mecid_p0_el2", CPENC (3,4,C10,C8,0), 0), + SR_CORE ("mecid_a0_el2", CPENC (3,4,C10,C8,1), 0), + SR_CORE ("mecid_p1_el2", CPENC (3,4,C10,C8,2), 0), + SR_CORE ("mecid_a1_el2", CPENC (3,4,C10,C8,3), 0), + SR_CORE ("vmecid_p_el2", CPENC (3,4,C10,C9,0), 0), + SR_CORE ("vmecid_a_el2", CPENC (3,4,C10,C9,1), 0), + SR_CORE ("mecid_rl_a_el3",CPENC (3,6,C10,C10,1), 0), + SR_SME ("svcr", CPENC (3,3,C4,C2,2), 0), SR_SME ("id_aa64smfr0_el1", CPENC (3,0,C0,C4,5), F_REG_READ), SR_SME ("smcr_el1", CPENC (3,0,C1,C2,6), 0), |