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| author | Alan Modra <amodra@gmail.com> | 2020-05-11 09:46:45 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-05-11 21:08:37 +0930 |
| commit | 66ef5847c3a5ec17259f47f6ab52ebd470c0650c (patch) | |
| tree | c8e1dd0aac0708950767becc211731597cb4712d /opcodes/ppc-opc.c | |
| parent | 4f3e9537c47ce65086cb86587a5fa9be4dc41392 (diff) | |
| download | binutils-gdb-66ef5847c3a5ec17259f47f6ab52ebd470c0650c.tar.gz | |
Power10 string operations
opcodes/
* ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
gas/
* testsuite/gas/ppc/stringop.d,
* testsuite/gas/ppc/stringop.s: New test.
* testsuite/gas/ppc/ppc.exp: Run it.
Diffstat (limited to 'opcodes/ppc-opc.c')
| -rw-r--r-- | opcodes/ppc-opc.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index e15fcf5ea68..efaa06cfc93 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -4118,6 +4118,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"vdivuq", VX (4, 11), VX_MASK, POWER10, 0, {VD, VA, VB}}, {"psq_lx", XW (4, 6,0), XW_MASK, PPCPS, 0, {FRT,RA,RB,PSWM,PSQM}}, {"vmrghb", VX (4, 12), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, +{"vstribl", VXVA(4,13,0), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstribr", VXVA(4,13,1), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihl", VXVA(4,13,2), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihr", VXVA(4,13,3), VXVA_MASK, POWER10, 0, {VD, VB}}, {"psq_stx", XW (4, 7,0), XW_MASK, PPCPS, 0, {FRS,RA,RB,PSWM,PSQM}}, {"vpkuhum", VX (4, 14), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, {"vinsbvlx", VX (4, 15), VX_MASK, POWER10, 0, {VD, RA, VB}}, @@ -4293,6 +4297,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"vexptefp", VX (4, 394), VXVA_MASK, PPCVEC, 0, {VD, VB}}, {"vdivsw", VX (4, 395), VX_MASK, POWER10, 0, {VD, VA, VB}}, {"vmrglw", VX (4, 396), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, +{"vclrlb", VX (4, 397), VX_MASK, POWER10, 0, {VD, VA, RB}}, {"vpkshss", VX (4, 398), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, {"vinswvrx", VX (4, 399), VX_MASK, POWER10, 0, {VD, RA, VB}}, {"macchwsu", XO (4, 204,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, @@ -4306,6 +4311,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"vmulld", VX (4, 457), VX_MASK, POWER10, 0, {VD, VA, VB}}, {"vlogefp", VX (4, 458), VXVA_MASK, PPCVEC, 0, {VD, VB}}, {"vdivsd", VX (4, 459), VX_MASK, POWER10, 0, {VD, VA, VB}}, +{"vclrrb", VX (4, 461), VX_MASK, POWER10, 0, {VD, VA, RB}}, {"vpkswss", VX (4, 462), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, {"vinsd", VX (4, 463), VXUIMM4_MASK, POWER10, 0, {VD, RB, UIMM4}}, {"macchws", XO (4, 236,0,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, @@ -4654,6 +4660,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"evmhesmf", VX (4,1035), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"evmhoumi", VX (4,1036), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"vslo", VX (4,1036), VX_MASK, PPCVEC, 0, {VD, VA, VB}}, +{"vstribl.", VXVA(4,1037,0), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstribr.", VXVA(4,1037,1), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihl.", VXVA(4,1037,2), VXVA_MASK, POWER10, 0, {VD, VB}}, +{"vstrihr.", VXVA(4,1037,3), VXVA_MASK, POWER10, 0, {VD, VB}}, {"evmhosmi", VX (4,1037), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"evmhosmf", VX (4,1039), VX_MASK, PPCSPE, 0, {RS, RA, RB}}, {"machhwuo", XO (4, 12,1,0), XO_MASK, MULHW, 0, {RT, RA, RB}}, |