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authorJan Beulich <jbeulich@suse.com>2022-12-16 09:00:23 +0100
committerJan Beulich <jbeulich@suse.com>2022-12-16 09:00:23 +0100
commit689933867ad45487751a6bb411e69cd91ef24990 (patch)
treec98fc884ef010f164576b6b5c267fb1ecdb2d813 /opcodes/i386-tbl.h
parentde75275fe54c5536c8238f0f3f88bb7ac2222942 (diff)
downloadbinutils-gdb-689933867ad45487751a6bb411e69cd91ef24990.tar.gz
x86: change representation of extension opcode
Having a "None" field in the vast majority of entries is needlessly cluttering the overall table. Instead of this being a separate field, use a representation matching that of Intel SDM and AMD PM for the main use of the field: Append the value after a / as the separator.
Diffstat (limited to 'opcodes/i386-tbl.h')
-rw-r--r--opcodes/i386-tbl.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 4257cc8a3de..6f6e1a68bbb 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -58995,7 +58995,7 @@ static const insn_template i386_optab[] =
1, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 0, 0, 0, 0, 0 } } } },
- { "prefetchit0", 0x18, 1, 0x7,
+ { "prefetchit0", 0x18, 1, 7,
{ 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0 },
@@ -59008,7 +59008,7 @@ static const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
- { "prefetchit1", 0x18, 1, 0x6,
+ { "prefetchit1", 0x18, 1, 6,
{ 0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0 },