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authorJan Beulich <jbeulich@suse.com>2021-03-30 14:08:11 +0200
committerJan Beulich <jbeulich@suse.com>2021-03-30 14:08:11 +0200
commit6288d05f11827f993308e6a2693516e2c123c0fb (patch)
treec83372fd531e4f4c3fd551da638244be6b13b138 /opcodes/i386-reg.tbl
parentca5312a2416f065517c354cb6a9cc2616174761b (diff)
downloadbinutils-gdb-6288d05f11827f993308e6a2693516e2c123c0fb.tar.gz
x86: adjust st(<N>) parsing
st(1) ... st(7) will never be looked up in the hash table, so there's no point inserting the entries. It's also not really necessary to do a 2nd hash lookup after parsing the register number, nor is there a real reason for having both st and st(0) entries. Plus we can easily do away with the need for st to be first in the table.
Diffstat (limited to 'opcodes/i386-reg.tbl')
-rw-r--r--opcodes/i386-reg.tbl6
1 files changed, 2 insertions, 4 deletions
diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl
index 7ea974de665..be2c1ccc9f2 100644
--- a/opcodes/i386-reg.tbl
+++ b/opcodes/i386-reg.tbl
@@ -18,8 +18,6 @@
// Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
// 02110-1301, USA.
-// Make %st first as we test for it.
-st, Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33
// 8 bit regs
al, Class=Reg|Instance=Accum|Byte, 0, 0, Dw2Inval, Dw2Inval
cl, Class=Reg|Instance=RegC|Byte, 0, 1, Dw2Inval, Dw2Inval
@@ -300,8 +298,8 @@ eip, Dword, RegRex64, RegIP, 8, Dw2Inval
// for addressing.
riz, Qword|BaseIndex, RegRex64, RegIZ, Dw2Inval, Dw2Inval
eiz, Dword|BaseIndex, 0, RegIZ, Dw2Inval, Dw2Inval
-// fp regs.
-st(0), Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33
+// fp regs. No need for an explicit st(0) here.
+st, Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33
st(1), Class=Reg|Tbyte, 0, 1, 12, 34
st(2), Class=Reg|Tbyte, 0, 2, 13, 35
st(3), Class=Reg|Tbyte, 0, 3, 14, 36