Support Intel PREFETCHI

gas/ChangeLog:

	* NEWS: Add support for Intel PREFETCHI instruction.
	* config/tc-i386.c (load_insn_p): Use prefetch* to fold all prefetches.
	(md_assemble): Add warning for illegal input of PREFETCHI.
	* doc/c-i386.texi: Document .prefetchi.
	* testsuite/gas/i386/i386.exp: Run PREFETCHI tests.
	* testsuite/gas/i386/x86-64-lfence-load.d: Add PREFETCHI.
	* testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
	* testsuite/gas/i386/x86-64-prefetch.d: New test.
	* testsuite/gas/i386/x86-64-prefetchi-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-prefetchi-inval-register.d: Likewise..
	* testsuite/gas/i386/x86-64-prefetchi-inval-register.s: Likewise.
	* testsuite/gas/i386/x86-64-prefetchi-warn.l: Likewise.
	* testsuite/gas/i386/x86-64-prefetchi-warn.s: Likewise.
	* testsuite/gas/i386/x86-64-prefetchi.d: Likewise.
	* testsuite/gas/i386/x86-64-prefetchi.s: Likewise.

opcodes/ChangeLog:

	* i386-dis.c (reg_table): Add MOD_0F18_REG_6 and MOD_0F18_REG_7
	(x86_64_table): Add X86_64_0F18_REG_6_MOD_0 and X86_64_0F18_REG_7_MOD_0.
	(mod_table): Add MOD_0F18_REG_6 and MOD_0F18_REG_7.
	(prefix_table): Add PREFIX_0F18_REG_6_MOD_0_X86_64 and
	PREFIX_0F18_REG_7_MOD_0_X86_64.
	(PREFETCHI_Fixup): New.
	* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHI_FLAGS.
	(cpu_flags): Add CpuPREFETCHI.
	* i386-opc.h (CpuPREFETCHI): New.
	(i386_cpu_flags): Add cpuprefetchi.
	* i386-opc.tbl: Add Intel PREFETCHI instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

1 files changed, 76 insertions, 2 deletions

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index d94d6ad8464..329c8efe43b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -114,6 +114,7 @@ static void FXSAVE_Fixup (instr_info *, int, int);
 
 static void MOVSXD_Fixup (instr_info *, int, int);
 static void DistinctDest_Fixup (instr_info *, int, int);
+static void PREFETCHI_Fixup (instr_info *, int, int);
 
 /* This character is used to encode style information within the output
    buffers.  See oappend_insert_style for more details.  */
@@ -840,6 +841,8 @@ enum
   MOD_0F18_REG_1,
   MOD_0F18_REG_2,
   MOD_0F18_REG_3,
+  MOD_0F18_REG_6,
+  MOD_0F18_REG_7,
   MOD_0F1A_PREFIX_0,
   MOD_0F1B_PREFIX_0,
   MOD_0F1B_PREFIX_1,
@@ -1002,6 +1005,8 @@ enum
   PREFIX_0F11,
   PREFIX_0F12,
   PREFIX_0F16,
+  PREFIX_0F18_REG_6_MOD_0_X86_64,
+  PREFIX_0F18_REG_7_MOD_0_X86_64,
   PREFIX_0F1A,
   PREFIX_0F1B,
   PREFIX_0F1C,
@@ -1268,6 +1273,8 @@ enum
   X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_1,
   X86_64_0F01_REG_7_MOD_3_RM_6_PREFIX_3,
   X86_64_0F01_REG_7_MOD_3_RM_7_PREFIX_1,
+  X86_64_0F18_REG_6_MOD_0,
+  X86_64_0F18_REG_7_MOD_0,
   X86_64_0F24,
   X86_64_0F26,
   X86_64_0FC7_REG_6_MOD_3_PREFIX_1,
@@ -2720,8 +2727,8 @@ static const struct dis386 reg_table[][8] = {
     { MOD_TABLE (MOD_0F18_REG_3) },
     { "nopQ",		{ Ev }, 0 },
     { "nopQ",		{ Ev }, 0 },
-    { "nopQ",		{ Ev }, 0 },
-    { "nopQ",		{ Ev }, 0 },
+    { MOD_TABLE (MOD_0F18_REG_6) },
+    { MOD_TABLE (MOD_0F18_REG_7) },
   },
   /* REG_0F1C_P_0_MOD_0 */
   {
@@ -3079,6 +3086,22 @@ static const struct dis386 prefix_table[][4] = {
     { MOD_TABLE (MOD_0F16_PREFIX_2) },
   },
 
+  /* PREFIX_0F18_REG_6_MOD_0_X86_64 */
+  {
+    { "prefetchit1",	{ { PREFETCHI_Fixup, b_mode } }, 0 },
+    { "nopQ",		{ Ev }, 0 },
+    { "nopQ",		{ Ev }, 0 },
+    { "nopQ",		{ Ev }, 0 },
+  },
+
+  /* PREFIX_0F18_REG_7_MOD_0_X86_64 */
+  {
+    { "prefetchit0",	{ { PREFETCHI_Fixup, b_mode } }, 0 },
+    { "nopQ",		{ Ev }, 0 },
+    { "nopQ",		{ Ev }, 0 },
+    { "nopQ",		{ Ev }, 0 },
+  },
+
   /* PREFIX_0F1A */
   {
     { MOD_TABLE (MOD_0F1A_PREFIX_0) },
@@ -4299,6 +4322,18 @@ static const struct dis386 x86_64_table[][2] = {
     { "psmash",	{ Skip_MODRM }, 0 },
   },
 
+  /* X86_64_0F18_REG_6_MOD_0 */
+  {
+    { "nopQ",		{ Ev }, 0 },
+    { PREFIX_TABLE (PREFIX_0F18_REG_6_MOD_0_X86_64) },
+  },
+
+  /* X86_64_0F18_REG_7_MOD_0 */
+  {
+    { "nopQ",		{ Ev }, 0 },
+    { PREFIX_TABLE (PREFIX_0F18_REG_7_MOD_0_X86_64) },
+  },
+
   {
     /* X86_64_0F24 */
     { "movZ",		{ Em, Td }, 0 },
@@ -7981,6 +8016,16 @@ static const struct dis386 mod_table[][2] = {
     { "nopQ",		{ Ev }, 0 },
   },
   {
+    /* MOD_0F18_REG_6 */
+    { X86_64_TABLE (X86_64_0F18_REG_6_MOD_0) },
+    { "nopQ",		{ Ev }, 0 },
+  },
+  {
+    /* MOD_0F18_REG_7 */
+    { X86_64_TABLE (X86_64_0F18_REG_7_MOD_0) },
+    { "nopQ",		{ Ev }, 0 },
+  },
+  {
     /* MOD_0F1A_PREFIX_0 */
     { "bndldx",		{ Gbnd, Mv_bnd }, 0 },
     { "nopQ",		{ Ev }, 0 },
@@ -13752,3 +13797,32 @@ OP_Rounding (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
     }
   oappend (ins, "sae}");
 }
+
+static void
+PREFETCHI_Fixup (instr_info *ins, int bytemode, int sizeflag)
+{
+  if (ins->modrm.mod != 0 || ins->modrm.rm != 5)
+    {
+      if (ins->intel_syntax)
+	{
+	  ins->mnemonicendp = stpcpy (ins->obuf, "nop   ");
+	}
+      else
+	{
+	  USED_REX (REX_W);
+	  if (ins->rex & REX_W)
+	    ins->mnemonicendp = stpcpy (ins->obuf, "nopq  ");
+	  else
+	    {
+	      if (sizeflag & DFLAG)
+		ins->mnemonicendp = stpcpy (ins->obuf, "nopl  ");
+	      else
+		ins->mnemonicendp = stpcpy (ins->obuf, "nopw  ");
+	      ins->used_prefixes |= (ins->prefixes & PREFIX_DATA);
+	    }
+	}
+      bytemode = v_mode;
+    }
+
+  OP_M (ins, bytemode, sizeflag);
+}