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| author | Jan Beulich <jbeulich@suse.com> | 2020-07-06 13:41:58 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2020-07-06 13:41:58 +0200 |
| commit | 3a57774c7b3840355b5b21818515fa2b6df3e5e9 (patch) | |
| tree | f27b9d1ac1ae2c062431f735cbd57aba825b8643 /opcodes/i386-dis-evex-len.h | |
| parent | e74d9fa9cf7cbbcd290b74564d58456611a019bf (diff) | |
| download | binutils-gdb-3a57774c7b3840355b5b21818515fa2b6df3e5e9.tar.gz | |
x86: AVX512 VPERM{D,Q,PS,PD} insns need to honor EVEX.L'L
Just like (where they exist) their AVX counterparts do for VEX.L. For
all of them the 128-bit forms are invalid.
Diffstat (limited to 'opcodes/i386-dis-evex-len.h')
| -rw-r--r-- | opcodes/i386-dis-evex-len.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/opcodes/i386-dis-evex-len.h b/opcodes/i386-dis-evex-len.h index 51ce98f4a90..2941ab1dcbb 100644 --- a/opcodes/i386-dis-evex-len.h +++ b/opcodes/i386-dis-evex-len.h @@ -29,6 +29,13 @@ static const struct dis386 evex_len_table[][3] = { { VEX_W_TABLE (EVEX_W_0FD6_P_2) }, }, + /* EVEX_LEN_0F3816_P_2 */ + { + { Bad_Opcode }, + { "vpermp%XW", { XM, Vex, EXx }, 0 }, + { "vpermp%XW", { XM, Vex, EXx }, 0 }, + }, + /* EVEX_LEN_0F3819_P_2_W_0 */ { { Bad_Opcode }, @@ -71,6 +78,13 @@ static const struct dis386 evex_len_table[][3] = { { "vbroadcastf64x4", { XM, EXymm }, 0 }, }, + /* EVEX_LEN_0F3836_P_2 */ + { + { Bad_Opcode }, + { "vperm%LW", { XM, Vex, EXx }, 0 }, + { "vperm%LW", { XM, Vex, EXx }, 0 }, + }, + /* EVEX_LEN_0F385A_P_2_W_0 */ { { Bad_Opcode }, @@ -183,6 +197,20 @@ static const struct dis386 evex_len_table[][3] = { { "vscatterpf1qpd", { MVexVSIBQWpX }, 0 }, }, + /* EVEX_LEN_0F3A00_P_2_W_1 */ + { + { Bad_Opcode }, + { "vpermq", { XM, EXx, Ib }, 0 }, + { "vpermq", { XM, EXx, Ib }, 0 }, + }, + + /* EVEX_LEN_0F3A01_P_2_W_1 */ + { + { Bad_Opcode }, + { "vpermpd", { XM, EXx, Ib }, 0 }, + { "vpermpd", { XM, EXx, Ib }, 0 }, + }, + /* EVEX_LEN_0F3A14_P_2 */ { { "vpextrb", { Edqb, XM, Ib }, 0 }, |