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authorAlan Modra <amodra@gmail.com>2021-03-31 10:36:19 +1030
committerAlan Modra <amodra@gmail.com>2021-03-31 10:49:23 +1030
commit78933a4ad9ae9c2e274d41e6b3036ea582c47810 (patch)
treed88281747f95a9e279e16043aaf57c7093481d85 /opcodes/frv-opc.h
parent0a1b45a20eaa98d4d9026dc1fd17e79e741183af (diff)
downloadbinutils-gdb-78933a4ad9ae9c2e274d41e6b3036ea582c47810.tar.gz
Use bool in opcodes
cpu/ * frv.opc: Replace bfd_boolean with bool, FALSE with false, and TRUE with true throughout. opcodes/ * sysdep.h (POISON_BFD_BOOLEAN): Define. * aarch64-asm-2.c, * aarch64-asm.c, * aarch64-asm.h, * aarch64-dis-2.c, * aarch64-dis.c, * aarch64-dis.h, * aarch64-gen.c, * aarch64-opc.c, * aarch64-opc.h, * arc-dis.c, * arc-dis.h, * arc-fxi.h, * arc-opc.c, * arm-dis.c, * bfin-dis.c, * cris-dis.c, * csky-dis.c, * csky-opc.h, * dis-buf.c, * disassemble.c, * frv-opc.c, * frv-opc.h, * h8300-dis.c, * i386-dis.c, * m68k-dis.c, * metag-dis.c, * microblaze-dis.c, * microblaze-dis.h, * micromips-opc.c, * mips-dis.c, * mips-formats.h, * mips-opc.c, * mips16-opc.c, * mmix-dis.c, * msp430-dis.c, * nds32-dis.c, * nfp-dis.c, * nios2-dis.c, * ppc-dis.c, * riscv-dis.c, * score-dis.c, * score7-dis.c, * tic6x-dis.c, * v850-dis.c, * vax-dis.c, * wasm32-dis.c, * xtensa-dis.c: Replace bfd_boolean with bool, FALSE with false, and TRUE with true throughout.
Diffstat (limited to 'opcodes/frv-opc.h')
-rw-r--r--opcodes/frv-opc.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/opcodes/frv-opc.h b/opcodes/frv-opc.h
index 95f47974c2a..14fdc1238dc 100644
--- a/opcodes/frv-opc.h
+++ b/opcodes/frv-opc.h
@@ -58,15 +58,15 @@ typedef struct
const CGEN_INSN * insn[FRV_VLIW_SIZE];
} FRV_VLIW;
-bfd_boolean frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-bfd_boolean frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-bfd_boolean frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
-bfd_boolean frv_is_branch_insn (const CGEN_INSN *);
-bfd_boolean frv_is_float_insn (const CGEN_INSN *);
-bfd_boolean frv_is_media_insn (const CGEN_INSN *);
-void frv_vliw_reset (FRV_VLIW *, unsigned long, unsigned long);
-int frv_vliw_add_insn (FRV_VLIW *, const CGEN_INSN *);
-bfd_boolean spr_valid (long);
+bool frv_is_branch_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bool frv_is_float_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bool frv_is_media_major (CGEN_ATTR_VALUE_ENUM_TYPE, unsigned long);
+bool frv_is_branch_insn (const CGEN_INSN *);
+bool frv_is_float_insn (const CGEN_INSN *);
+bool frv_is_media_insn (const CGEN_INSN *);
+void frv_vliw_reset (FRV_VLIW *, unsigned long, unsigned long);
+int frv_vliw_add_insn (FRV_VLIW *, const CGEN_INSN *);
+bool spr_valid (long);
/* -- */
/* Enum declaration for frv instruction types. */
typedef enum cgen_insn_type {