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| author | Claudiu Zissulescu <claziss@gmail.com> | 2020-07-07 16:01:48 +0300 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@gmail.com> | 2020-07-07 16:01:48 +0300 |
| commit | f337259fbd5ee31c6794158457dcd0d23e5c0f13 (patch) | |
| tree | c5959369fc084d3a9ffceda85274e4eab5fcadae /opcodes/arc-opc.c | |
| parent | 35097e108abaf2008ebfccb7a333062f5952817f (diff) | |
| download | binutils-gdb-f337259fbd5ee31c6794158457dcd0d23e5c0f13.tar.gz | |
arc: Update vector instructions.
Update vadd2, vadd4h, vmac2h, vmpy2h, vsub4h vector instructions
arguments to discriminate between double/single register operands.
opcodes/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* arc-opc.c (insert_rbd): New function.
(RBD): Define.
(RBDdup): Likewise.
* arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
instructions.
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
Diffstat (limited to 'opcodes/arc-opc.c')
| -rw-r--r-- | opcodes/arc-opc.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 675738aa6be..94adde47836 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -103,6 +103,19 @@ insert_rcd (unsigned long long insn, return insn | ((value & 0x3F) << 6); } +static unsigned long long +insert_rbd (unsigned long long insn, + long long value, + const char ** errmsg) +{ + if (value & 0x01) + *errmsg = _("cannot use odd number source register"); + if (value == 60) + *errmsg = _("LP_COUNT register cannot be used as destination register"); + + return insn | ((value & 0x07) << 24) | (((value >> 3) & 0x07) << 12); +} + /* Dummy insert ZERO operand function. */ static unsigned long long @@ -1826,11 +1839,16 @@ const struct arc_operand arc_operands[] = { 6, 0, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rad, 0 }, #define RCD (RAD_CHK + 1) { 6, 6, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rcd, 0 }, +#define RBD (RCD + 1) + { 6, 6, 0, ARC_OPERAND_IR | ARC_OPERAND_TRUNCATE, insert_rbd, extract_rb }, +#define RBDdup (RBD + 1) + { 6, 12, 0, ARC_OPERAND_IR | ARC_OPERAND_DUPLICATE | ARC_OPERAND_TRUNCATE, + insert_rbd, extract_rb }, /* The plain integer register fields. Used by short instructions. */ -#define RA16 (RCD + 1) -#define RA_S (RCD + 1) +#define RA16 (RBDdup + 1) +#define RA_S (RBDdup + 1) { 4, 0, 0, ARC_OPERAND_IR, insert_ras, extract_ras }, #define RB16 (RA16 + 1) #define RB_S (RA16 + 1) |