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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2017-07-19 09:56:55 +0200 |
|---|---|---|
| committer | claziss <claziss@synopsys.com> | 2017-07-19 09:56:55 +0200 |
| commit | 7179e0e6b2e0ed7b220af8836a88ef308faf5898 (patch) | |
| tree | 236dfc3015bf0c6b982a65ddcb8214601c6893b1 /opcodes/arc-opc.c | |
| parent | 684d5a10b1332e2a1b03a1d6e7a899ef87b3ea16 (diff) | |
| download | binutils-gdb-7179e0e6b2e0ed7b220af8836a88ef308faf5898.tar.gz | |
[ARC] Add SJLI instruction.
include/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (SJLI): Add.
opcode/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
* arc-opc.c (extract_uimm12_20): New function.
(UIMM12_20): New operand.
(SIMM3_5_S): Adjust.
* arc-tbl.h (sjli): Add new instruction.
Diffstat (limited to 'opcodes/arc-opc.c')
| -rw-r--r-- | opcodes/arc-opc.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 7f934ce5b5d..f39704d3843 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -1269,6 +1269,18 @@ extract_nps_misc_imm_offset (unsigned long long insn, return ((insn >> 8) & 0x1f) * 4; } +static long long int +extract_uimm12_20 (unsigned long long insn ATTRIBUTE_UNUSED, + bfd_boolean * invalid ATTRIBUTE_UNUSED) +{ + int value = 0; + + value |= ((insn >> 6) & 0x003f) << 0; + value |= ((insn >> 0) & 0x003f) << 6; + + return value; +} + /* Include the generic extract/insert functions. Order is important as some of the functions present in the .h may be disabled via defines. */ @@ -1934,8 +1946,12 @@ const struct arc_operand arc_operands[] = {12, 0, -SIMM12_20R, ARC_OPERAND_SIGNED | ARC_OPERAND_PCREL, insert_simm12_20, extract_simm12_20}, + /* UIMM12_20 mask = 00000000000000000000111111222222. */ +#define UIMM12_20 (SIMM12_20R + 1) + {12, 0, 0, ARC_OPERAND_UNSIGNED, insert_simm12_20, extract_uimm12_20}, + /* SIMM3_5_S mask = 0000011100000000. */ -#define SIMM3_5_S (SIMM12_20R + 1) +#define SIMM3_5_S (UIMM12_20 + 1) {3, 0, 0, ARC_OPERAND_SIGNED | ARC_OPERAND_NCHK, insert_simm3s, extract_simm3s}, |