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| author | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-03-28 23:05:09 +0100 |
|---|---|---|
| committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-04-07 18:36:40 +0100 |
| commit | a42a4f8400ee232ceed5ecceb61873195984f1d9 (patch) | |
| tree | 5f158b39eca25d1464029f1a8fd3bd28d8a49670 /opcodes/arc-nps400-tbl.h | |
| parent | 1328504b287b2c284419d989e0d05e7d6d3ffa59 (diff) | |
| download | binutils-gdb-a42a4f8400ee232ceed5ecceb61873195984f1d9.tar.gz | |
arc/nps400: Add new instructions
Add some new control instructions to the opcodes library, and a new test
for these new instructions to the assembler. The new instructions use
an instruction flag longer than any seen before (on arc), and so the max
flag length is extended to accommodate this.
gas/ChangeLog:
* config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
* testsuite/gas/arc/nps400-2.d: New file.
* testsuite/gas/arc/nps400-2.s: New file.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
* arc-opc.c (arc_flag_operands): Add new flags.
(arc_flag_classes): Add new classes.
Diffstat (limited to 'opcodes/arc-nps400-tbl.h')
| -rw-r--r-- | opcodes/arc-nps400-tbl.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/opcodes/arc-nps400-tbl.h b/opcodes/arc-nps400-tbl.h index dc7b0661511..58d479fdd88 100644 --- a/opcodes/arc-nps400-tbl.h +++ b/opcodes/arc-nps400-tbl.h @@ -123,3 +123,20 @@ /* crc32<.r> 0,limm,u6 00111 110 01 110100 R 111 uuuuuu 111110 */ { "crc32", 0x3e74703e, 0xffff703f, ARC_OPCODE_NPS400, BITOP, NONE, { ZA, LIMM, UIMM6_20 }, { C_NPS_R }}, + +/**** Pipeline Control Instructions ****/ + +/* schd<.rw|.rd> */ +{ "schd", 0x3e6f7004, 0xffffff7f, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SCHD_RW }}, + +/* schd.wft.<.ie1|.ie2|.ie12> */ +{ "schd", 0x3e6f7044, 0xfffffcff, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SCHD_TRIG, C_NPS_SCHD_IE }}, + +/* sync<.rd|.wr> */ +{ "sync", 0x3e6f703f, 0xffffffbf, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SYNC }}, + +/* hwscd.off B */ +{ "hwschd", 0x386f00bf, 0xf8ff8fff, ARC_OPCODE_NPS400, CONTROL, NONE, { RB }, { C_NPS_HWS_OFF }}, + +/* hwscd.restore 0,C */ +{ "hwschd", 0x3e6f7003, 0xfffff03f, ARC_OPCODE_NPS400, CONTROL, NONE, { ZA, RC }, { C_NPS_HWS_RESTORE }}, |