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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:11 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:11 +0100 |
commit | 503fae12992e5dbf48b4e30cea8d35f31d87effe (patch) | |
tree | c1bd390a4f96d3ac0632de6ce917683fccf56667 /opcodes/aarch64-dis.c | |
parent | 586c62819f6eb9a77978628afd53ba12c91a11e7 (diff) | |
download | binutils-gdb-503fae12992e5dbf48b4e30cea8d35f31d87effe.tar.gz |
aarch64: Add support for predicate-as-counter registers
SME2 adds a new format for the existing SVE predicate registers:
predicates as counters rather than predicates as masks. In assembly
code, operands that interpret predicates as counters are written
pn<N> rather than p<N>.
This patch adds support for these registers and extends some
existing instructions to support them. Since the new forms
are just a programmer convenience, there's no need to make them
more restrictive than the earlier predicate-as-mask forms.
Diffstat (limited to 'opcodes/aarch64-dis.c')
0 files changed, 0 insertions, 0 deletions