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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:23 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:23 +0100 |
| commit | 1be5f94f9c85821287b9ae423f738a8bab499526 (patch) | |
| tree | a2ff1865a63e3c3082585b950486d9bb05e36b30 /opcodes/aarch64-dis.c | |
| parent | 3c17238bc9fe8a078a6199470291f07bab9c64c8 (diff) | |
| download | binutils-gdb-1be5f94f9c85821287b9ae423f738a8bab499526.tar.gz | |
[binutils][aarch64] New sve_shift_tsz_bhsd iclass.
This new iclass encodes the variant by which is the most significant bit
used of bits 23-22:20-19, where those bits are usually part of a
given constant operand.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
iclass.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_shift_tsz_bhsd iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_shift_tsz_bhsd iclass decode.
Diffstat (limited to 'opcodes/aarch64-dis.c')
| -rw-r--r-- | opcodes/aarch64-dis.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index 5571ab6c98f..b42e4d594c6 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2832,6 +2832,17 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst) variant = i; break; + case sve_shift_tsz_bhsd: + i = extract_fields (inst->value, 0, 2, FLD_SVE_tszh, FLD_SVE_tszl_19); + if (i == 0) + return FALSE; + while (i != 1) + { + i >>= 1; + variant += 1; + } + break; + case sve_shift_tsz_hsd: i = extract_fields (inst->value, 0, 2, FLD_SVE_sz, FLD_SVE_tszl_19); if (i == 0) |