[AArch64][SVE 29/32] Add new SVE core & FP register operands

SVE uses some new fields to store W, X and scalar FP registers.
This patch adds corresponding operands.

include/
	* opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
	(AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
	(AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.

opcodes/
	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE core
	and FP register operands.
	* aarch64-opc.h (FLD_SVE_Rm, FLD_SVE_Rn, FLD_SVE_Vd, FLD_SVE_Vm)
	(FLD_SVE_Vn): New aarch64_field_kinds.
	* aarch64-opc.c (fields): Add corresponding entries.
	(aarch64_print_operand): Handle the new SVE core and FP register
	operands.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-asm-2.c: Likewise.
	* aarch64-dis-2.c: Likewise.

gas/
	* config/tc-aarch64.c (parse_operands): Handle the new SVE core
	and FP register operands.

1 files changed, 16 insertions, 10 deletions

diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 110cf2e9470..c3bcfdbd6e1 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -10434,13 +10434,19 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 144:
     case 145:
     case 146:
-    case 159:
-    case 160:
+    case 147:
+    case 148:
     case 161:
     case 162:
     case 163:
     case 164:
+    case 165:
+    case 166:
     case 167:
+    case 168:
+    case 169:
+    case 170:
+    case 173:
       return aarch64_ext_regno (self, info, code, inst);
     case 8:
       return aarch64_ext_regrt_sysins (self, info, code, inst);
@@ -10485,14 +10491,14 @@ aarch64_extract_operand (const aarch64_operand *self,
     case 71:
     case 136:
     case 138:
-    case 151:
-    case 152:
     case 153:
     case 154:
     case 155:
     case 156:
     case 157:
     case 158:
+    case 159:
+    case 160:
       return aarch64_ext_imm (self, info, code, inst);
     case 38:
     case 39:
@@ -10610,16 +10616,16 @@ aarch64_extract_operand (const aarch64_operand *self,
       return aarch64_ext_sve_limm_mov (self, info, code, inst);
     case 137:
       return aarch64_ext_sve_scale (self, info, code, inst);
-    case 147:
-    case 148:
-      return aarch64_ext_sve_shlimm (self, info, code, inst);
     case 149:
     case 150:
+      return aarch64_ext_sve_shlimm (self, info, code, inst);
+    case 151:
+    case 152:
       return aarch64_ext_sve_shrimm (self, info, code, inst);
-    case 165:
+    case 171:
       return aarch64_ext_sve_index (self, info, code, inst);
-    case 166:
-    case 168:
+    case 172:
+    case 174:
       return aarch64_ext_sve_reglist (self, info, code, inst);
     default: assert (0); abort ();
     }