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authorPeter Bergner <bergner@linux.ibm.com>2021-09-25 18:21:17 -0500
committerPeter Bergner <bergner@linux.ibm.com>2021-09-25 18:21:17 -0500
commit4d5d5d4689541d0522cdadf3df4a550954bc2e9f (patch)
tree47edda141a0b58e5a72e6ae5de6b5017f2d97e45 /opcodes/ChangeLog
parent98bf5c02cfe9d13428a55c0da8d5f150d7c1fc54 (diff)
downloadbinutils-gdb-4d5d5d4689541d0522cdadf3df4a550954bc2e9f.tar.gz
PowerPC: Enable mfppr mfppr32, mtppr and mtppr32 extended mnemonics on POWER5
SPR 896 and the mfppr mfppr32, mtppr and mtppr32 extended mnemonics were added in ISA 2.03, so enable them on POWER5 and later. opcodes/ * ppc-opc.c (powerpc_opcodes) <mfppr, mfppr32, mtppr, mtppr32>: Enable on POWER5 and later. gas/ * testsuite/gas/ppc/power5.s: New test. * testsuite/gas/ppc/power5.d: Likewise. * testsuite/gas/ppc/ppc.exp: Run it. * testsuite/gas/ppc/power7.s: Remove tests for mfppr, mfppr32, mtppr and mtppr32. * testsuite/gas/ppc/power7.d: Likewise.
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+2021-09-25 Peter Bergner <bergner@linux.ibm.com>
+
+ * ppc-opc.c (powerpc_opcodes) <mfppr, mfppr32, mtppr, mtppr32>: Enable
+ on POWER5 and later.
+
2021-09-20 Andrew Burgess <andrew.burgess@embecosm.com>
* riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode