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| author | Nelson Chu <nelson.chu@sifive.com> | 2020-05-29 15:31:46 +0800 |
|---|---|---|
| committer | Nelson Chu <nelson.chu@sifive.com> | 2020-06-05 12:14:44 +0800 |
| commit | 3fc6c3dc2af2283bd89f1b1278b39922416e8d1b (patch) | |
| tree | 6c08c01a0b1b35f343db32e2093c01b8abd59923 /ld/testsuite/ld-riscv-elf | |
| parent | a975c88e6549c508ec86658e6816d7b8f16af13c (diff) | |
| download | binutils-gdb-3fc6c3dc2af2283bd89f1b1278b39922416e8d1b.tar.gz | |
RISC-V: Don't generate the ELF privilege attributes when no CSR are used.
gas/
* config/tc-riscv.c (explicit_csr): New static boolean.
Used to indicate CSR are explictly used.
(riscv_ip): Set explicit_csr to TRUE if any CSR is used.
(riscv_write_out_attrs): If we already have set elf priv
attributes, then generate them. Otherwise, don't generate
them when no CSR are used.
* testsuite/gas/riscv/attribute-01.d: Remove the priv attributes.
* testsuite/gas/riscv/attribute-02.d: Likewise.
* testsuite/gas/riscv/attribute-03.d: Likewise.
* testsuite/gas/riscv/attribute-04.d: Likewise.
* testsuite/gas/riscv/attribute-05.d: Likewise.
* testsuite/gas/riscv/attribute-06.d: Likewise.
* testsuite/gas/riscv/attribute-07.d: Likewise.
* testsuite/gas/riscv/attribute-08.d: Likewise.
* testsuite/gas/riscv/attribute-09.d: Likewise.
* testsuite/gas/riscv/attribute-10.d: Likewise.
* testsuite/gas/riscv/attribute-unknown.d: Likewise.
* testsuite/gas/riscv/attribute-11.s: New testcase.
* testsuite/gas/riscv/attribute-11.d: New testcase. The CSR is
used, so we should output the ELF priv attributes.
* testsuite/gas/riscv/attribute-12.d: New testcase. The CSR is
used, so output the priv attributes according to the -mpriv-spec.
* testsuite/gas/riscv/attribute-13.d: New testcase. The CSR isn't
used, so ignore the -mpriv-spec setting.
ld/
* testsuite/ld-riscv-elf/attr-merge-arch-01.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise.
* testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise.
* testsuite/ld-riscv-elf/call-relax.d: Add -mno-arch-attr.
Diffstat (limited to 'ld/testsuite/ld-riscv-elf')
10 files changed, 1 insertions, 27 deletions
diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d index 032f9641ad2..5baaba4c16f 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d @@ -7,6 +7,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: "rv32i2p0_m2p0" - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d index 54a7621f2c3..a7d79a1ea2b 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d @@ -7,6 +7,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: "rv32i2p0_m2p0" - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d index 67f0437e328..d46dee808de 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d @@ -7,6 +7,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: "rv32i2p0_m2p0_xbar2p0_xfoo2p0" - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d b/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d index 5585fac3b7b..e4d965a3e99 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-stack-align.d @@ -8,6 +8,4 @@ Attribute Section: riscv File Attributes Tag_RISCV_stack_align: 16-bytes Tag_RISCV_arch: [a-zA-Z0-9_\"].* - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* #... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d index 91011a2ba4d..10399307bbb 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-01.d @@ -8,6 +8,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: [a-zA-Z0-9_\"].* Tag_RISCV_unaligned_access: Unaligned access - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d index 5bdea27948b..12ca1c4dd31 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-02.d @@ -8,6 +8,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: [a-zA-Z0-9_\"].* Tag_RISCV_unaligned_access: Unaligned access - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d index ac886fb7681..e41351da011 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-03.d @@ -8,6 +8,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: [a-zA-Z0-9_\"].* Tag_RISCV_unaligned_access: Unaligned access - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d index dd45f76317a..ac2a766cfca 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-04.d @@ -7,6 +7,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: [a-zA-Z0-9_\"].* - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d index ef0c154a121..608c05e8c38 100644 --- a/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d +++ b/ld/testsuite/ld-riscv-elf/attr-merge-strict-align-05.d @@ -8,6 +8,3 @@ Attribute Section: riscv File Attributes Tag_RISCV_arch: [a-zA-Z0-9_\"].* Tag_RISCV_unaligned_access: Unaligned access - Tag_RISCV_priv_spec: [0-9_\"].* - Tag_RISCV_priv_spec_minor: [0-9_\"].* -#... diff --git a/ld/testsuite/ld-riscv-elf/call-relax.d b/ld/testsuite/ld-riscv-elf/call-relax.d index 46d9c84f35f..597ff675353 100644 --- a/ld/testsuite/ld-riscv-elf/call-relax.d +++ b/ld/testsuite/ld-riscv-elf/call-relax.d @@ -3,7 +3,7 @@ #source: call-relax-1.s #source: call-relax-2.s #source: call-relax-3.s -#as: -march=rv32ic +#as: -march=rv32ic -mno-arch-attr #ld: -melf32lriscv #objdump: -d #pass |