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| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:10 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:10 +0100 |
| commit | 60336e19658f1b820753ac09797f14b26e594cfa (patch) | |
| tree | fa19c746ec4f0f8639a847697c59a2195f2c8826 /include | |
| parent | 4eede8c2442115513a3f0c4f3610fbd6fe919a58 (diff) | |
| download | binutils-gdb-60336e19658f1b820753ac09797f14b26e594cfa.tar.gz | |
aarch64: Add +sme2
This patch adds bare-bones support for +sme2. Later patches
fill in the rest.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/aarch64.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index ef59d531d17..5c9b5e5dac1 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -100,6 +100,7 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_SME_I16I64 (1ULL << 58) /* SME I16I64. */ #define AARCH64_FEATURE_V8_8 (1ULL << 59) /* Armv8.8 processors. */ #define AARCH64_FEATURE_CSSC (1ULL << 60) /* Common Short Sequence Compression instructions. */ +#define AARCH64_FEATURE_SME2 (1ULL << 61) /* SME2. */ /* Crypto instructions are the combination of AES and SHA2. */ #define AARCH64_FEATURE_CRYPTO (AARCH64_FEATURE_SHA2 | AARCH64_FEATURE_AES) |