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authorCary Coutant <ccoutant@gmail.com>2020-12-11 14:05:53 -0800
committerCary Coutant <ccoutant@gmail.com>2020-12-13 15:22:30 -0800
commit4cf2ad720078a9f490dd5b5bc8893a926479196e (patch)
tree151332d71c2cbdf5c8c9f7218c6e62aad8a110e4 /include
parentf5756acc153e2605a0468b461ff4f6b0942a68b7 (diff)
downloadbinutils-gdb-4cf2ad720078a9f490dd5b5bc8893a926479196e.tar.gz
Update ELF headers and readelf with recent e_machine assignments.
binutils/ * readelf.c (get_machine_name): Update list of e_machine values. include/ * elf/common.h: Update list of e_machine values.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog4
-rw-r--r--include/elf/common.h12
2 files changed, 16 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index cc235e08fab..c2a63298032 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2020-12-11 Cary Coutant <ccoutant@gmail.com>
+
+ * elf/common.h: Update list of e_machine values.
+
2020-12-10 Nelson Chu <nelson.chu@sifive.com>
* opcode/riscv.h (M_ZEXTH, M_ZEXTW, M_SEXTB, M_SEXTH.): Added.
diff --git a/include/elf/common.h b/include/elf/common.h
index 6482f8c0bd1..37122ccd99b 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -339,9 +339,21 @@
#define EM_AMDGPU 224 /* AMD GPU architecture */
#define EM_RISCV 243 /* RISC-V */
#define EM_LANAI 244 /* Lanai 32-bit processor. */
+#define EM_CEVA 245 /* CEVA Processor Architecture Family */
+#define EM_CEVA_X2 246 /* CEVA X2 Processor Family */
#define EM_BPF 247 /* Linux BPF – in-kernel virtual machine. */
+#define EM_GRAPHCORE_IPU 248 /* Graphcore Intelligent Processing Unit */
+#define EM_IMG1 249 /* Imagination Technologies */
#define EM_NFP 250 /* Netronome Flow Processor. */
+#define EM_VE 251 /* NEC Vector Engine */
#define EM_CSKY 252 /* C-SKY processor family. */
+#define EM_ARC_COMPACT3_64 253 /* Synopsys ARCv2.3 64-bit */
+#define EM_MCS6502 254 /* MOS Technology MCS 6502 processor */
+#define EM_ARC_COMPACT3 255 /* Synopsys ARCv2.3 32-bit */
+#define EM_KVX 256 /* Kalray VLIW core of the MPPA processor family */
+#define EM_65816 257 /* WDC 65816/65C816 */
+#define EM_LOONGARCH 258 /* Loongson Loongarch */
+#define EM_KF32 259 /* ChipON KungFu32 */
/* If it is necessary to assign new unofficial EM_* values, please pick large
random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision