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| author | Ivo Raisr <ivo.raisr@oracle.com> | 2017-01-16 08:45:48 -0800 |
|---|---|---|
| committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2017-01-16 08:45:48 -0800 |
| commit | 7a36499abc7d110e83cb60f4895d0fcfbab43bf4 (patch) | |
| tree | 4e6aa21b87b5ed2e02b0c7e16d8449b022d976ce /gdb/sparc-tdep.h | |
| parent | 6aa1df2d44358bc3f098af76b0825dacc0a68bb6 (diff) | |
| download | binutils-gdb-7a36499abc7d110e83cb60f4895d0fcfbab43bf4.tar.gz | |
gdb: sparc: split real and pseudo registers.
gdb/ChangeLog:
2017-01-16 Ivo Raisr <ivo.raisr@oracle.com>
Split real and pseudo registers.
* sparc-tdep.h (SPARC_CORE_REGISTERS): New macro.
(sparc32_pseudo_regnum): New enum.
* sparc64-tdep.h (sparc64_pseudo_regnum): New enum.
* sparc-tdep.c (SPARC32_FPU_REGISTERS): New macro.
(SPARC32_CP0_REGISTERS): New macro.
(sparc32_pseudo_register_name): New function.
(sparc32_register_name): Use sparc32_pseudo_register_name.
(sparc32_pseudo_register_type): New function.
(sparc32_register_type): Use sparc32_pseudo_register_type.
(sparc32_pseudo_register_read, sparc32_pseudo_register_write): Handle
pseudo register numbers.
* sparc64-tdep.c SPARC64_FPU_REGISTERS): New macro.
(SPARC64_CP0_REGISTERS): New macro.
(sparc64_pseudo_register_name): New function.
(sparc64_register_name): Use sparc64_pseudo_register_name.
(sparc64_pseudo_register_type): New function.
(sparc64_register_type): Use sparc64_pseudo_register_type.
(sparc64_pseudo_register_read, sparc64_pseudo_register_write): Handle
pseudo register numbers.
(sparc64_store_floating_fields, sparc64_extract_floating_fields,
sparc64_store_arguments): Handle pseudo register numbers.
Diffstat (limited to 'gdb/sparc-tdep.h')
| -rw-r--r-- | gdb/sparc-tdep.h | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/gdb/sparc-tdep.h b/gdb/sparc-tdep.h index ae0c35474b3..4990873ce14 100644 --- a/gdb/sparc-tdep.h +++ b/gdb/sparc-tdep.h @@ -20,6 +20,12 @@ #ifndef SPARC_TDEP_H #define SPARC_TDEP_H 1 +#define SPARC_CORE_REGISTERS \ + "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \ + "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \ + "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ + "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7" + struct frame_info; struct gdbarch; struct regcache; @@ -85,7 +91,7 @@ struct gdbarch_tdep enum sparc_regnum { - SPARC_G0_REGNUM, /* %g0 */ + SPARC_G0_REGNUM = 0, /* %g0 */ SPARC_G1_REGNUM, SPARC_G2_REGNUM, SPARC_G3_REGNUM, @@ -140,9 +146,12 @@ enum sparc32_regnum SPARC32_NPC_REGNUM, /* %npc */ SPARC32_FSR_REGNUM, /* %fsr */ SPARC32_CSR_REGNUM, /* %csr */ +}; - /* Pseudo registers. */ - SPARC32_D0_REGNUM, /* %d0 */ +/* Pseudo registers. */ +enum sparc32_pseudo_regnum +{ + SPARC32_D0_REGNUM = 0, /* %d0 */ SPARC32_D30_REGNUM /* %d30 */ = SPARC32_D0_REGNUM + 15 }; |