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authorJim Blandy <jimb@codesourcery.com>2004-08-04 17:17:55 +0000
committerJim Blandy <jimb@codesourcery.com>2004-08-04 17:17:55 +0000
commit6ced10dd55b922c6e9f2dc6430b106bf1861a5d2 (patch)
treec62747fdb83bed37341f5e60dcd0f080e36ca172 /gdb/ppc-tdep.h
parent9f643768729aea5c02a006398794886c9dd8b48d (diff)
downloadbinutils-gdb-6ced10dd55b922c6e9f2dc6430b106bf1861a5d2.tar.gz
Change the layout of the PowerPC E500 raw register cache to allow
the lower 32-bit halves of the GPRS to be their own raw registers, not pseudoregisters. * ppc-tdep.h (struct gdbarch_tdep): Remove ppc_gprs_pseudo_p flag; add ppc_ev0_upper_regnum flag. * rs6000-tdep.c: #include "reggroups.h". (spe_register_p): Recognize the ev upper half registers as SPE registers. (init_sim_regno_table): Build gdb->sim mappings for the upper-half registers. (e500_move_ev_register): New function. (e500_pseudo_register_read, e500_pseudo_register_write): The 'ev' vector registers are the pseudo-registers now, formed by splicing together the gprs and the upper-half registers. (e500_register_reggroup_p): New function. (P): Macro deleted. (P8, A4): New macro. (PPC_EV_REGS, PPC_GPRS_PSEUDO_REGS): Macros deleted. (PPC_SPE_GP_REGS, PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): New macros. (registers_e500): Rearrange register set so that the raw register set contains 32-bit GPRs and upper-half registers, and the SPE vector registers become pseudo-registers. (rs6000_gdbarch_init): Don't initialize tdep->ppc_gprs_pseudo_p; it has been deleted. Initialize ppc_ev0_upper_regnum. Many other register numbers are now the same for the E500 as they are for other PowerPC variants. Register e500_register_reggroup_p as the register group function for the E500. * Makefile.in (rs6000-tdep.o): Update dependencies. Adapt PPC E500 native support to the new raw regcache layout. * ppc-linux-nat.c (struct gdb_evrregset_t): Doc fixes. (read_spliced_spe_reg, write_spliced_spe_reg): Deleted. (fetch_spe_register, store_spe_register): Handle fetching/storing all the SPE registers at once, if regno == -1. These now take over the job of fetch_spe_registers and store_spe_registers. (fetch_spe_registers, store_spe_registers): Deleted. (fetch_ppc_registers, store_ppc_registers): Fetch/store gprs unconditionally; they're always raw. Fetch/store SPE upper half registers, if present, instead of ev registers. (fetch_register, store_register): Remove sanity checks: gprs are never pseudo-registers now, so we never need to even mention any registers that are ever pseudoregisters.
Diffstat (limited to 'gdb/ppc-tdep.h')
-rw-r--r--gdb/ppc-tdep.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h
index 357c553be34..1a5bc6fbf05 100644
--- a/gdb/ppc-tdep.h
+++ b/gdb/ppc-tdep.h
@@ -144,7 +144,6 @@ struct gdbarch_tdep
int wordsize; /* size in bytes of fixed-point word */
const struct reg *regs; /* from current variant */
int ppc_gp0_regnum; /* GPR register 0 */
- int ppc_gprs_pseudo_p; /* non-zero if GPRs are pseudo-registers */
int ppc_toc_regnum; /* TOC register */
int ppc_ps_regnum; /* Processor (or machine) status (%msr) */
int ppc_cr_regnum; /* Condition register */
@@ -165,6 +164,7 @@ struct gdbarch_tdep
int ppc_mq_regnum; /* Multiply/Divide extension register */
int ppc_vr0_regnum; /* First AltiVec register */
int ppc_vrsave_regnum; /* Last AltiVec register */
+ int ppc_ev0_upper_regnum; /* First GPR upper half register */
int ppc_ev0_regnum; /* First ev register */
int ppc_ev31_regnum; /* Last ev register */
int ppc_acc_regnum; /* SPE 'acc' register */