2007-06-18 Markus Deuling <deuling@de.ibm.com>

	* gdbarch.sh (SP_REGNUM): Replace by gdbarch_sp_regnum.
	* v850-tdep.c (v850_unwind_sp): Likewise.
	* std-regs.c (value_of_builtin_frame_sp_reg): Likewise.
	* stack.c (frame_info): Likewise.
	* stabsread.c (define_symbol): Likewise.
	* sh-tdep.c (sh_push_dummy_call_fpu, sh_push_dummy_call_nofpu)
	(sh_dwarf2_frame_init_reg, sh_frame_cache, sh_frame_prev_register)
	(sh_unwind_sp): Likewise.
	* sh64-tdep.c (sh64_push_dummy_call, sh64_frame_cache)
	(sh64_frame_prev_register, sh64_unwind_sp): Likewise.
	* rs6000-tdep.c (rs6000_push_dummy_call, rs6000_unwind_dummy_id)
	(rs6000_frame_cache): Likewise.
	* rs6000-nat.c (store_register): Likewise.
	* remote-mips.c (mips_wait): Likewise.
	* procfs.c (procfs_fetch_registers, procfs_store_registers): Likewise.
	* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call)
	(ppc64_sysv_abi_push_dummy_call): Likewise.
	* ppcobsd-tdep.c (ppcobsd_sigtramp_frame_cache): Likewise.
	* ppcobsd-nat.c (ppcobsd_supply_pcb): Likewise.
	* ppcnbsd-tdep.c (ppcnbsd_sigtramp_cache_init): Likewise.
	* ppc-linux-tdep.c (ppc_linux_sigtramp_cache): Likewise.
	* m32r-rom.c (m32r_supply_register): Likewise.
	* frame.c (frame_sp_unwind): Likewise.
	* mips-tdep.c (mips_insn16_frame_cache)
	(mips_insn32_frame_cache): Likewise (comment).
	* m68klinux-nat.c (supply_gregset): Likewise.
	* m68k-tdep.c (m68k_get_longjmp_target): Likewise.
	* ia64-tdep.c (ia64_frame_prev_register): Likewise.
	* i386-tdep.c (i386_get_longjmp_target): Likewise.
	* dwarf2-frame.c (dwarf2_frame_default_init_reg): Likewise.
	* cris-tdep.c (cris_regnums, cris_sigcontext_addr)
	(cris_sigtramp_frame_unwind_cache, cris_push_dummy_call)
	(cris_scan_prologue, crisv32_scan_prologue, cris_unwind_sp)
	(cris_register_type, crisv32_register_type)
	(cris_dwarf2_frame_init_reg): Likewise.
	* arch-utils.c (legacy_virtual_frame_pointer): Likewise.
	* amd64-tdep.c (amd64_frame_prev_register): Likewise.
	* amd64-linux-tdep.c (amd64_linux_sigcontext_addr): Likewise.
	* libunwind-frame.c (libunwind_frame_cache): Likewise.

	* gdbarch.sh (PC_REGNUM): Replace by gdbarch_pc_regnum.
	* regcache.c (read_pc_pid, generic_target_write_pc): Likewise.
	* xtensa-tdep.c (xtensa_register_type, xtensa_supply_gregset)
	(xtensa_unwind_pc, xtensa_frame_cache, xtensa_frame_prev_register)
	(xtensa_extract_return_value, xtensa_store_return_value): Likewise.
	* v850-tdep.c (v850_unwind_pc): Likewise.
	* stack.c (frame_info): Likewise.
	* sh-tdep.c (sh_generic_show_regs, sh3_show_regs, sh2e_show_regs)
	(sh2a_show_regs, sh2a_nofpu_show_regs, sh3e_show_regs)
	(sh3_dsp_show_regs, sh4_show_regs, sh4_nofpu_show_regs)
	(sh_dwarf2_frame_init_reg, sh_frame_prev_register, sh_unwind_pc)
	(sh_dsp_show_regs): Likewise.
	* shnbsd-tdep.c (shnbsd_supply_gregset)
	(shnbsd_collect_gregset): Likewise.
	* shnbsd-nat.c (GETREGS_SUPPLIES): Likewise.
	* sh64-tdep.c (sh64_compact_reg_base_num, sh64_show_media_regs)
	(sh64_frame_prev_register, sh64_unwind_pc): Likewise.
	* rs6000-tdep.c (ppc_supply_gregset, ppc_collect_gregset)
	(6000_register_reggroup_p, rs6000_unwind_pc)
	(rs6000_frame_cache): Likewise.
	* rs6000-nat.c (regmap, rs6000_fetch_inferior_registers)
	(rs6000_store_inferior_registers): Likewise.
	* remote-mips.c (mips_wait, mips_load): Likewise.
	* procfs.c (procfs_fetch_registers, procfs_store_registers): Likewise.
	* ppcobsd-tdep.c (ppcobsd_sigtramp_frame_cache): Likewise.
	* ppcobsd-nat.c (ppcobsd_supply_pcb): Likewise.
	* ppcnbsd-tdep.c (ppcnbsd_sigtramp_cache_init): Likewise.
	* ppcnbsd-nat.c (getregs_supplies, ppcnbsd_supply_pcb): Likewise.
	* ppc-linux-tdep.c (ppc_linux_sigtramp_cache): Likewise.
	* ppc-linux-nat.c (ppc_register_u_addr, fetch_ppc_registers)
	(store_ppc_registers, fill_gregset): Likewise.
	* mips-tdep.c (mips_stub_frame_cache, mips_gdbarch_init): Likewise.
	* mipsnbsd-tdep.c (mipsnbsd_supply_reg, mipsnbsd_fill_reg): Likewise.
	* mipsnbsd-nat.c (getregs_supplies): Likewise.
	* m68k-tdep.c (m68k_register_type, m68k_unwind_pc): Likewise.
	* m68klinux-nat.c (supply_gregset): Likewise.
	* irix5-nat.c (fill_gregset): Likewise.
	* i386-tdep.c (i386_unwind_pc): Likewise.
	* i386-linux-nat.c (i386_linux_resume): Likewise.
	* frame.c (get_prev_frame_1): Likewise.
	* dwarf2-frame.c (dwarf2_frame_default_init_reg): Likewise.
	* dbug-rom.c (dbug_supply_register): Likewise.
	* cris-tdep.c (cris_sigtramp_frame_unwind_cache, cris_scan_prologue)
	(crisv32_scan_prologue, cris_unwind_pc, cris_register_size)
	(cris_register_type, crisv32_register_type, crisv32_register_name)
	(cris_dwarf2_frame_init_reg, find_step_target)
	(cris_software_single_step, cris_supply_gregset)
	(cris_regnums): Likewise.
	* alpha-linux-nat.c (alpha_linux_register_u_offset): Likewise.
	* aix-thread.c (special_register_p, supply_sprs64, supply_sprs32)
	(fill_sprs64, fill_sprs32, store_regs_user_thread): Likewise.
	* mips-linux-tdep.c (mips_linux_write_pc): Likewise.

	* gdbarch.sh (PS_REGNUM): Replace by gdbarch_ps_regnum.
	* dbug-rom.c (dbug_supply_register): Likewise.
	* xtensa-tdep.c (xtensa_supply_gregset, xtensa_frame_cache)
	(xtensa_frame_prev_register, xtensa_push_dummy_call): Likewise.
	* win32-nat.c (win32_resume): Likewise.
	* std-regs.c (value_of_builtin_frame_ps_reg)
	(value_of_builtin_frame_pc_reg): Likewise.
	* m68k-tdep.c (m68k_register_type): Likewise.
	* m68klinux-nat.c (supply_gregset): Likewise.

	* gdbarch.sh (FP0_REGNUM): Replace by gdbarch_fp0_regnum.
	* sh-tdep.c (sh_extract_return_value_fpu, sh_store_return_value_fpu)
	(sh2e_show_regs, sh2a_show_regs, sh3e_show_regs, sh4_show_regs)
	(sh_sh2a_register_type, sh_sh3e_register_type, sh_sh4_register_type)
	(fv_reg_base_num, dr_reg_base_num): Likewise.
	* sh64-tdep.c (sh64_fv_reg_base_num, sh64_dr_reg_base_num)
	(sh64_fpp_reg_base_num, sh64_compact_reg_base_num, sh64_push_dummy_call)
	(sh64_extract_return_value, sh64_store_return_value)
	(sh64_show_media_regs, sh64_show_compact_regs, sh64_register_type)
	(sh64_do_fp_register, sh64_media_print_registers_info): Likewise.
	* procfs.c (procfs_fetch_registers, procfs_store_registers)
	(invalidate_cache): Likewise.
	* ppc-linux-tdep.c (ppc_linux_sigtramp_cache): Likewise.
	* mipsnbsd-tdep.c (mipsnbsd_supply_fpreg)
	(mipsnbsd_fill_fpreg): Likewise.
	* mipsnbsd-nat.c (mipsnbsd_fetch_inferior_registers)
	(mipsnbsd_store_inferior_registers): Likewise.
	* mips-linux-tdep.c (mips_supply_fpregset, mips_fill_fpregset)
	(mips64_supply_fpregset, mips64_fill_fpregset): Likewise.
	* mips-linux-nat.c (mips64_linux_register_addr): Likewise.
	* m68k-tdep.c (m68k_register_type, m68k_convert_register_p): Likewise.
	* m68klinux-nat.c (getfpregs_supplies, supply_fpregset)
	(fill_fpregset): Likewise.
	* irix5-nat.c (supply_fpregset, fill_fpregset): Likewise.
	* i386-tdep.h (struct_return): Likewise (comment).
	* i386-nto-tdep.c (i386nto_register_area): Likewise.
	* go32-nat.c (fetch_register, go32_fetch_registers, store_register)
	(go32_store_registers): Likewise.
	* alpha-tdep.c (alpha_next_pc): Likewise.
	* alpha-linux-nat.c (alpha_linux_register_u_offset): Likewise.
	* alphabsd-nat.c (alphabsd_fetch_inferior_registers)
	(alphabsd_store_inferior_registers): Likewise.
	* core-regset.c (fetch_core_registers): Likewise.
	* i386v4-nat.c (supply_fpregset, fill_fpregset): Likewise.

	* gdbarch.c, gdbarch.h: Regenerate.

1 files changed, 58 insertions, 36 deletions

diff --git a/gdb/cris-tdep.c b/gdb/cris-tdep.c
index 039e24f1fdd..a8817e9b50a 100644
--- a/gdb/cris-tdep.c
+++ b/gdb/cris-tdep.c
@@ -74,8 +74,8 @@ enum cris_num_regs
    ARG2_REGNUM Contains the second parameter to a function.
    ARG3_REGNUM Contains the third parameter to a function.
    ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
-   SP_REGNUM   Contains address of top of stack.
-   PC_REGNUM   Contains address of next instruction.
+   gdbarch_sp_regnum Contains address of top of stack.
+   gdbarch_pc_regnum Contains address of next instruction.
    SRP_REGNUM  Subroutine return pointer register.
    BRP_REGNUM  Breakpoint return pointer register.  */
 
@@ -279,7 +279,7 @@ cris_sigcontext_addr (struct frame_info *next_frame)
   CORE_ADDR sp;
   char buf[4];
 
-  frame_unwind_register (next_frame, SP_REGNUM, buf);
+  frame_unwind_register (next_frame, gdbarch_sp_regnum (current_gdbarch), buf);
   sp = extract_unsigned_integer (buf, 4);
 
   /* Look for normal sigtramp frame first.  */
@@ -359,7 +359,7 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
   info->return_pc = 0;
   info->leaf_function = 0;
 
-  frame_unwind_register (next_frame, SP_REGNUM, buf);
+  frame_unwind_register (next_frame, gdbarch_sp_regnum (current_gdbarch), buf);
   info->base = extract_unsigned_integer (buf, 4);
 
   addr = cris_sigcontext_addr (next_frame);
@@ -385,8 +385,10 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
 	 it though since that will mean that the backtrace will show a PC 
 	 different from what is shown when stopped.  */
       info->saved_regs[IRP_REGNUM].addr = addr + (19 * 4);
-      info->saved_regs[PC_REGNUM] = info->saved_regs[IRP_REGNUM];
-      info->saved_regs[SP_REGNUM].addr = addr + (24 * 4);
+      info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+	= info->saved_regs[IRP_REGNUM];
+      info->saved_regs[gdbarch_sp_regnum (current_gdbarch)].addr
+	= addr + (24 * 4);
     }
   else
     {
@@ -413,9 +415,11 @@ cris_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
 	 
 	 This could be solved by a couple of read_memory_unsigned_integer and a
 	 trad_frame_set_value.  */
-      info->saved_regs[PC_REGNUM] = info->saved_regs[ERP_REGNUM];
+      info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+	= info->saved_regs[ERP_REGNUM];
 
-      info->saved_regs[SP_REGNUM].addr = addr + (25 * 4);
+      info->saved_regs[gdbarch_sp_regnum (current_gdbarch)].addr
+	= addr + (25 * 4);
     }
   
   return info;
@@ -986,7 +990,8 @@ cris_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
     }
 
   /* Finally, update the SP register.  */
-  regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
+  regcache_cooked_write_unsigned (regcache,
+				  gdbarch_sp_regnum (current_gdbarch), sp);
 
   return sp;
 }
@@ -1180,7 +1185,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
 	    }
           continue;
         }
-      else if (cris_get_operand2 (insn) == SP_REGNUM 
+      else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (current_gdbarch)
                && cris_get_mode (insn) == 0x0000
                && cris_get_opcode (insn) == 0x000A)
         {
@@ -1193,12 +1198,13 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
       else if (cris_get_mode (insn) == 0x0002 
                && cris_get_opcode (insn) == 0x000F
                && cris_get_size (insn) == 0x0003
-               && cris_get_operand1 (insn) == SP_REGNUM)
+               && cris_get_operand1 (insn) == gdbarch_sp_regnum
+					      (current_gdbarch))
         {
           /* movem r<regsave>,[sp] */
           regsave = cris_get_operand2 (insn);
         }
-      else if (cris_get_operand2 (insn) == SP_REGNUM
+      else if (cris_get_operand2 (insn) == gdbarch_sp_regnum (current_gdbarch)
                && ((insn & 0x0F00) >> 8) == 0x0001
                && (cris_get_signed_offset (insn) < 0))
         {
@@ -1215,7 +1221,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
           if (cris_get_mode (insn_next) == PREFIX_ASSIGN_MODE
               && cris_get_opcode (insn_next) == 0x000F
               && cris_get_size (insn_next) == 0x0003
-              && cris_get_operand1 (insn_next) == SP_REGNUM)
+              && cris_get_operand1 (insn_next) == gdbarch_sp_regnum
+						  (current_gdbarch))
             {
               regsave = cris_get_operand2 (insn_next);
             }
@@ -1257,7 +1264,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
           insn_next = read_memory_unsigned_integer (pc, 2);
           pc += 2;
           regno = cris_get_operand2 (insn_next);
-          if ((regno >= 0 && regno < SP_REGNUM)
+          if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
               && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
               && cris_get_opcode (insn_next) == 0x000F)
             {
@@ -1281,7 +1288,7 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
 	  insn_next = read_memory_unsigned_integer (pc, 2);
           pc += 2;
           regno = cris_get_operand2 (insn_next);
-          if ((regno >= 0 && regno < SP_REGNUM)
+          if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
               && cris_get_mode (insn_next) == PREFIX_OFFSET_MODE
               && cris_get_opcode (insn_next) == 0x0009
               && cris_get_operand1 (insn_next) == regno)
@@ -1335,7 +1342,9 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
       ULONGEST this_base;      
       /* Assume that the FP is this frame's SP but with that pushed
          stack space added back.  */
-      frame_unwind_unsigned_register (next_frame, SP_REGNUM, &this_base);
+      frame_unwind_unsigned_register (next_frame,
+				      gdbarch_sp_regnum (current_gdbarch),
+				      &this_base);
       info->base = this_base;
       info->prev_sp = info->base + info->size;
     }
@@ -1354,7 +1363,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
 
   /* The previous frame's SP needed to be computed.  Save the computed
      value.  */
-  trad_frame_set_value (info->saved_regs, SP_REGNUM, info->prev_sp);
+  trad_frame_set_value (info->saved_regs,
+			gdbarch_sp_regnum (current_gdbarch), info->prev_sp);
 
   if (!info->leaf_function)
     {
@@ -1372,7 +1382,8 @@ cris_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
     }
 
   /* The PC is found in SRP (the actual register or located on the stack).  */
-  info->saved_regs[PC_REGNUM] = info->saved_regs[SRP_REGNUM];
+  info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+    = info->saved_regs[SRP_REGNUM];
 
   return pc;
 }
@@ -1403,12 +1414,15 @@ crisv32_scan_prologue (CORE_ADDR pc, struct frame_info *next_frame,
     }
 
   /* The SP is assumed to be unaltered.  */
-  frame_unwind_unsigned_register (next_frame, SP_REGNUM, &this_base);
+  frame_unwind_unsigned_register (next_frame,
+				  gdbarch_sp_regnum (current_gdbarch),
+				   &this_base);
   info->base = this_base;
   info->prev_sp = this_base;
       
   /* The PC is assumed to be found in SRP.  */
-  info->saved_regs[PC_REGNUM] = info->saved_regs[SRP_REGNUM];
+  info->saved_regs[gdbarch_pc_regnum (current_gdbarch)]
+    = info->saved_regs[SRP_REGNUM];
 
   return pc;
 }
@@ -1447,7 +1461,8 @@ static CORE_ADDR
 cris_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
 {
   ULONGEST pc;
-  frame_unwind_unsigned_register (next_frame, PC_REGNUM, &pc);
+  frame_unwind_unsigned_register (next_frame,
+				  gdbarch_pc_regnum (current_gdbarch), &pc);
   return pc;
 }
 
@@ -1455,7 +1470,8 @@ static CORE_ADDR
 cris_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
 {
   ULONGEST sp;
-  frame_unwind_unsigned_register (next_frame, SP_REGNUM, &sp);
+  frame_unwind_unsigned_register (next_frame,
+				  gdbarch_sp_regnum (current_gdbarch), &sp);
   return sp;
 }
 
@@ -1550,7 +1566,8 @@ cris_register_size (int regno)
       /* Special register not applicable to this CRIS version.  */
       return 0;
     }
-  else if (regno >= PC_REGNUM && regno < gdbarch_num_regs (current_gdbarch))
+  else if (regno >= gdbarch_pc_regnum (current_gdbarch)
+	   && regno < gdbarch_num_regs (current_gdbarch))
     {
       /* This will apply to CRISv32 only where there are additional registers
 	 after the special registers (pseudo PC and support registers).  */
@@ -1651,11 +1668,12 @@ crisv32_cannot_store_register (int regno)
 static struct type *
 cris_register_type (struct gdbarch *gdbarch, int regno)
 {
-  if (regno == PC_REGNUM)
+  if (regno == gdbarch_pc_regnum (current_gdbarch))
     return builtin_type_void_func_ptr;
-  else if (regno == SP_REGNUM || regno == CRIS_FP_REGNUM)
+  else if (regno == gdbarch_sp_regnum (current_gdbarch)
+	   || regno == CRIS_FP_REGNUM)
     return builtin_type_void_data_ptr;
-  else if ((regno >= 0 && regno < SP_REGNUM)
+  else if ((regno >= 0 && regno < gdbarch_sp_regnum (current_gdbarch))
 	   || (regno >= MOF_REGNUM && regno <= USP_REGNUM))
     /* Note: R8 taken care of previous clause.  */
     return builtin_type_uint32;
@@ -1671,9 +1689,10 @@ cris_register_type (struct gdbarch *gdbarch, int regno)
 static struct type *
 crisv32_register_type (struct gdbarch *gdbarch, int regno)
 {
-  if (regno == PC_REGNUM)
+  if (regno == gdbarch_pc_regnum (current_gdbarch))
     return builtin_type_void_func_ptr;
-  else if (regno == SP_REGNUM || regno == CRIS_FP_REGNUM)
+  else if (regno == gdbarch_sp_regnum (current_gdbarch)
+	   || regno == CRIS_FP_REGNUM)
     return builtin_type_void_data_ptr;
   else if ((regno >= 0 && regno <= ACR_REGNUM)
 	   || (regno >= EXS_REGNUM && regno <= SPC_REGNUM)
@@ -1801,7 +1820,7 @@ crisv32_register_name (int regno)
     {
       return cris_special_register_name (regno);
     }
-  else if (regno == PC_REGNUM)
+  else if (regno == gdbarch_pc_regnum (current_gdbarch))
     {
       return "pc";
     }
@@ -1854,11 +1873,11 @@ cris_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
 			    struct frame_info *next_frame)
 {
   /* The return address column.  */
-  if (regnum == PC_REGNUM)
+  if (regnum == gdbarch_pc_regnum (current_gdbarch))
     reg->how = DWARF2_FRAME_REG_RA;
 
   /* The call frame address.  */
-  else if (regnum == SP_REGNUM)
+  else if (regnum == gdbarch_sp_regnum (current_gdbarch))
     reg->how = DWARF2_FRAME_REG_CFA;
 }
 
@@ -2090,7 +2109,8 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env)
   do
     {
       /* Read an instruction from the client.  */
-      insn = read_memory_unsigned_integer (inst_env->reg[PC_REGNUM], 2);
+      insn = read_memory_unsigned_integer
+	     (inst_env->reg[gdbarch_pc_regnum (current_gdbarch)], 2);
 
       /* If the instruction is not in a delay slot the new content of the
          PC is [PC] + 2.  If the instruction is in a delay slot it is not
@@ -2099,12 +2119,13 @@ find_step_target (struct frame_info *frame, inst_env_type *inst_env)
          Just make sure it is a valid instruction.  */
       if (!inst_env->delay_slot_pc_active)
         {
-          inst_env->reg[PC_REGNUM] += 2;
+          inst_env->reg[gdbarch_pc_regnum (current_gdbarch)] += 2;
         }
       else
         {
           inst_env->delay_slot_pc_active = 0;
-          inst_env->reg[PC_REGNUM] = inst_env->delay_slot_pc;
+          inst_env->reg[gdbarch_pc_regnum (current_gdbarch)]
+	    = inst_env->delay_slot_pc;
         }
       /* Analyse the present instruction.  */
       i = find_cris_op (insn, inst_env);
@@ -2144,7 +2165,8 @@ cris_software_single_step (struct frame_info *frame)
     {
       /* Insert at most two breakpoints.  One for the next PC content
          and possibly another one for a branch, jump, etc.  */
-      CORE_ADDR next_pc = (CORE_ADDR) inst_env.reg[PC_REGNUM];
+      CORE_ADDR next_pc =
+	(CORE_ADDR) inst_env.reg[gdbarch_pc_regnum (current_gdbarch)];
       insert_single_step_breakpoint (next_pc);
       if (inst_env.branch_found 
 	  && (CORE_ADDR) inst_env.branch_break_address != next_pc)
@@ -3882,7 +3904,7 @@ cris_supply_gregset (struct regcache *regcache, elf_gregset_t *gregsetp)
       /* Needed to set pseudo-register PC for CRISv32.  */
       /* FIXME: If ERP is in a delay slot at this point then the PC will
 	 be wrong.  Issue a warning to alert the user.  */
-      regcache_raw_supply (regcache, PC_REGNUM, 
+      regcache_raw_supply (regcache, gdbarch_pc_regnum (current_gdbarch),
 			   (char *)&regp[ERP_REGNUM]);
 
       if (*(char *)&regp[ERP_REGNUM] & 0x1)