diff options
| author | Jan Beulich <jbeulich@suse.com> | 2022-12-12 13:53:40 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-12-12 13:53:40 +0100 |
| commit | 77a19f0e19391dd243f8090a613324c8836e1f8a (patch) | |
| tree | 621153d799fd4e28aa09ba2da60cad0c5a30aabd /gas | |
| parent | e3669c7f7ba400bb56738d5460a3ea194916599d (diff) | |
| download | binutils-gdb-77a19f0e19391dd243f8090a613324c8836e1f8a.tar.gz | |
x86: drop (now) stray IsString
The need for them on the operand-less string insns has gone away with
the removal of maybe_adjust_templates() and associated logic. Since
i386_index_check() needs adjustment then anyway, take the opportunity
and also simplify it, possible again as a result of said removal (plus
the opcode template adjustments done here).
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/config/tc-i386.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 1a8af658f5d..6e14804faed 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -11381,11 +11381,9 @@ i386_index_check (const char *operand_string) { const char *kind = "base/index"; enum flag_code addr_mode = i386_addressing_mode (); - const insn_template *t = current_templates->start; + const insn_template *t = current_templates->end - 1; - if (t->opcode_modifier.isstring - && (current_templates->end[-1].opcode_modifier.isstring - || i.mem_operands)) + if (t->opcode_modifier.isstring) { /* Memory operands of string insns are special in that they only allow a single register (rDI, rSI, or rBX) as their memory address. */ @@ -11402,14 +11400,12 @@ i386_index_check (const char *operand_string) if (t->opcode_modifier.prefixok == PrefixRep) { - int es_op = current_templates->end[-1].opcode_modifier.isstring - - IS_STRING_ES_OP0; + int es_op = t->opcode_modifier.isstring - IS_STRING_ES_OP0; int op = 0; - if (!current_templates->end[-1].operand_types[0].bitfield.baseindex + if (!t->operand_types[0].bitfield.baseindex || ((!i.mem_operands != !intel_syntax) - && current_templates->end[-1].operand_types[1] - .bitfield.baseindex)) + && t->operand_types[1].bitfield.baseindex)) op = 1; expected_reg = (const reg_entry *) str_hash_find (reg_hash, @@ -11452,6 +11448,8 @@ i386_index_check (const char *operand_string) } else { + t = current_templates->start; + if (addr_mode != CODE_16BIT) { /* 32-bit/64-bit checks. */ |