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author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-09-30 21:01:34 +0100 |
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committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-09-30 21:01:34 +0100 |
commit | 50aaf5e6ee2687417ca4fe1a596e54a7691828db (patch) | |
tree | ac9fe55ba795745c0d911f783b47f42612ce62b9 /gas | |
parent | db67a8d5941307babd6342fbd52a68ca3d3d974b (diff) | |
download | binutils-gdb-50aaf5e6ee2687417ca4fe1a596e54a7691828db.tar.gz |
aarch64: Enable Cortex-X2 CPU
This patch is adding support for Cortex-X2 CPU.
gas:
* NEWS: Update docs.
* config/tc-aarch64.c: Add Cortex-X2.
* doc/c-aarch64.texi: Update docs.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/NEWS | 2 | ||||
-rw-r--r-- | gas/config/tc-aarch64.c | 6 | ||||
-rw-r--r-- | gas/doc/c-aarch64.texi | 3 |
3 files changed, 9 insertions, 2 deletions
@@ -1,6 +1,6 @@ -*- text -*- -* Add support for Cortex-A510 and Cortex-A710 for AArch64. +* Add support for Cortex-A510, Cortex-A710, Cortex-X2 for AArch64. * Outputs of .ds.x directive and .tfloat directive with hex input from x86 assembler have been reduced from 12 bytes to 10 bytes to match the diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 490ebd7c4b2..2ea55d8a875 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -9132,6 +9132,12 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = { | AARCH64_FEATURE_SSBS | AARCH64_FEATURE_PROFILE), "Cortex-X1"}, + {"cortex-x2", AARCH64_FEATURE (AARCH64_ARCH_V9, + AARCH64_FEATURE_BFLOAT16 + | AARCH64_FEATURE_I8MM + | AARCH64_FEATURE_MEMTAG + | AARCH64_FEATURE_SVE2_BITPERM), + "Cortex-X2"}, {"generic", AARCH64_ARCH_V8, NULL}, {NULL, AARCH64_ARCH_NONE, NULL} diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index ec2cdca6abc..8263c1a8aca 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -87,8 +87,9 @@ on the target processor. The following processor names are recognized: @code{xgene1} @code{xgene2}, @code{cortex-r82}, +@code{cortex-x1}, and -@code{cortex-x1}. +@code{cortex-x2}. The special name @code{all} may be used to allow the assembler to accept instructions valid for any supported processor, including all optional extensions. |