[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A

This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)

This patch adds the data processing instructions that are new to
ARMv8.5-A.

1) There are 2 instructions: xaflag, axflag, that are added to
manipulate the states of the flag and are used to convert between the
Arm representation and the fcmp representation.

2) The other instructions are rounding instructions which have 8
versions based on whether the floating-point number is a
Single-Precision or Double-Precision number, whether the target
integer is a 32-bit or 64-bit integer and whether the rounding mode is
the ambient rounding mode or to zero. Each of these instruction is
available in both Scalar and Vector forms.

Since both 1) and 2) have separate identification mechanism and it is
permissible that a ARMv8.4 compliant implementation may include any
arbitrary subset of the ARMv8.5 features unless otherwise specified,
new feature bits are added.

*** include/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_FLAGMANIP): New.
	(AARCH64_FEATURE_FRINTTS): New.
	(AARCH64_ARCH_V8_5): Add both by default.

*** opcodes/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* aarch64-tbl.h (aarch64_feature_flagmanip): New.
	(aarch64_feature_frintts): New.
	(FLAGMANIP, FRINTTS): New.
	(aarch64_opcode_table): Add entries for xaflag, axflag
	and frint[32,64][x,z] instructions.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

*** gas/ChangeLog ***

2018-10-09  Sudakshina Das  <sudi.das@arm.com>

	* testsuite/gas/aarch64/armv8_5-a-dp.s: New.
	* testsuite/gas/aarch64/armv8_5-a-dp.d: New.

3 files changed, 55 insertions, 0 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index bed87c9048e..aed63954208 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
 2018-10-09  Sudakshina Das  <sudi.das@arm.com>
 
+	* testsuite/gas/aarch64/armv8_5-a-dp.s: New.
+	* testsuite/gas/aarch64/armv8_5-a-dp.d: New.
+
+2018-10-09  Sudakshina Das  <sudi.das@arm.com>
+
 	* config/tc-aarch64.c (aarch64_archs): New entry for armv8.5-a.
 	* doc/c-aarch64.texi: Add documentation for the same.
 
diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-dp.d b/gas/testsuite/gas/aarch64/armv8_5-a-dp.d
new file mode 100644
index 00000000000..d0667543f94
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/armv8_5-a-dp.d
@@ -0,0 +1,31 @@
+#as: -march=armv8.5-a
+# objdump: -d
+
+.*: .*
+
+
+Disassembly of section \.text:
+
+0+0 <func>:
+.*:	d500403f 	xaflag
+.*:	d500405f 	axflag
+.*:	1e284041 	frint32z	s1, s2
+.*:	1e684062 	frint32z	d2, d3
+.*:	1e28c041 	frint32x	s1, s2
+.*:	1e68c062 	frint32x	d2, d3
+.*:	1e294041 	frint64z	s1, s2
+.*:	1e694062 	frint64z	d2, d3
+.*:	1e29c041 	frint64x	s1, s2
+.*:	1e69c062 	frint64x	d2, d3
+.*:	4e61e820 	frint32z	v0.2d, v1.2d
+.*:	0e21e820 	frint32z	v0.2s, v1.2s
+.*:	4e21e820 	frint32z	v0.4s, v1.4s
+.*:	6e61e820 	frint32x	v0.2d, v1.2d
+.*:	2e21e820 	frint32x	v0.2s, v1.2s
+.*:	6e21e820 	frint32x	v0.4s, v1.4s
+.*:	4e61f820 	frint64z	v0.2d, v1.2d
+.*:	0e21f820 	frint64z	v0.2s, v1.2s
+.*:	4e21f820 	frint64z	v0.4s, v1.4s
+.*:	6e61f820 	frint64x	v0.2d, v1.2d
+.*:	2e21f820 	frint64x	v0.2s, v1.2s
+.*:	6e21f820 	frint64x	v0.4s, v1.4s
diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-dp.s b/gas/testsuite/gas/aarch64/armv8_5-a-dp.s
new file mode 100644
index 00000000000..ecc924460fd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/armv8_5-a-dp.s
@@ -0,0 +1,19 @@
+	.macro expand, op, vec
+	.irp	sz, 32, 64
+	.irp	rnd, z, x
+	.ifc \vec, 0
+		\op\sz\rnd	s1, s2
+		\op\sz\rnd	d2, d3
+	.else
+		\op\sz\rnd	v0.2d, v1.2d
+		\op\sz\rnd	v0.2s, v1.2s
+		\op\sz\rnd	v0.4s, v1.4s
+	.endif
+	.endr
+	.endr
+	.endm
+func:
+	xaflag
+	axflag
+	expand frint,0
+	expand frint,1