diff options
| author | Jan Beulich <jbeulich@suse.com> | 2022-10-24 09:30:58 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-10-24 09:30:58 +0200 |
| commit | f7cfcddd16c3f9d8385e0375d1089fa80bad1c74 (patch) | |
| tree | 4cf427629233237df552ebe85b0fce2c3912440a /gas/testsuite | |
| parent | b347f578952a29ff9b02090b0dafec563520c80b (diff) | |
| download | binutils-gdb-f7cfcddd16c3f9d8385e0375d1089fa80bad1c74.tar.gz | |
x86: emit {evex} prefix when disassembling ambiguous AVX512VL insns
When no AVX512-specific functionality is in use, the disassembly of
AVX512VL insns is indistinguishable from their AVX counterparts (if such
exist). Emit the {evex} pseudo-prefix in such cases.
Where applicable drop stray uses of PREFIX_OPCODE from table entries.
Diffstat (limited to 'gas/testsuite')
31 files changed, 361 insertions, 361 deletions
diff --git a/gas/testsuite/gas/i386/avx512f-opts-intel.d b/gas/testsuite/gas/i386/avx512f-opts-intel.d index 1a38ef65dc7..0127464a991 100644 --- a/gas/testsuite/gas/i386/avx512f-opts-intel.d +++ b/gas/testsuite/gas/i386/avx512f-opts-intel.d @@ -65,8 +65,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f1 7c 4f 10 f5 vmovups zmm6\{k7\},zmm5 [ ]*[a-f0-9]+: 62 f1 7c cf 11 ee vmovups.s zmm6\{k7\}\{z\},zmm5 [ ]*[a-f0-9]+: 62 f1 7c cf 10 f5 vmovups zmm6\{k7\}\{z\},zmm5 -[ ]*[a-f0-9]+: 62 f1 fd 08 d6 ee vmovq\.s xmm6,xmm5 -[ ]*[a-f0-9]+: 62 f1 fe 08 7e f5 vmovq xmm6,xmm5 +[ ]*[a-f0-9]+: 62 f1 fd 08 d6 ee \{evex\} vmovq\.s xmm6,xmm5 +[ ]*[a-f0-9]+: 62 f1 fe 08 7e f5 \{evex\} vmovq xmm6,xmm5 [ ]*[a-f0-9]+: 62 f1 fd 48 29 ee vmovapd.s zmm6,zmm5 [ ]*[a-f0-9]+: 62 f1 fd 48 28 f5 vmovapd zmm6,zmm5 [ ]*[a-f0-9]+: 62 f1 fd 4f 29 ee vmovapd.s zmm6\{k7\},zmm5 diff --git a/gas/testsuite/gas/i386/avx512f-opts.d b/gas/testsuite/gas/i386/avx512f-opts.d index 19697e9b7fd..73c72edbc61 100644 --- a/gas/testsuite/gas/i386/avx512f-opts.d +++ b/gas/testsuite/gas/i386/avx512f-opts.d @@ -64,8 +64,8 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f1 7c 4f 10 f5 vmovups %zmm5,%zmm6\{%k7\} [ ]*[a-f0-9]+: 62 f1 7c cf 11 ee vmovups.s %zmm5,%zmm6\{%k7\}\{z\} [ ]*[a-f0-9]+: 62 f1 7c cf 10 f5 vmovups %zmm5,%zmm6\{%k7\}\{z\} -[ ]*[a-f0-9]+: 62 f1 fd 08 d6 ee vmovq\.s %xmm5,%xmm6 -[ ]*[a-f0-9]+: 62 f1 fe 08 7e f5 vmovq %xmm5,%xmm6 +[ ]*[a-f0-9]+: 62 f1 fd 08 d6 ee \{evex\} vmovq\.s %xmm5,%xmm6 +[ ]*[a-f0-9]+: 62 f1 fe 08 7e f5 \{evex\} vmovq %xmm5,%xmm6 [ ]*[a-f0-9]+: 62 f1 fd 48 29 ee vmovapd.s %zmm5,%zmm6 [ ]*[a-f0-9]+: 62 f1 fd 48 28 f5 vmovapd %zmm5,%zmm6 [ ]*[a-f0-9]+: 62 f1 fd 4f 29 ee vmovapd.s %zmm5,%zmm6\{%k7\} diff --git a/gas/testsuite/gas/i386/avx512vl_vaes-intel.d b/gas/testsuite/gas/i386/avx512vl_vaes-intel.d index 93f62d002a5..bef0bdbde98 100644 --- a/gas/testsuite/gas/i386/avx512vl_vaes-intel.d +++ b/gas/testsuite/gas/i386/avx512vl_vaes-intel.d @@ -33,30 +33,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4 [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*\{evex\} vaesdec xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*\{evex\} vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*\{evex\} vaesdec ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*\{evex\} vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*\{evex\} vaesdeclast xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*\{evex\} vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*\{evex\} vaesdeclast ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*\{evex\} vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*\{evex\} vaesenc xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*\{evex\} vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*\{evex\} vaesenc ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*\{evex\} vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*\{evex\} vaesenclast xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*\{evex\} vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*\{evex\} vaesenclast ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*\{evex\} vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] [ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec xmm6,xmm5,xmm4 [ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] [ ]*[a-f0-9]+:[ ]*c4 e2 51 de b2 f0 07 00 00[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] @@ -81,28 +81,28 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4 [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast ymm6,ymm5,ymm4 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*\{evex\} vaesdec xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*\{evex\} vaesdec xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*\{evex\} vaesdec ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*\{evex\} vaesdec ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*\{evex\} vaesdeclast xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*\{evex\} vaesdeclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*\{evex\} vaesdeclast ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*\{evex\} vaesdeclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*\{evex\} vaesenc xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*\{evex\} vaesenc xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*\{evex\} vaesenc ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*\{evex\} vaesenc ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*\{evex\} vaesenclast xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast xmm6,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*\{evex\} vaesenclast xmm6,xmm5,XMMWORD PTR \[edx\+0x7f0\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*\{evex\} vaesenclast ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast ymm6,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*\{evex\} vaesenclast ymm6,ymm5,YMMWORD PTR \[edx\+0xfe0\] #pass diff --git a/gas/testsuite/gas/i386/avx512vl_vaes.d b/gas/testsuite/gas/i386/avx512vl_vaes.d index ba34ebd0148..ae2037b4837 100644 --- a/gas/testsuite/gas/i386/avx512vl_vaes.d +++ b/gas/testsuite/gas/i386/avx512vl_vaes.d @@ -33,30 +33,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6 [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6 [ ]*[a-f0-9]+:[ ]*c4 e2 51 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6 [ ]*[a-f0-9]+:[ ]*c4 e2 51 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 [ ]*[a-f0-9]+:[ ]*c4 e2 51 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6 @@ -81,28 +81,28 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6 [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 [ ]*[a-f0-9]+:[ ]*c4 e2 55 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 -[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6 #pass diff --git a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d index e0f40a284d4..b5f480ff8cc 100644 --- a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d +++ b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d @@ -15,30 +15,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 e1 ab[ ]*vpclmulqdq ymm4,ymm5,ymm1,0xab [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 a4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm4,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 a2 e0 0f 00 00 7b[ ]*vpclmulqdq ymm4,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 da ab[ ]*vpclmulqdq xmm3,xmm2,xmm2,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq xmm3,xmm2,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 5a 7f 7b[ ]*vpclmulqdq xmm3,xmm2,XMMWORD PTR \[edx\+0x7f0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 e1 ab[ ]*vpclmulqdq ymm4,ymm5,ymm1,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 a4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm4,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 62 7f 7b[ ]*vpclmulqdq ymm4,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 65 08 44 e2 11[ ]*vpclmulhqhqdq xmm4,xmm3,xmm2 -[ ]*[a-f0-9]+:[ ]*62 f3 5d 08 44 eb 01[ ]*vpclmulhqlqdq xmm5,xmm4,xmm3 -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 f4 10[ ]*vpclmullqhqdq xmm6,xmm5,xmm4 -[ ]*[a-f0-9]+:[ ]*62 f3 4d 08 44 fd 00[ ]*vpclmullqlqdq xmm7,xmm6,xmm5 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d9 11[ ]*vpclmulhqhqdq ymm3,ymm2,ymm1 -[ ]*[a-f0-9]+:[ ]*62 f3 65 28 44 e2 01[ ]*vpclmulhqlqdq ymm4,ymm3,ymm2 -[ ]*[a-f0-9]+:[ ]*62 f3 5d 28 44 eb 10[ ]*vpclmullqhqdq ymm5,ymm4,ymm3 -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 f4 00[ ]*vpclmullqlqdq ymm6,ymm5,ymm4 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 da ab[ ]*\{evex\} vpclmulqdq xmm3,xmm2,xmm2,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq xmm3,xmm2,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq xmm3,xmm2,XMMWORD PTR \[edx\+0x7f0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 e1 ab[ ]*\{evex\} vpclmulqdq ymm4,ymm5,ymm1,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 a4 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq ymm4,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 62 7f 7b[ ]*\{evex\} vpclmulqdq ymm4,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 65 08 44 e2 11[ ]*\{evex\} vpclmulhqhqdq xmm4,xmm3,xmm2 +[ ]*[a-f0-9]+:[ ]*62 f3 5d 08 44 eb 01[ ]*\{evex\} vpclmulhqlqdq xmm5,xmm4,xmm3 +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 f4 10[ ]*\{evex\} vpclmullqhqdq xmm6,xmm5,xmm4 +[ ]*[a-f0-9]+:[ ]*62 f3 4d 08 44 fd 00[ ]*\{evex\} vpclmullqlqdq xmm7,xmm6,xmm5 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d9 11[ ]*\{evex\} vpclmulhqhqdq ymm3,ymm2,ymm1 +[ ]*[a-f0-9]+:[ ]*62 f3 65 28 44 e2 01[ ]*\{evex\} vpclmulhqlqdq ymm4,ymm3,ymm2 +[ ]*[a-f0-9]+:[ ]*62 f3 5d 28 44 eb 10[ ]*\{evex\} vpclmullqhqdq ymm5,ymm4,ymm3 +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 f4 00[ ]*\{evex\} vpclmullqlqdq ymm6,ymm5,ymm4 [ ]*[a-f0-9]+:[ ]*c4 e3 51 44 db ab[ ]*vpclmulqdq xmm3,xmm5,xmm3,0xab [ ]*[a-f0-9]+:[ ]*c4 e3 51 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq xmm3,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 51 44 9a f0 07 00 00 7b[ ]*vpclmulqdq xmm3,xmm5,XMMWORD PTR \[edx\+0x7f0\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 6d 44 d2 ab[ ]*vpclmulqdq ymm2,ymm2,ymm2,0xab [ ]*[a-f0-9]+:[ ]*c4 e3 6d 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm2,ymm2,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 6d 44 92 e0 0f 00 00 7b[ ]*vpclmulqdq ymm2,ymm2,YMMWORD PTR \[edx\+0xfe0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 db ab[ ]*vpclmulqdq xmm3,xmm5,xmm3,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq xmm3,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 5a 7f 7b[ ]*vpclmulqdq xmm3,xmm5,XMMWORD PTR \[edx\+0x7f0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d2 ab[ ]*vpclmulqdq ymm2,ymm2,ymm2,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm2,ymm2,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 52 7f 7b[ ]*vpclmulqdq ymm2,ymm2,YMMWORD PTR \[edx\+0xfe0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 db ab[ ]*\{evex\} vpclmulqdq xmm3,xmm5,xmm3,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq xmm3,xmm5,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq xmm3,xmm5,XMMWORD PTR \[edx\+0x7f0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d2 ab[ ]*\{evex\} vpclmulqdq ymm2,ymm2,ymm2,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 94 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq ymm2,ymm2,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 52 7f 7b[ ]*\{evex\} vpclmulqdq ymm2,ymm2,YMMWORD PTR \[edx\+0xfe0\],0x7b #pass diff --git a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d index 54a9275d6d9..040ed861087 100644 --- a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d +++ b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1-intel.d @@ -15,22 +15,22 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 da ab[ ]*vpclmulqdq ymm3,ymm5,ymm2,0xab [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm3,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 9a e0 0f 00 00 7b[ ]*vpclmulqdq ymm3,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 cc ab[ ]*vpclmulqdq xmm1,xmm1,xmm4,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 8c f4 c0 1d fe ff 7b[ ]*vpclmulqdq xmm1,xmm1,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 4a 7f 7b[ ]*vpclmulqdq xmm1,xmm1,XMMWORD PTR \[edx\+0x7f0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 da ab[ ]*vpclmulqdq ymm3,ymm5,ymm2,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm3,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 5a 7f 7b[ ]*vpclmulqdq ymm3,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 cc ab[ ]*\{evex\} vpclmulqdq xmm1,xmm1,xmm4,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 8c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq xmm1,xmm1,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 4a 7f 7b[ ]*\{evex\} vpclmulqdq xmm1,xmm1,XMMWORD PTR \[edx\+0x7f0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 da ab[ ]*\{evex\} vpclmulqdq ymm3,ymm5,ymm2,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq ymm3,ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq ymm3,ymm5,YMMWORD PTR \[edx\+0xfe0\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 59 44 f1 ab[ ]*vpclmulqdq xmm6,xmm4,xmm1,0xab [ ]*[a-f0-9]+:[ ]*c4 e3 59 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq xmm6,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 59 44 b2 f0 07 00 00 7b[ ]*vpclmulqdq xmm6,xmm4,XMMWORD PTR \[edx\+0x7f0\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 5d 44 d4 ab[ ]*vpclmulqdq ymm2,ymm4,ymm4,0xab [ ]*[a-f0-9]+:[ ]*c4 e3 5d 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm2,ymm4,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b [ ]*[a-f0-9]+:[ ]*c4 e3 5d 44 92 e0 0f 00 00 7b[ ]*vpclmulqdq ymm2,ymm4,YMMWORD PTR \[edx\+0xfe0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 f1 ab[ ]*vpclmulqdq xmm6,xmm4,xmm1,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq xmm6,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 72 7f 7b[ ]*vpclmulqdq xmm6,xmm4,XMMWORD PTR \[edx\+0x7f0\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 d4 ab[ ]*vpclmulqdq ymm2,ymm4,ymm4,0xab -[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq ymm2,ymm4,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b -[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 52 7f 7b[ ]*vpclmulqdq ymm2,ymm4,YMMWORD PTR \[edx\+0xfe0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 f1 ab[ ]*\{evex\} vpclmulqdq xmm6,xmm4,xmm1,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 b4 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq xmm6,xmm4,XMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 72 7f 7b[ ]*\{evex\} vpclmulqdq xmm6,xmm4,XMMWORD PTR \[edx\+0x7f0\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 d4 ab[ ]*\{evex\} vpclmulqdq ymm2,ymm4,ymm4,0xab +[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 94 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq ymm2,ymm4,YMMWORD PTR \[esp\+esi\*8-0x1e240\],0x7b +[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 52 7f 7b[ ]*\{evex\} vpclmulqdq ymm2,ymm4,YMMWORD PTR \[edx\+0xfe0\],0x7b #pass diff --git a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d index 85e04cefb11..69a4188192f 100644 --- a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d +++ b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq-wig1.d @@ -15,22 +15,22 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 da ab[ ]*vpclmulqdq \$0xab,%ymm2,%ymm5,%ymm3 [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm3 [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 9a e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm3 -[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 cc ab[ ]*vpclmulqdq \$0xab,%xmm4,%xmm1,%xmm1 -[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 8c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm1,%xmm1 -[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 4a 7f 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm1,%xmm1 -[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 da ab[ ]*vpclmulqdq \$0xab,%ymm2,%ymm5,%ymm3 -[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm3 -[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 5a 7f 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm3 +[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 cc ab[ ]*\{evex\} vpclmulqdq \$0xab,%xmm4,%xmm1,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 8c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm1,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f3 f5 08 44 4a 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm1,%xmm1 +[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 da ab[ ]*\{evex\} vpclmulqdq \$0xab,%ymm2,%ymm5,%ymm3 +[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm3 +[ ]*[a-f0-9]+:[ ]*62 f3 d5 28 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm3 [ ]*[a-f0-9]+:[ ]*c4 e3 59 44 f1 ab[ ]*vpclmulqdq \$0xab,%xmm1,%xmm4,%xmm6 [ ]*[a-f0-9]+:[ ]*c4 e3 59 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm4,%xmm6 [ ]*[a-f0-9]+:[ ]*c4 e3 59 44 b2 f0 07 00 00 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm4,%xmm6 [ ]*[a-f0-9]+:[ ]*c4 e3 5d 44 d4 ab[ ]*vpclmulqdq \$0xab,%ymm4,%ymm4,%ymm2 [ ]*[a-f0-9]+:[ ]*c4 e3 5d 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm4,%ymm2 [ ]*[a-f0-9]+:[ ]*c4 e3 5d 44 92 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm4,%ymm2 -[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 f1 ab[ ]*vpclmulqdq \$0xab,%xmm1,%xmm4,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm4,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 72 7f 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm4,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 d4 ab[ ]*vpclmulqdq \$0xab,%ymm4,%ymm4,%ymm2 -[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm4,%ymm2 -[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 52 7f 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm4,%ymm2 +[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 f1 ab[ ]*\{evex\} vpclmulqdq \$0xab,%xmm1,%xmm4,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 b4 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm4,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f3 dd 08 44 72 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm4,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 d4 ab[ ]*\{evex\} vpclmulqdq \$0xab,%ymm4,%ymm4,%ymm2 +[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 94 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm4,%ymm2 +[ ]*[a-f0-9]+:[ ]*62 f3 dd 28 44 52 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm4,%ymm2 #pass diff --git a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq.d b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq.d index 19cd5106589..91e803f201c 100644 --- a/gas/testsuite/gas/i386/avx512vl_vpclmulqdq.d +++ b/gas/testsuite/gas/i386/avx512vl_vpclmulqdq.d @@ -15,30 +15,30 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 e1 ab[ ]*vpclmulqdq \$0xab,%ymm1,%ymm5,%ymm4 [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 a4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm4 [ ]*[a-f0-9]+:[ ]*c4 e3 55 44 a2 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm4 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 da ab[ ]*vpclmulqdq \$0xab,%xmm2,%xmm2,%xmm3 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm2,%xmm3 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 5a 7f 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm2,%xmm3 -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 e1 ab[ ]*vpclmulqdq \$0xab,%ymm1,%ymm5,%ymm4 -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 a4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm4 -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 62 7f 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm4 -[ ]*[a-f0-9]+:[ ]*62 f3 65 08 44 e2 11[ ]*vpclmulhqhqdq %xmm2,%xmm3,%xmm4 -[ ]*[a-f0-9]+:[ ]*62 f3 5d 08 44 eb 01[ ]*vpclmulhqlqdq %xmm3,%xmm4,%xmm5 -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 f4 10[ ]*vpclmullqhqdq %xmm4,%xmm5,%xmm6 -[ ]*[a-f0-9]+:[ ]*62 f3 4d 08 44 fd 00[ ]*vpclmullqlqdq %xmm5,%xmm6,%xmm7 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d9 11[ ]*vpclmulhqhqdq %ymm1,%ymm2,%ymm3 -[ ]*[a-f0-9]+:[ ]*62 f3 65 28 44 e2 01[ ]*vpclmulhqlqdq %ymm2,%ymm3,%ymm4 -[ ]*[a-f0-9]+:[ ]*62 f3 5d 28 44 eb 10[ ]*vpclmullqhqdq %ymm3,%ymm4,%ymm5 -[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 f4 00[ ]*vpclmullqlqdq %ymm4,%ymm5,%ymm6 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 da ab[ ]*\{evex\} vpclmulqdq \$0xab,%xmm2,%xmm2,%xmm3 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm2,%xmm3 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm2,%xmm3 +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 e1 ab[ ]*\{evex\} vpclmulqdq \$0xab,%ymm1,%ymm5,%ymm4 +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 a4 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm4 +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 62 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm4 +[ ]*[a-f0-9]+:[ ]*62 f3 65 08 44 e2 11[ ]*\{evex\} vpclmulhqhqdq %xmm2,%xmm3,%xmm4 +[ ]*[a-f0-9]+:[ ]*62 f3 5d 08 44 eb 01[ ]*\{evex\} vpclmulhqlqdq %xmm3,%xmm4,%xmm5 +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 f4 10[ ]*\{evex\} vpclmullqhqdq %xmm4,%xmm5,%xmm6 +[ ]*[a-f0-9]+:[ ]*62 f3 4d 08 44 fd 00[ ]*\{evex\} vpclmullqlqdq %xmm5,%xmm6,%xmm7 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d9 11[ ]*\{evex\} vpclmulhqhqdq %ymm1,%ymm2,%ymm3 +[ ]*[a-f0-9]+:[ ]*62 f3 65 28 44 e2 01[ ]*\{evex\} vpclmulhqlqdq %ymm2,%ymm3,%ymm4 +[ ]*[a-f0-9]+:[ ]*62 f3 5d 28 44 eb 10[ ]*\{evex\} vpclmullqhqdq %ymm3,%ymm4,%ymm5 +[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 f4 00[ ]*\{evex\} vpclmullqlqdq %ymm4,%ymm5,%ymm6 [ ]*[a-f0-9]+:[ ]*c4 e3 51 44 db ab[ ]*vpclmulqdq \$0xab,%xmm3,%xmm5,%xmm3 [ ]*[a-f0-9]+:[ ]*c4 e3 51 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%xmm3 [ ]*[a-f0-9]+:[ ]*c4 e3 51 44 9a f0 07 00 00 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm5,%xmm3 [ ]*[a-f0-9]+:[ ]*c4 e3 6d 44 d2 ab[ ]*vpclmulqdq \$0xab,%ymm2,%ymm2,%ymm2 [ ]*[a-f0-9]+:[ ]*c4 e3 6d 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm2,%ymm2 [ ]*[a-f0-9]+:[ ]*c4 e3 6d 44 92 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm2,%ymm2 -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 db ab[ ]*vpclmulqdq \$0xab,%xmm3,%xmm5,%xmm3 -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%xmm3 -[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 5a 7f 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm5,%xmm3 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d2 ab[ ]*vpclmulqdq \$0xab,%ymm2,%ymm2,%ymm2 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm2,%ymm2 -[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 52 7f 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm2,%ymm2 +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 db ab[ ]*\{evex\} vpclmulqdq \$0xab,%xmm3,%xmm5,%xmm3 +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%xmm3 +[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm5,%xmm3 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d2 ab[ ]*\{evex\} vpclmulqdq \$0xab,%ymm2,%ymm2,%ymm2 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 94 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm2,%ymm2 +[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 52 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm2,%ymm2 #pass diff --git a/gas/testsuite/gas/i386/evex-lig-2.d b/gas/testsuite/gas/i386/evex-lig-2.d index c1f9f9f3715..25c36c3186e 100644 --- a/gas/testsuite/gas/i386/evex-lig-2.d +++ b/gas/testsuite/gas/i386/evex-lig-2.d @@ -8,28 +8,28 @@ Disassembly of section .text: 0+ <_start>: - +[a-f0-9]+: 62 f1 7d 08 7e 21 vmovd %xmm4,\(%ecx\) - +[a-f0-9]+: 62 f1 7d 08 7e e1 vmovd %xmm4,%ecx - +[a-f0-9]+: 62 f1 7d 08 6e 21 vmovd \(%ecx\),%xmm4 - +[a-f0-9]+: 62 f1 7d 08 6e e1 vmovd %ecx,%xmm4 - +[a-f0-9]+: 62 f1 fd 08 d6 21 vmovq %xmm4,\(%ecx\) - +[a-f0-9]+: 62 f1 fe 08 7e 21 vmovq \(%ecx\),%xmm4 - +[a-f0-9]+: 62 f1 fe 08 7e f4 vmovq %xmm4,%xmm6 - +[a-f0-9]+: 62 f3 7d 08 17 c0 00 vextractps \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 17 00 00 vextractps \$0x0,%xmm0,\(%eax\) - +[a-f0-9]+: 62 f3 7d 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 14 00 00 vpextrb \$0x0,%xmm0,\(%eax\) - +[a-f0-9]+: 62 f1 7d 08 c5 c0 00 vpextrw \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 15 c0 00 vpextrw \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 15 00 00 vpextrw \$0x0,%xmm0,\(%eax\) - +[a-f0-9]+: 62 f3 7d 08 16 c0 00 vpextrd \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 16 00 00 vpextrd \$0x0,%xmm0,\(%eax\) - +[a-f0-9]+: 62 f3 7d 08 21 c0 00 vinsertps \$0x0,%xmm0,%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 21 00 00 vinsertps \$0x0,\(%eax\),%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 20 00 00 vpinsrb \$0x0,\(%eax\),%xmm0,%xmm0 - +[a-f0-9]+: 62 f1 7d 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 - +[a-f0-9]+: 62 f1 7d 08 c4 00 00 vpinsrw \$0x0,\(%eax\),%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 22 c0 00 vpinsrd \$0x0,%eax,%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 22 00 00 vpinsrd \$0x0,\(%eax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f1 7d 08 7e 21 \{evex\} vmovd %xmm4,\(%ecx\) + +[a-f0-9]+: 62 f1 7d 08 7e e1 \{evex\} vmovd %xmm4,%ecx + +[a-f0-9]+: 62 f1 7d 08 6e 21 \{evex\} vmovd \(%ecx\),%xmm4 + +[a-f0-9]+: 62 f1 7d 08 6e e1 \{evex\} vmovd %ecx,%xmm4 + +[a-f0-9]+: 62 f1 fd 08 d6 21 \{evex\} vmovq %xmm4,\(%ecx\) + +[a-f0-9]+: 62 f1 fe 08 7e 21 \{evex\} vmovq \(%ecx\),%xmm4 + +[a-f0-9]+: 62 f1 fe 08 7e f4 \{evex\} vmovq %xmm4,%xmm6 + +[a-f0-9]+: 62 f3 7d 08 17 c0 00 \{evex\} vextractps \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 17 00 00 \{evex\} vextractps \$0x0,%xmm0,\(%eax\) + +[a-f0-9]+: 62 f3 7d 08 14 c0 00 \{evex\} vpextrb \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 14 00 00 \{evex\} vpextrb \$0x0,%xmm0,\(%eax\) + +[a-f0-9]+: 62 f1 7d 08 c5 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 15 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 15 00 00 \{evex\} vpextrw \$0x0,%xmm0,\(%eax\) + +[a-f0-9]+: 62 f3 7d 08 16 c0 00 \{evex\} vpextrd \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 16 00 00 \{evex\} vpextrd \$0x0,%xmm0,\(%eax\) + +[a-f0-9]+: 62 f3 7d 08 21 c0 00 \{evex\} vinsertps \$0x0,%xmm0,%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 21 00 00 \{evex\} vinsertps \$0x0,\(%eax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 20 c0 00 \{evex\} vpinsrb \$0x0,%eax,%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 20 00 00 \{evex\} vpinsrb \$0x0,\(%eax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f1 7d 08 c4 c0 00 \{evex\} vpinsrw \$0x0,%eax,%xmm0,%xmm0 + +[a-f0-9]+: 62 f1 7d 08 c4 00 00 \{evex\} vpinsrw \$0x0,\(%eax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 22 c0 00 \{evex\} vpinsrd \$0x0,%eax,%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 22 00 00 \{evex\} vpinsrd \$0x0,\(%eax\),%xmm0,%xmm0 #pass diff --git a/gas/testsuite/gas/i386/evex-wig1-intel.d b/gas/testsuite/gas/i386/evex-wig1-intel.d index 202c4f5c024..9ce439e740b 100644 --- a/gas/testsuite/gas/i386/evex-wig1-intel.d +++ b/gas/testsuite/gas/i386/evex-wig1-intel.d @@ -9,14 +9,14 @@ Disassembly of section .text: 0+ <_start>: -[ ]*[a-f0-9]+: 62 f1 fe 08 2a c0 vcvtsi2ss xmm0,xmm0,eax -[ ]*[a-f0-9]+: 62 f1 fe 08 2a 40 01 vcvtsi2ss xmm0,xmm0,DWORD PTR \[eax\+0x4\] -[ ]*[a-f0-9]+: 62 f1 ff 08 2a c0 vcvtsi2sd xmm0,xmm0,eax -[ ]*[a-f0-9]+: 62 f1 ff 08 2a 40 01 vcvtsi2sd xmm0,xmm0,DWORD PTR \[eax\+0x4\] -[ ]*[a-f0-9]+: 62 f1 fe 08 2d c0 vcvtss2si eax,xmm0 -[ ]*[a-f0-9]+: 62 f1 ff 08 2d c0 vcvtsd2si eax,xmm0 -[ ]*[a-f0-9]+: 62 f1 fe 08 2c c0 vcvttss2si eax,xmm0 -[ ]*[a-f0-9]+: 62 f1 ff 08 2c c0 vcvttsd2si eax,xmm0 +[ ]*[a-f0-9]+: 62 f1 fe 08 2a c0 \{evex\} vcvtsi2ss xmm0,xmm0,eax +[ ]*[a-f0-9]+: 62 f1 fe 08 2a 40 01 \{evex\} vcvtsi2ss xmm0,xmm0,DWORD PTR \[eax\+0x4\] +[ ]*[a-f0-9]+: 62 f1 ff 08 2a c0 \{evex\} vcvtsi2sd xmm0,xmm0,eax +[ ]*[a-f0-9]+: 62 f1 ff 08 2a 40 01 \{evex\} vcvtsi2sd xmm0,xmm0,DWORD PTR \[eax\+0x4\] +[ ]*[a-f0-9]+: 62 f1 fe 08 2d c0 \{evex\} vcvtss2si eax,xmm0 +[ ]*[a-f0-9]+: 62 f1 ff 08 2d c0 \{evex\} vcvtsd2si eax,xmm0 +[ ]*[a-f0-9]+: 62 f1 fe 08 2c c0 \{evex\} vcvttss2si eax,xmm0 +[ ]*[a-f0-9]+: 62 f1 ff 08 2c c0 \{evex\} vcvttsd2si eax,xmm0 [ ]*[a-f0-9]+: 62 f1 fe 08 7b c0 vcvtusi2ss xmm0,xmm0,eax [ ]*[a-f0-9]+: 62 f1 fe 08 7b 40 01 vcvtusi2ss xmm0,xmm0,DWORD PTR \[eax\+0x4\] [ ]*[a-f0-9]+: 62 f1 ff 08 7b c0 vcvtusi2sd xmm0,xmm0,eax @@ -25,26 +25,26 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f1 ff 08 79 c0 vcvtsd2usi eax,xmm0 [ ]*[a-f0-9]+: 62 f1 fe 08 78 c0 vcvttss2usi eax,xmm0 [ ]*[a-f0-9]+: 62 f1 ff 08 78 c0 vcvttsd2usi eax,xmm0 -[ ]*[a-f0-9]+: 62 f3 fd 08 17 c0 00 vextractps eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 17 40 01 00 vextractps DWORD PTR \[eax\+0x4\],xmm0,0x0 -[ ]*[a-f0-9]+: 62 f1 fd 08 6e c0 vmovd xmm0,eax -[ ]*[a-f0-9]+: 62 f1 fd 08 6e 40 01 vmovd xmm0,DWORD PTR \[eax\+0x4\] -[ ]*[a-f0-9]+: 62 f1 fd 08 7e c0 vmovd eax,xmm0 -[ ]*[a-f0-9]+: 62 f1 fd 08 7e 40 01 vmovd DWORD PTR \[eax\+0x4\],xmm0 +[ ]*[a-f0-9]+: 62 f3 fd 08 17 c0 00 \{evex\} vextractps eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 17 40 01 00 \{evex\} vextractps DWORD PTR \[eax\+0x4\],xmm0,0x0 +[ ]*[a-f0-9]+: 62 f1 fd 08 6e c0 \{evex\} vmovd xmm0,eax +[ ]*[a-f0-9]+: 62 f1 fd 08 6e 40 01 \{evex\} vmovd xmm0,DWORD PTR \[eax\+0x4\] +[ ]*[a-f0-9]+: 62 f1 fd 08 7e c0 \{evex\} vmovd eax,xmm0 +[ ]*[a-f0-9]+: 62 f1 fd 08 7e 40 01 \{evex\} vmovd DWORD PTR \[eax\+0x4\],xmm0 [ ]*[a-f0-9]+: 62 f2 fd 08 7c c0 vpbroadcastd xmm0,eax -[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 14 40 01 00 vpextrb BYTE PTR \[eax\+0x1\],xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 16 c0 00 vpextrd eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 16 40 01 00 vpextrd DWORD PTR \[eax\+0x4\],xmm0,0x0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 15 40 01 00 vpextrw WORD PTR \[eax\+0x2\],xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb xmm0,xmm0,eax,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 20 40 01 00 vpinsrb xmm0,xmm0,BYTE PTR \[eax\+0x1\],0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 22 c0 00 vpinsrd xmm0,xmm0,eax,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 22 40 01 00 vpinsrd xmm0,xmm0,DWORD PTR \[eax\+0x4\],0x0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw xmm0,xmm0,eax,0x0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 40 01 00 vpinsrw xmm0,xmm0,WORD PTR \[eax\+0x2\],0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 \{evex\} vpextrb eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 14 40 01 00 \{evex\} vpextrb BYTE PTR \[eax\+0x1\],xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 16 c0 00 \{evex\} vpextrd eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 16 40 01 00 \{evex\} vpextrd DWORD PTR \[eax\+0x4\],xmm0,0x0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 \{evex\} vpextrw eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 \{evex\} vpextrw eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 15 40 01 00 \{evex\} vpextrw WORD PTR \[eax\+0x2\],xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 \{evex\} vpinsrb xmm0,xmm0,eax,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 20 40 01 00 \{evex\} vpinsrb xmm0,xmm0,BYTE PTR \[eax\+0x1\],0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 22 c0 00 \{evex\} vpinsrd xmm0,xmm0,eax,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 22 40 01 00 \{evex\} vpinsrd xmm0,xmm0,DWORD PTR \[eax\+0x4\],0x0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 \{evex\} vpinsrw xmm0,xmm0,eax,0x0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 40 01 00 \{evex\} vpinsrw xmm0,xmm0,WORD PTR \[eax\+0x2\],0x0 [ ]*[a-f0-9]+: 62 f1 7e 0f 10 c0 vmovss xmm0\{k7\},xmm0,xmm0 [ ]*[a-f0-9]+: 62 f1 7e 0f 10 00 vmovss xmm0\{k7\},DWORD PTR \[eax\] [ ]*[a-f0-9]+: 62 f1 7e 0f 11 00 vmovss DWORD PTR \[eax\]\{k7\},xmm0 diff --git a/gas/testsuite/gas/i386/evex-wig1.d b/gas/testsuite/gas/i386/evex-wig1.d index 0a9a534d957..f8b82dca1c8 100644 --- a/gas/testsuite/gas/i386/evex-wig1.d +++ b/gas/testsuite/gas/i386/evex-wig1.d @@ -9,14 +9,14 @@ Disassembly of section .text: 0+ <_start>: -[ ]*[a-f0-9]+: 62 f1 fe 08 2a c0 vcvtsi2ss %eax,%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 fe 08 2a 40 01 vcvtsi2ss 0x4\(%eax\),%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 ff 08 2a c0 vcvtsi2sd %eax,%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 ff 08 2a 40 01 vcvtsi2sd 0x4\(%eax\),%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 fe 08 2d c0 vcvtss2si %xmm0,%eax -[ ]*[a-f0-9]+: 62 f1 ff 08 2d c0 vcvtsd2si %xmm0,%eax -[ ]*[a-f0-9]+: 62 f1 fe 08 2c c0 vcvttss2si %xmm0,%eax -[ ]*[a-f0-9]+: 62 f1 ff 08 2c c0 vcvttsd2si %xmm0,%eax +[ ]*[a-f0-9]+: 62 f1 fe 08 2a c0 \{evex\} vcvtsi2ss %eax,%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 fe 08 2a 40 01 \{evex\} vcvtsi2ss 0x4\(%eax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 ff 08 2a c0 \{evex\} vcvtsi2sd %eax,%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 ff 08 2a 40 01 \{evex\} vcvtsi2sd 0x4\(%eax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 fe 08 2d c0 \{evex\} vcvtss2si %xmm0,%eax +[ ]*[a-f0-9]+: 62 f1 ff 08 2d c0 \{evex\} vcvtsd2si %xmm0,%eax +[ ]*[a-f0-9]+: 62 f1 fe 08 2c c0 \{evex\} vcvttss2si %xmm0,%eax +[ ]*[a-f0-9]+: 62 f1 ff 08 2c c0 \{evex\} vcvttsd2si %xmm0,%eax [ ]*[a-f0-9]+: 62 f1 fe 08 7b c0 vcvtusi2ss %eax,%xmm0,%xmm0 [ ]*[a-f0-9]+: 62 f1 fe 08 7b 40 01 vcvtusi2ss 0x4\(%eax\),%xmm0,%xmm0 [ ]*[a-f0-9]+: 62 f1 ff 08 7b c0 vcvtusi2sd %eax,%xmm0,%xmm0 @@ -25,26 +25,26 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 f1 ff 08 79 c0 vcvtsd2usi %xmm0,%eax [ ]*[a-f0-9]+: 62 f1 fe 08 78 c0 vcvttss2usi %xmm0,%eax [ ]*[a-f0-9]+: 62 f1 ff 08 78 c0 vcvttsd2usi %xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 17 c0 00 vextractps \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 17 40 01 00 vextractps \$0x0,%xmm0,0x4\(%eax\) -[ ]*[a-f0-9]+: 62 f1 fd 08 6e c0 vmovd %eax,%xmm0 -[ ]*[a-f0-9]+: 62 f1 fd 08 6e 40 01 vmovd 0x4\(%eax\),%xmm0 -[ ]*[a-f0-9]+: 62 f1 fd 08 7e c0 vmovd %xmm0,%eax -[ ]*[a-f0-9]+: 62 f1 fd 08 7e 40 01 vmovd %xmm0,0x4\(%eax\) +[ ]*[a-f0-9]+: 62 f3 fd 08 17 c0 00 \{evex\} vextractps \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 17 40 01 00 \{evex\} vextractps \$0x0,%xmm0,0x4\(%eax\) +[ ]*[a-f0-9]+: 62 f1 fd 08 6e c0 \{evex\} vmovd %eax,%xmm0 +[ ]*[a-f0-9]+: 62 f1 fd 08 6e 40 01 \{evex\} vmovd 0x4\(%eax\),%xmm0 +[ ]*[a-f0-9]+: 62 f1 fd 08 7e c0 \{evex\} vmovd %xmm0,%eax +[ ]*[a-f0-9]+: 62 f1 fd 08 7e 40 01 \{evex\} vmovd %xmm0,0x4\(%eax\) [ ]*[a-f0-9]+: 62 f2 fd 08 7c c0 vpbroadcastd %eax,%xmm0 -[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 14 40 01 00 vpextrb \$0x0,%xmm0,0x1\(%eax\) -[ ]*[a-f0-9]+: 62 f3 fd 08 16 c0 00 vpextrd \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 16 40 01 00 vpextrd \$0x0,%xmm0,0x4\(%eax\) -[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 15 40 01 00 vpextrw \$0x0,%xmm0,0x2\(%eax\) -[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f3 fd 08 20 40 01 00 vpinsrb \$0x0,0x1\(%eax\),%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f3 fd 08 22 c0 00 vpinsrd \$0x0,%eax,%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f3 fd 08 22 40 01 00 vpinsrd \$0x0,0x4\(%eax\),%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 40 01 00 vpinsrw \$0x0,0x2\(%eax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 \{evex\} vpextrb \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 14 40 01 00 \{evex\} vpextrb \$0x0,%xmm0,0x1\(%eax\) +[ ]*[a-f0-9]+: 62 f3 fd 08 16 c0 00 \{evex\} vpextrd \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 16 40 01 00 \{evex\} vpextrd \$0x0,%xmm0,0x4\(%eax\) +[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 15 40 01 00 \{evex\} vpextrw \$0x0,%xmm0,0x2\(%eax\) +[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 \{evex\} vpinsrb \$0x0,%eax,%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f3 fd 08 20 40 01 00 \{evex\} vpinsrb \$0x0,0x1\(%eax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f3 fd 08 22 c0 00 \{evex\} vpinsrd \$0x0,%eax,%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f3 fd 08 22 40 01 00 \{evex\} vpinsrd \$0x0,0x4\(%eax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 \{evex\} vpinsrw \$0x0,%eax,%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 40 01 00 \{evex\} vpinsrw \$0x0,0x2\(%eax\),%xmm0,%xmm0 [ ]*[a-f0-9]+: 62 f1 7e 0f 10 c0 vmovss %xmm0,%xmm0,%xmm0\{%k7\} [ ]*[a-f0-9]+: 62 f1 7e 0f 10 00 vmovss \(%eax\),%xmm0\{%k7\} [ ]*[a-f0-9]+: 62 f1 7e 0f 11 00 vmovss %xmm0,\(%eax\)\{%k7\} diff --git a/gas/testsuite/gas/i386/evex.d b/gas/testsuite/gas/i386/evex.d index 4afcc6db728..52670f82736 100644 --- a/gas/testsuite/gas/i386/evex.d +++ b/gas/testsuite/gas/i386/evex.d @@ -16,6 +16,6 @@ Disassembly of section .text: +[a-f0-9]+: 62 f1 d6 38 7b f0 vcvtusi2ssl %eax,\{rd-sae\},%xmm5,%xmm6 +[a-f0-9]+: 62 f1 57 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 +[a-f0-9]+: 62 f1 d7 38 7b f0 vcvtusi2sdl %eax,\{rd-bad\},%xmm5,%xmm6 - +[a-f0-9]+: 62 e1 7e 08 2d c0 vcvtss2si %xmm0,%eax + +[a-f0-9]+: 62 e1 7e 08 2d c0 \{evex\} vcvtss2si %xmm0,%eax +[a-f0-9]+: 62 e1 7c 08 c2 c0 00 vcmpeqps %xmm0,%xmm0,%k0 #pass diff --git a/gas/testsuite/gas/i386/noreg16-data32.d b/gas/testsuite/gas/i386/noreg16-data32.d index ebb133bfeda..7561b549ebb 100644 --- a/gas/testsuite/gas/i386/noreg16-data32.d +++ b/gas/testsuite/gas/i386/noreg16-data32.d @@ -141,9 +141,9 @@ Disassembly of section .text: *[a-f0-9]+: 66 f7 07 89 00 00 00 testl \$0x89,\(%bx\) *[a-f0-9]+: 66 f7 07 34 12 00 00 testl \$0x1234,\(%bx\) *[a-f0-9]+: c5 fb 2a 07 vcvtsi2sd \(%bx\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7f 08 2a 07 vcvtsi2sd \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 2a 07 \{evex\} vcvtsi2sd \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: c5 fa 2a 07 vcvtsi2ss \(%bx\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7e 08 2a 07 vcvtsi2ss \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 2a 07 \{evex\} vcvtsi2ss \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7f 08 7b 07 vcvtusi2sd \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7e 08 7b 07 vcvtusi2ss \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: 66 83 37 01 xorl \$0x1,\(%bx\) diff --git a/gas/testsuite/gas/i386/noreg16.d b/gas/testsuite/gas/i386/noreg16.d index e05fdc7b15f..86f852fb4ca 100644 --- a/gas/testsuite/gas/i386/noreg16.d +++ b/gas/testsuite/gas/i386/noreg16.d @@ -140,9 +140,9 @@ Disassembly of section .text: *[a-f0-9]+: f7 07 89 00 testw \$0x89,\(%bx\) *[a-f0-9]+: f7 07 34 12 testw \$0x1234,\(%bx\) *[a-f0-9]+: c5 fb 2a 07 vcvtsi2sd \(%bx\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7f 08 2a 07 vcvtsi2sd \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 2a 07 \{evex\} vcvtsi2sd \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: c5 fa 2a 07 vcvtsi2ss \(%bx\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7e 08 2a 07 vcvtsi2ss \(%bx\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 2a 07 \{evex\} vcvtsi2ss \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7f 08 7b 07 vcvtusi2sd \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7e 08 7b 07 vcvtusi2ss \(%bx\),%xmm0,%xmm0 *[a-f0-9]+: 83 37 01 xorw \$0x1,\(%bx\) diff --git a/gas/testsuite/gas/i386/noreg32-data16.d b/gas/testsuite/gas/i386/noreg32-data16.d index 32d5b0102b6..1ec6b9e8670 100644 --- a/gas/testsuite/gas/i386/noreg32-data16.d +++ b/gas/testsuite/gas/i386/noreg32-data16.d @@ -151,9 +151,9 @@ Disassembly of section .text: *[a-f0-9]+: 66 f7 00 34 12 testw \$0x1234,\(%eax\) *[a-f0-9]+: 66 f7 00 78 56 testw \$0x5678,\(%eax\) *[a-f0-9]+: c5 fb 2a 00 vcvtsi2sd \(%eax\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7f 08 2a 00 vcvtsi2sd \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 2a 00 \{evex\} vcvtsi2sd \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: c5 fa 2a 00 vcvtsi2ss \(%eax\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7e 08 2a 00 vcvtsi2ss \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 2a 00 \{evex\} vcvtsi2ss \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7f 08 7b 00 vcvtusi2sd \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7e 08 7b 00 vcvtusi2ss \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: 66 83 30 01 xorw \$0x1,\(%eax\) diff --git a/gas/testsuite/gas/i386/noreg32.d b/gas/testsuite/gas/i386/noreg32.d index e0505147a2c..9dbef908ce7 100644 --- a/gas/testsuite/gas/i386/noreg32.d +++ b/gas/testsuite/gas/i386/noreg32.d @@ -149,9 +149,9 @@ Disassembly of section .text: *[a-f0-9]+: f7 00 34 12 00 00 testl \$0x1234,\(%eax\) *[a-f0-9]+: f7 00 78 56 34 12 testl \$0x12345678,\(%eax\) *[a-f0-9]+: c5 fb 2a 00 vcvtsi2sd \(%eax\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7f 08 2a 00 vcvtsi2sd \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7f 08 2a 00 \{evex\} vcvtsi2sd \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: c5 fa 2a 00 vcvtsi2ss \(%eax\),%xmm0,%xmm0 - *[a-f0-9]+: 62 f1 7e 08 2a 00 vcvtsi2ss \(%eax\),%xmm0,%xmm0 + *[a-f0-9]+: 62 f1 7e 08 2a 00 \{evex\} vcvtsi2ss \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7f 08 7b 00 vcvtusi2sd \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: 62 f1 7e 08 7b 00 vcvtusi2ss \(%eax\),%xmm0,%xmm0 *[a-f0-9]+: 83 30 01 xorl \$0x1,\(%eax\) diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d index 9da5e7f4a22..613bb0f42ff 100644 --- a/gas/testsuite/gas/i386/opcode-intel.d +++ b/gas/testsuite/gas/i386/opcode-intel.d @@ -601,7 +601,7 @@ Disassembly of section .text: +[a-f0-9]+: 82 eb 01 sub bl,0x1 +[a-f0-9]+: 82 f3 01 xor bl,0x1 +[a-f0-9]+: 82 fb 01 cmp bl,0x1 - +[a-f0-9]+: 62 f3 7d 08 15 e8 ab vpextrw eax,xmm5,0xab + +[a-f0-9]+: 62 f3 7d 08 15 e8 ab \{evex\} vpextrw eax,xmm5,0xab +[a-f0-9]+: f6 c9 01 test cl,(0x)?0*1 +[a-f0-9]+: 66 f7 c9 02 00 test cx,(0x)?0*2 +[a-f0-9]+: f7 c9 04 00 00 00 test ecx,(0x)?0*4 diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d index 7a157ee7ddf..b4e76f5113f 100644 --- a/gas/testsuite/gas/i386/opcode-suffix.d +++ b/gas/testsuite/gas/i386/opcode-suffix.d @@ -601,5 +601,5 @@ Disassembly of section .text: +[a-f0-9]+: 82 eb 01 subb \$0x1,%bl +[a-f0-9]+: 82 f3 01 xorb \$0x1,%bl +[a-f0-9]+: 82 fb 01 cmpb \$0x1,%bl - +[a-f0-9]+: 62 f3 7d 08 15 e8 ab vpextrw \$0xab,%xmm5,%eax + +[a-f0-9]+: 62 f3 7d 08 15 e8 ab \{evex\} vpextrw \$0xab,%xmm5,%eax #pass diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d index c431c4ea68c..717269a9404 100644 --- a/gas/testsuite/gas/i386/opcode.d +++ b/gas/testsuite/gas/i386/opcode.d @@ -600,7 +600,7 @@ Disassembly of section .text: +[a-f0-9]+: 82 eb 01 sub \$0x1,%bl +[a-f0-9]+: 82 f3 01 xor \$0x1,%bl +[a-f0-9]+: 82 fb 01 cmp \$0x1,%bl - +[a-f0-9]+: 62 f3 7d 08 15 e8 ab vpextrw \$0xab,%xmm5,%eax + +[a-f0-9]+: 62 f3 7d 08 15 e8 ab \{evex\} vpextrw \$0xab,%xmm5,%eax +[a-f0-9]+: f6 c9 01 test \$(0x)?0*1,%cl +[a-f0-9]+: 66 f7 c9 02 00 test \$(0x)?0*2,%cx +[a-f0-9]+: f7 c9 04 00 00 00 test \$(0x)?0*4,%ecx diff --git a/gas/testsuite/gas/i386/optimize-4.d b/gas/testsuite/gas/i386/optimize-4.d index d97718faf97..1c7cbed3d74 100644 --- a/gas/testsuite/gas/i386/optimize-4.d +++ b/gas/testsuite/gas/i386/optimize-4.d @@ -147,6 +147,6 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%eax\),%ymm2,%ymm3 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 #pass diff --git a/gas/testsuite/gas/i386/optimize-5.d b/gas/testsuite/gas/i386/optimize-5.d index ecab78cb1a7..18f7dff459f 100644 --- a/gas/testsuite/gas/i386/optimize-5.d +++ b/gas/testsuite/gas/i386/optimize-5.d @@ -147,8 +147,8 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%eax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%eax\),%ymm2,%ymm3 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 +[a-f0-9]+: 62 f1 7d 28 6f d1 vmovdqa32 %ymm1,%ymm2 +[a-f0-9]+: 62 f1 fd 28 6f d1 vmovdqa64 %ymm1,%ymm2 +[a-f0-9]+: 62 f1 7f 08 6f d1 vmovdqu8 %xmm1,%xmm2 diff --git a/gas/testsuite/gas/i386/prefix.d b/gas/testsuite/gas/i386/prefix.d index 8c8b552baf0..001188b4b6c 100644 --- a/gas/testsuite/gas/i386/prefix.d +++ b/gas/testsuite/gas/i386/prefix.d @@ -89,7 +89,7 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 66 c5 f8 28 c0 data16 vmovaps %xmm0,%xmm0 [ ]*[a-f0-9]+: f3 c4 e1 78 28 c0 repz vmovaps %xmm0,%xmm0 [ ]*[a-f0-9]+: f2 c5 f8 28 c0 repnz vmovaps %xmm0,%xmm0 -[ ]*[a-f0-9]+: f0 62 f1 7c 08 28 c0 lock vmovaps %xmm0,%xmm0 +[ ]*[a-f0-9]+: f0 62 f1 7c 08 28 c0 lock \{evex\} vmovaps %xmm0,%xmm0 [ ]*[a-f0-9]+: c5 fb e6 40 20 vcvtpd2dqx 0x20\(%eax\),%xmm0 [ ]*[a-f0-9]+: 62 f1 ff 18 e6 40 04 vcvtpd2dq 0x20\(%eax\)\{1to2\},%xmm0 [ ]*[a-f0-9]+: c5 fb e6 40 20 vcvtpd2dqx 0x20\(%eax\),%xmm0 diff --git a/gas/testsuite/gas/i386/pseudos.d b/gas/testsuite/gas/i386/pseudos.d index 0772c636457..0df9b7265aa 100644 --- a/gas/testsuite/gas/i386/pseudos.d +++ b/gas/testsuite/gas/i386/pseudos.d @@ -18,15 +18,15 @@ Disassembly of section .text: +[a-f0-9]+: c4 e1 78 28 10 vmovaps \(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 10 vmovaps \(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 10 \{evex\} vmovaps \(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 00 00 00 00 vmovaps 0x0\(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 00 vmovaps 0x0\(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 vmovaps 0x0\(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 00 \{evex\} vmovaps 0x0\(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 \{evex\} vmovaps 0x0\(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 08 vmovaps 0x80\(%eax\),%xmm2 - +[a-f0-9]+: 67 62 f1 7c 08 28 97 80 00 vmovaps 0x80\(%bx\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 vmovaps 0x80\(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 08 \{evex\} vmovaps 0x80\(%eax\),%xmm2 + +[a-f0-9]+: 67 62 f1 7c 08 28 97 80 00 \{evex\} vmovaps 0x80\(%bx\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 \{evex\} vmovaps 0x80\(%eax\),%xmm2 +[a-f0-9]+: 89 c8 mov %ecx,%eax +[a-f0-9]+: 8b c1 mov %ecx,%eax +[a-f0-9]+: 89 c8 mov %ecx,%eax @@ -267,18 +267,18 @@ Disassembly of section .text: +[a-f0-9]+: c5 fa 7e f8 vmovq %xmm0,%xmm7 +[a-f0-9]+: c5 fa 7e f8 vmovq %xmm0,%xmm7 +[a-f0-9]+: c5 f9 d6 c7 vmovq %xmm0,%xmm7 - +[a-f0-9]+: 62 f1 fe 08 7e f8 vmovq %xmm0,%xmm7 - +[a-f0-9]+: 62 f1 fe 08 7e f8 vmovq %xmm0,%xmm7 - +[a-f0-9]+: 62 f1 fd 08 d6 c7 vmovq %xmm0,%xmm7 + +[a-f0-9]+: 62 f1 fe 08 7e f8 \{evex\} vmovq %xmm0,%xmm7 + +[a-f0-9]+: 62 f1 fe 08 7e f8 \{evex\} vmovq %xmm0,%xmm7 + +[a-f0-9]+: 62 f1 fd 08 d6 c7 \{evex\} vmovq %xmm0,%xmm7 +[a-f0-9]+: 66 0f c5 f8 00 pextrw \$0x0,%xmm0,%edi +[a-f0-9]+: 66 0f c5 f8 00 pextrw \$0x0,%xmm0,%edi +[a-f0-9]+: 66 0f 3a 15 c7 00 pextrw \$0x0,%xmm0,%edi +[a-f0-9]+: c5 f9 c5 f8 00 vpextrw \$0x0,%xmm0,%edi +[a-f0-9]+: c5 f9 c5 f8 00 vpextrw \$0x0,%xmm0,%edi +[a-f0-9]+: c4 e3 79 15 c7 00 vpextrw \$0x0,%xmm0,%edi - +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 vpextrw \$0x0,%xmm0,%edi - +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 vpextrw \$0x0,%xmm0,%edi - +[a-f0-9]+: 62 f3 7d 08 15 c7 00 vpextrw \$0x0,%xmm0,%edi + +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 \{evex\} vpextrw \$0x0,%xmm0,%edi + +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 \{evex\} vpextrw \$0x0,%xmm0,%edi + +[a-f0-9]+: 62 f3 7d 08 15 c7 00 \{evex\} vpextrw \$0x0,%xmm0,%edi +[a-f0-9]+: 66 0f 1a c3 bndmov %bnd3,%bnd0 +[a-f0-9]+: 66 0f 1a c3 bndmov %bnd3,%bnd0 +[a-f0-9]+: 66 0f 1b d8 bndmov %bnd3,%bnd0 @@ -318,15 +318,15 @@ Disassembly of section .text: +[a-f0-9]+: c4 e1 78 28 10 vmovaps \(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 10 vmovaps \(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 10 \{evex\} vmovaps \(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 00 00 00 00 vmovaps 0x0\(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 00 vmovaps 0x0\(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 vmovaps 0x0\(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 00 \{evex\} vmovaps 0x0\(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 \{evex\} vmovaps 0x0\(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%eax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%eax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 08 vmovaps 0x80\(%eax\),%xmm2 - +[a-f0-9]+: 67 62 f1 7c 08 28 97 80 00 vmovaps 0x80\(%bx\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 vmovaps 0x80\(%eax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 08 \{evex\} vmovaps 0x80\(%eax\),%xmm2 + +[a-f0-9]+: 67 62 f1 7c 08 28 97 80 00 \{evex\} vmovaps 0x80\(%bx\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 \{evex\} vmovaps 0x80\(%eax\),%xmm2 +[a-f0-9]+: 89 c8 mov %ecx,%eax +[a-f0-9]+: 8b c1 mov %ecx,%eax +[a-f0-9]+: 89 c8 mov %ecx,%eax diff --git a/gas/testsuite/gas/i386/x86-64-evex-lig-2.d b/gas/testsuite/gas/i386/x86-64-evex-lig-2.d index ac7bae48900..1f36b28286a 100644 --- a/gas/testsuite/gas/i386/x86-64-evex-lig-2.d +++ b/gas/testsuite/gas/i386/x86-64-evex-lig-2.d @@ -8,34 +8,34 @@ Disassembly of section .text: 0+ <_start>: - +[a-f0-9]+: 62 f1 7d 08 7e 21 vmovd %xmm4,\(%rcx\) - +[a-f0-9]+: 62 f1 7d 08 7e e1 vmovd %xmm4,%ecx - +[a-f0-9]+: 62 f1 7d 08 6e 21 vmovd \(%rcx\),%xmm4 - +[a-f0-9]+: 62 f1 7d 08 6e e1 vmovd %ecx,%xmm4 - +[a-f0-9]+: 62 f1 fd 08 7e 21 vmovq %xmm4,\(%rcx\) - +[a-f0-9]+: 62 f1 fd 08 7e e1 vmovq %xmm4,%rcx - +[a-f0-9]+: 62 f1 fd 08 6e 21 vmovq \(%rcx\),%xmm4 - +[a-f0-9]+: 62 f1 fd 08 6e e1 vmovq %rcx,%xmm4 - +[a-f0-9]+: 62 f1 fe 08 7e f4 vmovq %xmm4,%xmm6 - +[a-f0-9]+: 62 f3 7d 08 17 c0 00 vextractps \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 17 00 00 vextractps \$0x0,%xmm0,\(%rax\) - +[a-f0-9]+: 62 f3 7d 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 14 00 00 vpextrb \$0x0,%xmm0,\(%rax\) - +[a-f0-9]+: 62 f1 7d 08 c5 c0 00 vpextrw \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 15 c0 00 vpextrw \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 15 00 00 vpextrw \$0x0,%xmm0,\(%rax\) - +[a-f0-9]+: 62 f3 7d 08 16 c0 00 vpextrd \$0x0,%xmm0,%eax - +[a-f0-9]+: 62 f3 7d 08 16 00 00 vpextrd \$0x0,%xmm0,\(%rax\) - +[a-f0-9]+: 62 f3 fd 08 16 c0 00 vpextrq \$0x0,%xmm0,%rax - +[a-f0-9]+: 62 f3 fd 08 16 00 00 vpextrq \$0x0,%xmm0,\(%rax\) - +[a-f0-9]+: 62 f3 7d 08 21 c0 00 vinsertps \$0x0,%xmm0,%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 21 00 00 vinsertps \$0x0,\(%rax\),%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 20 00 00 vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0 - +[a-f0-9]+: 62 f1 7d 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 - +[a-f0-9]+: 62 f1 7d 08 c4 00 00 vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 22 c0 00 vpinsrd \$0x0,%eax,%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 7d 08 22 00 00 vpinsrd \$0x0,\(%rax\),%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 fd 08 22 c0 00 vpinsrq \$0x0,%rax,%xmm0,%xmm0 - +[a-f0-9]+: 62 f3 fd 08 22 00 00 vpinsrq \$0x0,\(%rax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f1 7d 08 7e 21 \{evex\} vmovd %xmm4,\(%rcx\) + +[a-f0-9]+: 62 f1 7d 08 7e e1 \{evex\} vmovd %xmm4,%ecx + +[a-f0-9]+: 62 f1 7d 08 6e 21 \{evex\} vmovd \(%rcx\),%xmm4 + +[a-f0-9]+: 62 f1 7d 08 6e e1 \{evex\} vmovd %ecx,%xmm4 + +[a-f0-9]+: 62 f1 fd 08 7e 21 \{evex\} vmovq %xmm4,\(%rcx\) + +[a-f0-9]+: 62 f1 fd 08 7e e1 \{evex\} vmovq %xmm4,%rcx + +[a-f0-9]+: 62 f1 fd 08 6e 21 \{evex\} vmovq \(%rcx\),%xmm4 + +[a-f0-9]+: 62 f1 fd 08 6e e1 \{evex\} vmovq %rcx,%xmm4 + +[a-f0-9]+: 62 f1 fe 08 7e f4 \{evex\} vmovq %xmm4,%xmm6 + +[a-f0-9]+: 62 f3 7d 08 17 c0 00 \{evex\} vextractps \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 17 00 00 \{evex\} vextractps \$0x0,%xmm0,\(%rax\) + +[a-f0-9]+: 62 f3 7d 08 14 c0 00 \{evex\} vpextrb \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 14 00 00 \{evex\} vpextrb \$0x0,%xmm0,\(%rax\) + +[a-f0-9]+: 62 f1 7d 08 c5 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 15 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 15 00 00 \{evex\} vpextrw \$0x0,%xmm0,\(%rax\) + +[a-f0-9]+: 62 f3 7d 08 16 c0 00 \{evex\} vpextrd \$0x0,%xmm0,%eax + +[a-f0-9]+: 62 f3 7d 08 16 00 00 \{evex\} vpextrd \$0x0,%xmm0,\(%rax\) + +[a-f0-9]+: 62 f3 fd 08 16 c0 00 \{evex\} vpextrq \$0x0,%xmm0,%rax + +[a-f0-9]+: 62 f3 fd 08 16 00 00 \{evex\} vpextrq \$0x0,%xmm0,\(%rax\) + +[a-f0-9]+: 62 f3 7d 08 21 c0 00 \{evex\} vinsertps \$0x0,%xmm0,%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 21 00 00 \{evex\} vinsertps \$0x0,\(%rax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 20 c0 00 \{evex\} vpinsrb \$0x0,%eax,%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 20 00 00 \{evex\} vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f1 7d 08 c4 c0 00 \{evex\} vpinsrw \$0x0,%eax,%xmm0,%xmm0 + +[a-f0-9]+: 62 f1 7d 08 c4 00 00 \{evex\} vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 22 c0 00 \{evex\} vpinsrd \$0x0,%eax,%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 7d 08 22 00 00 \{evex\} vpinsrd \$0x0,\(%rax\),%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 fd 08 22 c0 00 \{evex\} vpinsrq \$0x0,%rax,%xmm0,%xmm0 + +[a-f0-9]+: 62 f3 fd 08 22 00 00 \{evex\} vpinsrq \$0x0,\(%rax\),%xmm0,%xmm0 #pass diff --git a/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d b/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d index e1abc7ecb35..7e725aff361 100644 --- a/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d +++ b/gas/testsuite/gas/i386/x86-64-evex-wig1-intel.d @@ -18,15 +18,15 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 63 fd 08 17 aa 00 02 00 00 7b vextractps DWORD PTR \[rdx\+0x200\],xmm29,0x7b [ ]*[a-f0-9]+: 62 63 fd 08 17 6a 80 7b vextractps DWORD PTR \[rdx-0x200\],xmm29,0x7b [ ]*[a-f0-9]+: 62 63 fd 08 17 aa fc fd ff ff 7b vextractps DWORD PTR \[rdx-0x204\],xmm29,0x7b -[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 14 00 00 vpextrb BYTE PTR \[rax\],xmm0,0x0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw eax,xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 15 00 00 vpextrw WORD PTR \[rax\],xmm0,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb xmm0,xmm0,eax,0x0 -[ ]*[a-f0-9]+: 62 f3 fd 08 20 00 00 vpinsrb xmm0,xmm0,BYTE PTR \[rax\],0x0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw xmm0,xmm0,eax,0x0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 00 00 vpinsrw xmm0,xmm0,WORD PTR \[rax\],0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 \{evex\} vpextrb eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 14 00 00 \{evex\} vpextrb BYTE PTR \[rax\],xmm0,0x0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 \{evex\} vpextrw eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 \{evex\} vpextrw eax,xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 15 00 00 \{evex\} vpextrw WORD PTR \[rax\],xmm0,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 \{evex\} vpinsrb xmm0,xmm0,eax,0x0 +[ ]*[a-f0-9]+: 62 f3 fd 08 20 00 00 \{evex\} vpinsrb xmm0,xmm0,BYTE PTR \[rax\],0x0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 \{evex\} vpinsrw xmm0,xmm0,eax,0x0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 00 00 \{evex\} vpinsrw xmm0,xmm0,WORD PTR \[rax\],0x0 [ ]*[a-f0-9]+: 62 02 fd 4f 21 f5 vpmovsxbd zmm30\{k7\},xmm29 [ ]*[a-f0-9]+: 62 02 fd cf 21 f5 vpmovsxbd zmm30\{k7\}\{z\},xmm29 [ ]*[a-f0-9]+: 62 62 fd 4f 21 31 vpmovsxbd zmm30\{k7\},XMMWORD PTR \[rcx\] diff --git a/gas/testsuite/gas/i386/x86-64-evex-wig1.d b/gas/testsuite/gas/i386/x86-64-evex-wig1.d index e62e8f4405f..aa0fd5bb21d 100644 --- a/gas/testsuite/gas/i386/x86-64-evex-wig1.d +++ b/gas/testsuite/gas/i386/x86-64-evex-wig1.d @@ -18,15 +18,15 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 62 63 fd 08 17 aa 00 02 00 00 7b vextractps \$0x7b,%xmm29,0x200\(%rdx\) [ ]*[a-f0-9]+: 62 63 fd 08 17 6a 80 7b vextractps \$0x7b,%xmm29,-0x200\(%rdx\) [ ]*[a-f0-9]+: 62 63 fd 08 17 aa fc fd ff ff 7b vextractps \$0x7b,%xmm29,-0x204\(%rdx\) -[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 vpextrb \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 14 00 00 vpextrb \$0x0,%xmm0,\(%rax\) -[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 vpextrw \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 vpextrw \$0x0,%xmm0,%eax -[ ]*[a-f0-9]+: 62 f3 fd 08 15 00 00 vpextrw \$0x0,%xmm0,\(%rax\) -[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 vpinsrb \$0x0,%eax,%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f3 fd 08 20 00 00 vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 vpinsrw \$0x0,%eax,%xmm0,%xmm0 -[ ]*[a-f0-9]+: 62 f1 fd 08 c4 00 00 vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f3 fd 08 14 c0 00 \{evex\} vpextrb \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 14 00 00 \{evex\} vpextrb \$0x0,%xmm0,\(%rax\) +[ ]*[a-f0-9]+: 62 f1 fd 08 c5 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 15 c0 00 \{evex\} vpextrw \$0x0,%xmm0,%eax +[ ]*[a-f0-9]+: 62 f3 fd 08 15 00 00 \{evex\} vpextrw \$0x0,%xmm0,\(%rax\) +[ ]*[a-f0-9]+: 62 f3 fd 08 20 c0 00 \{evex\} vpinsrb \$0x0,%eax,%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f3 fd 08 20 00 00 \{evex\} vpinsrb \$0x0,\(%rax\),%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 c0 00 \{evex\} vpinsrw \$0x0,%eax,%xmm0,%xmm0 +[ ]*[a-f0-9]+: 62 f1 fd 08 c4 00 00 \{evex\} vpinsrw \$0x0,\(%rax\),%xmm0,%xmm0 [ ]*[a-f0-9]+: 62 02 fd 4f 21 f5 vpmovsxbd %xmm29,%zmm30\{%k7\} [ ]*[a-f0-9]+: 62 02 fd cf 21 f5 vpmovsxbd %xmm29,%zmm30\{%k7\}\{z\} [ ]*[a-f0-9]+: 62 62 fd 4f 21 31 vpmovsxbd \(%rcx\),%zmm30\{%k7\} diff --git a/gas/testsuite/gas/i386/x86-64-movd-intel.d b/gas/testsuite/gas/i386/x86-64-movd-intel.d index dac21c8752d..77b4dc06b24 100644 --- a/gas/testsuite/gas/i386/x86-64-movd-intel.d +++ b/gas/testsuite/gas/i386/x86-64-movd-intel.d @@ -16,8 +16,8 @@ Disassembly of section .text: +[a-f0-9]+: c4 e1 f9 6e c8 vmovq xmm1,rax +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd DWORD PTR \[rax\+0x80\],xmm1 +[a-f0-9]+: c4 e1 f9 7e c8 vmovq rax,xmm1 - +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd xmm1,DWORD PTR \[rax\+0x80\] - +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd DWORD PTR \[rax\+0x80\],xmm1 + +[a-f0-9]+: 62 f1 7d 08 6e 48 20 \{evex\} vmovd xmm1,DWORD PTR \[rax\+0x80\] + +[a-f0-9]+: 62 f1 7d 08 7e 48 20 \{evex\} vmovd DWORD PTR \[rax\+0x80\],xmm1 +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd xmm1,DWORD PTR \[rax\+0x80\] +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd xmm1,DWORD PTR \[rax\+0x80\] +[a-f0-9]+: 66 0f 6e c8 movd xmm1,eax @@ -34,12 +34,12 @@ Disassembly of section .text: +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd DWORD PTR \[rax\+0x80\],xmm1 +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd DWORD PTR \[rax\+0x80\],xmm1 +[a-f0-9]+: c5 f9 7e c8 vmovd eax,xmm1 - +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd xmm1,DWORD PTR \[rax\+0x80\] - +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd xmm1,DWORD PTR \[rax\+0x80\] - +[a-f0-9]+: 62 f1 7d 08 6e c8 vmovd xmm1,eax - +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd DWORD PTR \[rax\+0x80\],xmm1 - +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd DWORD PTR \[rax\+0x80\],xmm1 - +[a-f0-9]+: 62 f1 7d 08 7e c8 vmovd eax,xmm1 + +[a-f0-9]+: 62 f1 7d 08 6e 48 20 \{evex\} vmovd xmm1,DWORD PTR \[rax\+0x80\] + +[a-f0-9]+: 62 f1 7d 08 6e 48 20 \{evex\} vmovd xmm1,DWORD PTR \[rax\+0x80\] + +[a-f0-9]+: 62 f1 7d 08 6e c8 \{evex\} vmovd xmm1,eax + +[a-f0-9]+: 62 f1 7d 08 7e 48 20 \{evex\} vmovd DWORD PTR \[rax\+0x80\],xmm1 + +[a-f0-9]+: 62 f1 7d 08 7e 48 20 \{evex\} vmovd DWORD PTR \[rax\+0x80\],xmm1 + +[a-f0-9]+: 62 f1 7d 08 7e c8 \{evex\} vmovd eax,xmm1 +[a-f0-9]+: c4 e1 f9 6e c8 vmovq xmm1,rax +[a-f0-9]+: c4 e1 f9 7e c8 vmovq rax,xmm1 #pass diff --git a/gas/testsuite/gas/i386/x86-64-movd.d b/gas/testsuite/gas/i386/x86-64-movd.d index b034c331cf8..3e6c87815f0 100644 --- a/gas/testsuite/gas/i386/x86-64-movd.d +++ b/gas/testsuite/gas/i386/x86-64-movd.d @@ -15,8 +15,8 @@ Disassembly of section .text: +[a-f0-9]+: c4 e1 f9 6e c8 vmovq %rax,%xmm1 +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd %xmm1,0x80\(%rax\) +[a-f0-9]+: c4 e1 f9 7e c8 vmovq %xmm1,%rax - +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd 0x80\(%rax\),%xmm1 - +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd %xmm1,0x80\(%rax\) + +[a-f0-9]+: 62 f1 7d 08 6e 48 20 \{evex\} vmovd 0x80\(%rax\),%xmm1 + +[a-f0-9]+: 62 f1 7d 08 7e 48 20 \{evex\} vmovd %xmm1,0x80\(%rax\) +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd 0x80\(%rax\),%xmm1 +[a-f0-9]+: 66 0f 6e 88 80 00 00 00 movd 0x80\(%rax\),%xmm1 +[a-f0-9]+: 66 0f 6e c8 movd %eax,%xmm1 @@ -33,12 +33,12 @@ Disassembly of section .text: +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd %xmm1,0x80\(%rax\) +[a-f0-9]+: c5 f9 7e 88 80 00 00 00 vmovd %xmm1,0x80\(%rax\) +[a-f0-9]+: c5 f9 7e c8 vmovd %xmm1,%eax - +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd 0x80\(%rax\),%xmm1 - +[a-f0-9]+: 62 f1 7d 08 6e 48 20 vmovd 0x80\(%rax\),%xmm1 - +[a-f0-9]+: 62 f1 7d 08 6e c8 vmovd %eax,%xmm1 - +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd %xmm1,0x80\(%rax\) - +[a-f0-9]+: 62 f1 7d 08 7e 48 20 vmovd %xmm1,0x80\(%rax\) - +[a-f0-9]+: 62 f1 7d 08 7e c8 vmovd %xmm1,%eax + +[a-f0-9]+: 62 f1 7d 08 6e 48 20 \{evex\} vmovd 0x80\(%rax\),%xmm1 + +[a-f0-9]+: 62 f1 7d 08 6e 48 20 \{evex\} vmovd 0x80\(%rax\),%xmm1 + +[a-f0-9]+: 62 f1 7d 08 6e c8 \{evex\} vmovd %eax,%xmm1 + +[a-f0-9]+: 62 f1 7d 08 7e 48 20 \{evex\} vmovd %xmm1,0x80\(%rax\) + +[a-f0-9]+: 62 f1 7d 08 7e 48 20 \{evex\} vmovd %xmm1,0x80\(%rax\) + +[a-f0-9]+: 62 f1 7d 08 7e c8 \{evex\} vmovd %xmm1,%eax +[a-f0-9]+: c4 e1 f9 6e c8 vmovq %rax,%xmm1 +[a-f0-9]+: c4 e1 f9 7e c8 vmovq %xmm1,%rax #pass diff --git a/gas/testsuite/gas/i386/x86-64-optimize-5.d b/gas/testsuite/gas/i386/x86-64-optimize-5.d index 8853952892a..9fd0ec2aa37 100644 --- a/gas/testsuite/gas/i386/x86-64-optimize-5.d +++ b/gas/testsuite/gas/i386/x86-64-optimize-5.d @@ -203,8 +203,8 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%rax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%rax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%rax\),%ymm2,%ymm3 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 +[a-f0-9]+: 62 f1 7d 28 6f d1 vmovdqa32 %ymm1,%ymm2 +[a-f0-9]+: 62 f1 fd 28 6f d1 vmovdqa64 %ymm1,%ymm2 +[a-f0-9]+: 62 f1 7f 08 6f d1 vmovdqu8 %xmm1,%xmm2 diff --git a/gas/testsuite/gas/i386/x86-64-optimize-6.d b/gas/testsuite/gas/i386/x86-64-optimize-6.d index c4228294932..6cacaf9d783 100644 --- a/gas/testsuite/gas/i386/x86-64-optimize-6.d +++ b/gas/testsuite/gas/i386/x86-64-optimize-6.d @@ -203,8 +203,8 @@ Disassembly of section .text: +[a-f0-9]+: 62 .* vporq 0x80\(%rax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxord 0x80\(%rax\),%ymm2,%ymm3 +[a-f0-9]+: 62 .* vpxorq 0x80\(%rax\),%ymm2,%ymm3 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 - +[a-f0-9]+: 62 f1 f5 08 55 e9 vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 + +[a-f0-9]+: 62 f1 f5 08 55 e9 \{evex\} vandnpd %xmm1,%xmm1,%xmm5 +[a-f0-9]+: 62 f1 7d 28 6f d1 vmovdqa32 %ymm1,%ymm2 +[a-f0-9]+: 62 f1 fd 28 6f d1 vmovdqa64 %ymm1,%ymm2 +[a-f0-9]+: 62 f1 7f 08 6f d1 vmovdqu8 %xmm1,%xmm2 diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.d b/gas/testsuite/gas/i386/x86-64-pseudos.d index 225e494d8fa..fb71942046d 100644 --- a/gas/testsuite/gas/i386/x86-64-pseudos.d +++ b/gas/testsuite/gas/i386/x86-64-pseudos.d @@ -18,14 +18,14 @@ Disassembly of section .text: +[a-f0-9]+: c4 e1 78 28 10 vmovaps \(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 10 vmovaps \(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 10 \{evex\} vmovaps \(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 00 00 00 00 vmovaps 0x0\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 00 vmovaps 0x0\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 vmovaps 0x0\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 00 \{evex\} vmovaps 0x0\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 \{evex\} vmovaps 0x0\(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 08 vmovaps 0x80\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 vmovaps 0x80\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 08 \{evex\} vmovaps 0x80\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 \{evex\} vmovaps 0x80\(%rax\),%xmm2 +[a-f0-9]+: 48 89 c8 mov %rcx,%rax +[a-f0-9]+: 48 8b c1 mov %rcx,%rax +[a-f0-9]+: 48 89 c8 mov %rcx,%rax @@ -278,18 +278,18 @@ Disassembly of section .text: +[a-f0-9]+: c5 fa 7e f8 vmovq %xmm0,%xmm7 +[a-f0-9]+: c5 fa 7e f8 vmovq %xmm0,%xmm7 +[a-f0-9]+: c5 f9 d6 c7 vmovq %xmm0,%xmm7 - +[a-f0-9]+: 62 f1 fe 08 7e f8 vmovq %xmm0,%xmm7 - +[a-f0-9]+: 62 f1 fe 08 7e f8 vmovq %xmm0,%xmm7 - +[a-f0-9]+: 62 f1 fd 08 d6 c7 vmovq %xmm0,%xmm7 + +[a-f0-9]+: 62 f1 fe 08 7e f8 \{evex\} vmovq %xmm0,%xmm7 + +[a-f0-9]+: 62 f1 fe 08 7e f8 \{evex\} vmovq %xmm0,%xmm7 + +[a-f0-9]+: 62 f1 fd 08 d6 c7 \{evex\} vmovq %xmm0,%xmm7 +[a-f0-9]+: 66 0f c5 f8 00 pextrw \$0x0,%xmm0,%edi +[a-f0-9]+: 66 0f c5 f8 00 pextrw \$0x0,%xmm0,%edi +[a-f0-9]+: 66 0f 3a 15 c7 00 pextrw \$0x0,%xmm0,%edi +[a-f0-9]+: c5 f9 c5 f8 00 vpextrw \$0x0,%xmm0,%edi +[a-f0-9]+: c5 f9 c5 f8 00 vpextrw \$0x0,%xmm0,%edi +[a-f0-9]+: c4 e3 79 15 c7 00 vpextrw \$0x0,%xmm0,%edi - +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 vpextrw \$0x0,%xmm0,%edi - +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 vpextrw \$0x0,%xmm0,%edi - +[a-f0-9]+: 62 f3 7d 08 15 c7 00 vpextrw \$0x0,%xmm0,%edi + +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 \{evex\} vpextrw \$0x0,%xmm0,%edi + +[a-f0-9]+: 62 f1 7d 08 c5 f8 00 \{evex\} vpextrw \$0x0,%xmm0,%edi + +[a-f0-9]+: 62 f3 7d 08 15 c7 00 \{evex\} vpextrw \$0x0,%xmm0,%edi +[a-f0-9]+: 66 0f 1a c3 bndmov %bnd3,%bnd0 +[a-f0-9]+: 66 0f 1a c3 bndmov %bnd3,%bnd0 +[a-f0-9]+: 66 0f 1b d8 bndmov %bnd3,%bnd0 @@ -341,14 +341,14 @@ Disassembly of section .text: +[a-f0-9]+: c4 e1 78 28 10 vmovaps \(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 10 vmovaps \(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 10 vmovaps \(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 10 \{evex\} vmovaps \(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 00 00 00 00 vmovaps 0x0\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 00 vmovaps 0x0\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 vmovaps 0x0\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 00 \{evex\} vmovaps 0x0\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 00 00 00 00 \{evex\} vmovaps 0x0\(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%rax\),%xmm2 +[a-f0-9]+: c5 f8 28 90 80 00 00 00 vmovaps 0x80\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 50 08 vmovaps 0x80\(%rax\),%xmm2 - +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 vmovaps 0x80\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 50 08 \{evex\} vmovaps 0x80\(%rax\),%xmm2 + +[a-f0-9]+: 62 f1 7c 08 28 90 80 00 00 00 \{evex\} vmovaps 0x80\(%rax\),%xmm2 +[a-f0-9]+: 48 89 c8 mov %rcx,%rax +[a-f0-9]+: 48 8b c1 mov %rcx,%rax +[a-f0-9]+: 48 89 c8 mov %rcx,%rax |