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authorMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2011-11-25 15:17:36 +0000
committerMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2011-11-25 15:17:36 +0000
commitc6400f8afd157ff6344a2c180b91e6fd8f6e092f (patch)
tree266d45d0aaab366bf392769246061d79de8444ad /gas/config
parenta272e28c9d0520bc77bd4b9956160f9a638bd46d (diff)
downloadbinutils-gdb-c6400f8afd157ff6344a2c180b91e6fd8f6e092f.tar.gz
* gas/config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU
is specified. * gas/testsuite/gas/arm/mov-highregs-any.d: New testcase. * gas/testsuite/gas/arm/mov-highregs-any.s: Likewise. * gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise. * gas/testsuite/gas/arm/mov-lowregs-any.s: Likewise.
Diffstat (limited to 'gas/config')
-rw-r--r--gas/config/tc-arm.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index bf44228c13d..6e23be09dfb 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -10914,10 +10914,16 @@ do_t_mov_cmp (void)
{
case T_MNEM_mov:
/* In v4t or v5t a move of two lowregs produces unpredictable
- results. Don't allow this.*/
- constraint (low_regs && !ARM_CPU_HAS_FEATURE (selected_cpu,
- arm_ext_v6),"MOV Rd, Rs with two low registers is not "
- "permitted on this architecture");
+ results. Don't allow this. */
+ if (low_regs)
+ {
+ constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6),
+ "MOV Rd, Rs with two low registers is not "
+ "permitted on this architecture");
+ ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used,
+ arm_ext_v6);
+ }
+
inst.instruction = T_OPCODE_MOV_HR;
inst.instruction |= (Rn & 0x8) << 4;
inst.instruction |= (Rn & 0x7);