summaryrefslogtreecommitdiff
path: root/gas/config/tc-sparc.c
diff options
context:
space:
mode:
authornobody <>1999-12-08 02:51:14 +0000
committernobody <>1999-12-08 02:51:14 +0000
commitc2cdd7b0331a9294558205e67c224e48ad995ed5 (patch)
tree726045abddc1c9d5c21d386ee4dad72051efc35c /gas/config/tc-sparc.c
parentde57eccd12a59b2ccb9700dca5c6e86d5c6425ad (diff)
downloadbinutils-gdb-gdb-1999-12-07.tar.gz
This commit was manufactured by cvs2svn to create tag 'gdb-1999-12-07'.gdb-1999-12-07
Sprout from master 1999-12-08 02:51:13 UTC Jason Molenda <jmolenda@apple.com> 'import gdb-1999-12-07 snapshot' Cherrypick from FSF 1999-08-16 19:57:18 UTC Jason Molenda <jmolenda@apple.com> 'import gdb-1999-08-16 snapshot': readline/CHANGELOG readline/CHANGES readline/COPYING readline/INSTALL readline/MANIFEST readline/Makefile.in readline/README readline/acconfig.h readline/aclocal.m4 readline/ansi_stdlib.h readline/bind.c readline/callback.c readline/chardefs.h readline/complete.c readline/config.h.in readline/configure readline/configure.in readline/display.c readline/doc/Makefile.in readline/doc/hist.texinfo readline/doc/hstech.texinfo readline/doc/hsuser.texinfo readline/doc/manvers.texinfo readline/doc/readline.0 readline/doc/readline.3 readline/doc/rlman.texinfo readline/doc/rltech.texinfo readline/doc/rluser.texinfo readline/doc/texi2dvi readline/doc/texi2html readline/emacs_keymap.c readline/examples/Inputrc readline/examples/Makefile.in readline/examples/fileman.c readline/examples/histexamp.c readline/examples/manexamp.c readline/examples/rl.c readline/examples/rltest.c readline/examples/rlversion.c readline/funmap.c readline/histexpand.c readline/histfile.c readline/histlib.h readline/history.c readline/history.h readline/histsearch.c readline/input.c readline/isearch.c readline/keymaps.c readline/keymaps.h readline/kill.c readline/macro.c readline/nls.c readline/parens.c readline/posixdir.h readline/posixjmp.h readline/posixstat.h readline/readline.c readline/readline.h readline/rlconf.h readline/rldefs.h readline/rlstdc.h readline/rltty.c readline/rltty.h readline/rlwinsize.h readline/savestring.c readline/search.c readline/shell.c readline/shlib/Makefile.in readline/signals.c readline/support/config.guess readline/support/config.sub readline/support/install.sh readline/support/mkdirs readline/support/mkdist readline/support/shlib-install readline/support/shobj-conf readline/tcap.h readline/terminal.c readline/tilde.c readline/tilde.h readline/undo.c readline/util.c readline/vi_keymap.c readline/vi_mode.c readline/xmalloc.c Delete: .cvsignore COPYING COPYING.LIB ChangeLog Makefile.in README bfd/COPYING bfd/ChangeLog bfd/ChangeLog-9193 bfd/ChangeLog-9495 bfd/ChangeLog-9697 bfd/Makefile.am bfd/Makefile.in bfd/PORTING bfd/README bfd/TODO bfd/acinclude.m4 bfd/aclocal.m4 bfd/aix386-core.c bfd/aout-adobe.c bfd/aout-arm.c bfd/aout-encap.c bfd/aout-ns32k.c bfd/aout-sparcle.c bfd/aout-target.h bfd/aout-tic30.c bfd/aout0.c bfd/aout32.c bfd/aout64.c bfd/aoutf1.h bfd/aoutx.h bfd/archive.c bfd/archures.c bfd/armnetbsd.c bfd/bfd-in.h bfd/bfd-in2.h bfd/bfd.c bfd/binary.c bfd/bout.c bfd/cache.c bfd/cf-i386lynx.c bfd/cf-m68klynx.c bfd/cf-sparclynx.c bfd/cisco-core.c bfd/coff-a29k.c bfd/coff-alpha.c bfd/coff-apollo.c bfd/coff-arm.c bfd/coff-aux.c bfd/coff-go32.c bfd/coff-h8300.c bfd/coff-h8500.c bfd/coff-i386.c bfd/coff-i860.c bfd/coff-i960.c bfd/coff-m68k.c bfd/coff-m88k.c bfd/coff-mcore.c bfd/coff-mips.c bfd/coff-pmac.c bfd/coff-ppc.c bfd/coff-rs6000.c bfd/coff-sh.c bfd/coff-sparc.c bfd/coff-stgo32.c bfd/coff-svm68k.c bfd/coff-tic30.c bfd/coff-tic80.c bfd/coff-u68k.c bfd/coff-w65.c bfd/coff-we32k.c bfd/coff-z8k.c bfd/coffcode.h bfd/coffgen.c bfd/cofflink.c bfd/coffswap.h bfd/config.bfd bfd/config.in bfd/configure bfd/configure.com bfd/configure.host bfd/configure.in bfd/corefile.c bfd/cpu-a29k.c bfd/cpu-alpha.c bfd/cpu-arc.c bfd/cpu-arm.c bfd/cpu-d10v.c bfd/cpu-d30v.c bfd/cpu-fr30.c bfd/cpu-h8300.c bfd/cpu-h8500.c bfd/cpu-hppa.c bfd/cpu-i386.c bfd/cpu-i860.c bfd/cpu-i960.c bfd/cpu-m10200.c bfd/cpu-m10300.c bfd/cpu-m32r.c bfd/cpu-m68k.c bfd/cpu-m88k.c bfd/cpu-mcore.c bfd/cpu-mips.c bfd/cpu-ns32k.c bfd/cpu-pj.c bfd/cpu-powerpc.c bfd/cpu-rs6000.c bfd/cpu-sh.c bfd/cpu-sparc.c bfd/cpu-tic30.c bfd/cpu-tic80.c bfd/cpu-v850.c bfd/cpu-vax.c bfd/cpu-w65.c bfd/cpu-we32k.c bfd/cpu-z8k.c bfd/demo64.c bfd/dep-in.sed bfd/doc/ChangeLog bfd/doc/Makefile.am bfd/doc/Makefile.in bfd/doc/bfd.texinfo bfd/doc/bfdint.texi bfd/doc/bfdsumm.texi bfd/doc/chew.c bfd/doc/doc.str bfd/doc/makefile.vms bfd/doc/proto.str bfd/dwarf1.c bfd/dwarf2.c bfd/ecoff.c bfd/ecofflink.c bfd/ecoffswap.h bfd/elf-bfd.h bfd/elf-hppa.h bfd/elf-m10200.c bfd/elf-m10300.c bfd/elf.c bfd/elf32-arc.c bfd/elf32-arm.h bfd/elf32-d10v.c bfd/elf32-d30v.c bfd/elf32-fr30.c bfd/elf32-gen.c bfd/elf32-hppa.c bfd/elf32-hppa.h bfd/elf32-i386.c bfd/elf32-i860.c bfd/elf32-i960.c bfd/elf32-m32r.c bfd/elf32-m68k.c bfd/elf32-m88k.c bfd/elf32-mcore.c bfd/elf32-mips.c bfd/elf32-pj.c bfd/elf32-ppc.c bfd/elf32-sh.c bfd/elf32-sparc.c bfd/elf32-v850.c bfd/elf32.c bfd/elf64-alpha.c bfd/elf64-gen.c bfd/elf64-mips.c bfd/elf64-sparc.c bfd/elf64.c bfd/elfarm-nabi.c bfd/elfarm-oabi.c bfd/elfcode.h bfd/elfcore.h bfd/elflink.c bfd/elflink.h bfd/elfxx-target.h bfd/epoc-pe-arm.c bfd/epoc-pei-arm.c bfd/format.c bfd/freebsd.h bfd/gen-aout.c bfd/genlink.h bfd/go32stub.h bfd/hash.c bfd/host-aout.c bfd/hosts/alphalinux.h bfd/hosts/alphavms.h bfd/hosts/decstation.h bfd/hosts/delta68.h bfd/hosts/dpx2.h bfd/hosts/hp300bsd.h bfd/hosts/i386bsd.h bfd/hosts/i386linux.h bfd/hosts/i386mach3.h bfd/hosts/i386sco.h bfd/hosts/i860mach3.h bfd/hosts/m68kaux.h bfd/hosts/m68klinux.h bfd/hosts/m88kmach3.h bfd/hosts/mipsbsd.h bfd/hosts/mipsmach3.h bfd/hosts/news-mips.h bfd/hosts/news.h bfd/hosts/pc532mach.h bfd/hosts/riscos.h bfd/hosts/symmetry.h bfd/hosts/tahoe.h bfd/hosts/vaxbsd.h bfd/hosts/vaxult.h bfd/hosts/vaxult2.h bfd/hp300bsd.c bfd/hp300hpux.c bfd/hppa_stubs.h bfd/hppabsd-core.c bfd/hpux-core.c bfd/i386aout.c bfd/i386bsd.c bfd/i386dynix.c bfd/i386freebsd.c bfd/i386linux.c bfd/i386lynx.c bfd/i386mach3.c bfd/i386msdos.c bfd/i386netbsd.c bfd/i386os9k.c bfd/ieee.c bfd/ihex.c bfd/init.c bfd/irix-core.c bfd/libaout.h bfd/libbfd-in.h bfd/libbfd.c bfd/libbfd.h bfd/libcoff-in.h bfd/libcoff.h bfd/libecoff.h bfd/libhppa.h bfd/libieee.h bfd/libnlm.h bfd/liboasys.h bfd/libpei.h bfd/linker.c bfd/lynx-core.c bfd/m68k4knetbsd.c bfd/m68klinux.c bfd/m68klynx.c bfd/m68knetbsd.c bfd/m88kmach3.c bfd/makefile.vms bfd/mipsbsd.c bfd/mpw-config.in bfd/mpw-make.sed bfd/netbsd-core.c bfd/netbsd.h bfd/newsos3.c bfd/nlm-target.h bfd/nlm.c bfd/nlm32-alpha.c bfd/nlm32-i386.c bfd/nlm32-ppc.c bfd/nlm32-sparc.c bfd/nlm32.c bfd/nlm64.c bfd/nlmcode.h bfd/nlmswap.h bfd/ns32k.h bfd/ns32knetbsd.c bfd/oasys.c bfd/opncls.c bfd/osf-core.c bfd/pc532-mach.c bfd/pe-arm.c bfd/pe-i386.c bfd/pe-mcore.c bfd/pe-ppc.c bfd/pei-arm.c bfd/pei-i386.c bfd/pei-mcore.c bfd/pei-ppc.c bfd/peicode.h bfd/peigen.c bfd/po/Make-in bfd/po/POTFILES.in bfd/po/bfd.pot bfd/ppcboot.c bfd/ptrace-core.c bfd/reloc.c bfd/reloc16.c bfd/riscix.c bfd/rs6000-core.c bfd/sco5-core.c bfd/section.c bfd/som.c bfd/som.h bfd/sparclinux.c bfd/sparclynx.c bfd/sparcnetbsd.c bfd/srec.c bfd/stab-syms.c bfd/stabs.c bfd/stamp-h.in bfd/sunos.c bfd/syms.c bfd/sysdep.h bfd/targets.c bfd/targmatch.sed bfd/tekhex.c bfd/trad-core.c bfd/vaxnetbsd.c bfd/versados.c bfd/vms-gsd.c bfd/vms-hdr.c bfd/vms-misc.c bfd/vms-tir.c bfd/vms.c bfd/vms.h bfd/xcofflink.c binutils/ChangeLog binutils/Makefile.am binutils/Makefile.in binutils/NEWS binutils/README binutils/acinclude.m4 binutils/aclocal.m4 binutils/addr2line.1 binutils/addr2line.c binutils/ar.1 binutils/ar.c binutils/arlex.l binutils/arparse.y binutils/arsup.c binutils/arsup.h binutils/binutils.texi binutils/bucomm.c binutils/bucomm.h binutils/budbg.h binutils/coffdump.c binutils/coffgrok.c binutils/coffgrok.h binutils/config.in binutils/configure binutils/configure.com binutils/configure.in binutils/cxxfilt.man binutils/debug.c binutils/debug.h binutils/deflex.l binutils/defparse.y binutils/dep-in.sed binutils/dlltool.c binutils/dlltool.h binutils/dllwrap.c binutils/dyn-string.c binutils/dyn-string.h binutils/filemode.c binutils/ieee.c binutils/is-ranlib.c binutils/is-strip.c binutils/mac-binutils.r binutils/makefile.vms-in binutils/maybe-ranlib.c binutils/maybe-strip.c binutils/mpw-config.in binutils/mpw-make.sed binutils/nlmconv.1 binutils/nlmconv.c binutils/nlmconv.h binutils/nlmheader.y binutils/nm.1 binutils/nm.c binutils/not-ranlib.c binutils/not-strip.c binutils/objcopy.1 binutils/objcopy.c binutils/objdump.1 binutils/objdump.c binutils/po/Make-in binutils/po/POTFILES.in binutils/po/binutils.pot binutils/prdbg.c binutils/ranlib.1 binutils/ranlib.sh binutils/rclex.l binutils/rcparse.y binutils/rdcoff.c binutils/rddbg.c binutils/readelf.c binutils/rename.c binutils/resbin.c binutils/rescoff.c binutils/resrc.c binutils/resres.c binutils/sanity.sh binutils/size.1 binutils/size.c binutils/srconv.c binutils/stabs.c binutils/stamp-h.in binutils/strings.1 binutils/strings.c binutils/strip.1 binutils/sysdump.c binutils/sysinfo.y binutils/syslex.l binutils/sysroff.info binutils/testsuite/ChangeLog binutils/testsuite/binutils-all/ar.exp binutils/testsuite/binutils-all/bintest.s binutils/testsuite/binutils-all/hppa/addendbug.s binutils/testsuite/binutils-all/hppa/freg.s binutils/testsuite/binutils-all/hppa/objdump.exp binutils/testsuite/binutils-all/nm.exp binutils/testsuite/binutils-all/objcopy.exp binutils/testsuite/binutils-all/objdump.exp binutils/testsuite/binutils-all/readelf.exp binutils/testsuite/binutils-all/readelf.h binutils/testsuite/binutils-all/readelf.r binutils/testsuite/binutils-all/readelf.s binutils/testsuite/binutils-all/readelf.ss binutils/testsuite/binutils-all/readelf.wi binutils/testsuite/binutils-all/size.exp binutils/testsuite/binutils-all/testprog.c binutils/testsuite/config/default.exp binutils/testsuite/config/hppa.sed binutils/testsuite/lib/utils-lib.exp binutils/version.c binutils/windres.c binutils/windres.h binutils/winduni.c binutils/winduni.h binutils/wrstabs.c config-ml.in config.guess config.if config.sub config/ChangeLog config/acinclude.m4 config/mh-a68bsd config/mh-aix386 config/mh-aix43 config/mh-apollo68 config/mh-armpic config/mh-cxux config/mh-cygwin config/mh-decstation config/mh-delta88 config/mh-dgux config/mh-dgux386 config/mh-djgpp config/mh-elfalphapic config/mh-hp300 config/mh-hpux config/mh-hpux8 config/mh-interix config/mh-irix4 config/mh-irix5 config/mh-irix6 config/mh-lynxos config/mh-lynxrs6k config/mh-m68kpic config/mh-mingw32 config/mh-ncr3000 config/mh-ncrsvr43 config/mh-necv4 config/mh-papic config/mh-ppcpic config/mh-riscos config/mh-sco config/mh-solaris config/mh-sparcpic config/mh-sun3 config/mh-sysv config/mh-sysv4 config/mh-sysv5 config/mh-vaxult2 config/mh-x86pic config/mpw-mh-mpw config/mpw/ChangeLog config/mpw/MoveIfChange config/mpw/README config/mpw/forward-include config/mpw/g-mpw-make.sed config/mpw/mpw-touch config/mpw/mpw-true config/mpw/null-command config/mpw/open-brace config/mpw/tr-7to8-src config/mpw/true config/mt-armpic config/mt-d30v config/mt-elfalphapic config/mt-linux config/mt-m68kpic config/mt-netware config/mt-ospace config/mt-papic config/mt-ppcpic config/mt-sparcpic config/mt-v810 config/mt-x86pic configure configure.in etc/ChangeLog etc/Makefile.in etc/add-log.el etc/add-log.vi etc/configbuild.ein etc/configbuild.fig etc/configbuild.jin etc/configbuild.tin etc/configdev.ein etc/configdev.fig etc/configdev.jin etc/configdev.tin etc/configure etc/configure.in etc/configure.texi etc/make-stds.texi etc/standards.texi gas/CONTRIBUTORS gas/COPYING gas/ChangeLog gas/ChangeLog-9295 gas/ChangeLog-9697 gas/Makefile.am gas/Makefile.in gas/NEWS gas/README gas/README-vms gas/acinclude.m4 gas/aclocal.m4 gas/app.c gas/as.c gas/as.h gas/asintl.h gas/atof-generic.c gas/bignum-copy.c gas/bignum.h gas/bit_fix.h gas/cgen.c gas/cgen.h gas/cond.c gas/config-gas.com gas/config.in gas/config/aout_gnu.h gas/config/atof-ieee.c gas/config/atof-tahoe.c gas/config/atof-vax.c gas/config/e-i386coff.c gas/config/e-i386elf.c gas/config/e-mipsecoff.c gas/config/e-mipself.c gas/config/itbl-mips.h gas/config/m68k-parse.h gas/config/m68k-parse.y gas/config/m88k-opcode.h gas/config/obj-aout.c gas/config/obj-aout.h gas/config/obj-bout.c gas/config/obj-bout.h gas/config/obj-coff.c gas/config/obj-coff.h gas/config/obj-ecoff.c gas/config/obj-ecoff.h gas/config/obj-elf.c gas/config/obj-elf.h gas/config/obj-evax.c gas/config/obj-evax.h gas/config/obj-generic.c gas/config/obj-generic.h gas/config/obj-hp300.c gas/config/obj-hp300.h gas/config/obj-ieee.c gas/config/obj-ieee.h gas/config/obj-multi.c gas/config/obj-multi.h gas/config/obj-som.c gas/config/obj-som.h gas/config/obj-vms.c gas/config/obj-vms.h gas/config/tc-a29k.c gas/config/tc-a29k.h gas/config/tc-alpha.c gas/config/tc-alpha.h gas/config/tc-arc.c gas/config/tc-arc.h gas/config/tc-arm.c gas/config/tc-arm.h gas/config/tc-d10v.c gas/config/tc-d10v.h gas/config/tc-d30v.c gas/config/tc-d30v.h gas/config/tc-fr30.c gas/config/tc-fr30.h gas/config/tc-generic.c gas/config/tc-generic.h gas/config/tc-h8300.c gas/config/tc-h8300.h gas/config/tc-h8500.c gas/config/tc-h8500.h gas/config/tc-hppa.c gas/config/tc-hppa.h gas/config/tc-i386.c gas/config/tc-i386.h gas/config/tc-i860.c gas/config/tc-i860.h gas/config/tc-i960.c gas/config/tc-i960.h gas/config/tc-m32r.c gas/config/tc-m32r.h gas/config/tc-m68851.h gas/config/tc-m68k.c gas/config/tc-m68k.h gas/config/tc-m88k.c gas/config/tc-m88k.h gas/config/tc-mcore.c gas/config/tc-mcore.h gas/config/tc-mips.c gas/config/tc-mips.h gas/config/tc-mn10200.c gas/config/tc-mn10200.h gas/config/tc-mn10300.c gas/config/tc-mn10300.h gas/config/tc-ns32k.c gas/config/tc-ns32k.h gas/config/tc-pj.c gas/config/tc-pj.h gas/config/tc-ppc.c gas/config/tc-ppc.h gas/config/tc-sh.c gas/config/tc-sh.h gas/config/tc-sparc.c gas/config/tc-sparc.h gas/config/tc-tahoe.c gas/config/tc-tahoe.h gas/config/tc-tic30.c gas/config/tc-tic30.h gas/config/tc-tic80.c gas/config/tc-tic80.h gas/config/tc-v850.c gas/config/tc-v850.h gas/config/tc-vax.c gas/config/tc-vax.h gas/config/tc-w65.c gas/config/tc-w65.h gas/config/tc-z8k.c gas/config/tc-z8k.h gas/config/te-386bsd.h gas/config/te-aux.h gas/config/te-delt88.h gas/config/te-delta.h gas/config/te-dpx2.h gas/config/te-dynix.h gas/config/te-epoc-pe.h gas/config/te-generic.h gas/config/te-go32.h gas/config/te-hp300.h gas/config/te-hppa.h gas/config/te-i386aix.h gas/config/te-ic960.h gas/config/te-interix.h gas/config/te-linux.h gas/config/te-lnews.h gas/config/te-lynx.h gas/config/te-mach.h gas/config/te-macos.h gas/config/te-multi.h gas/config/te-nbsd.h gas/config/te-nbsd532.h gas/config/te-pc532mach.h gas/config/te-pe.h gas/config/te-ppcnw.h gas/config/te-psos.h gas/config/te-riscix.h gas/config/te-sparcaout.h gas/config/te-sun3.h gas/config/te-svr4.h gas/config/te-sysv32.h gas/config/vax-inst.h gas/config/vms-a-conf.h gas/config/vms-conf.h gas/configure gas/configure.in gas/debug.c gas/dep-in.sed gas/depend.c gas/doc/Makefile.am gas/doc/Makefile.in gas/doc/all.texi gas/doc/as.1 gas/doc/as.texinfo gas/doc/c-a29k.texi gas/doc/c-arm.texi gas/doc/c-d10v.texi gas/doc/c-d30v.texi gas/doc/c-h8300.texi gas/doc/c-h8500.texi gas/doc/c-hppa.texi gas/doc/c-i386.texi gas/doc/c-i960.texi gas/doc/c-m32r.texi gas/doc/c-m68k.texi gas/doc/c-mips.texi gas/doc/c-ns32k.texi gas/doc/c-pj.texi gas/doc/c-sh.texi gas/doc/c-sparc.texi gas/doc/c-v850.texi gas/doc/c-vax.texi gas/doc/c-z8k.texi gas/doc/gasp.texi gas/doc/h8.texi gas/doc/internals.texi gas/dwarf2dbg.c gas/dwarf2dbg.h gas/ecoff.c gas/ecoff.h gas/ehopt.c gas/emul-target.h gas/emul.h gas/expr.c gas/expr.h gas/flonum-copy.c gas/flonum-konst.c gas/flonum-mult.c gas/flonum.h gas/frags.c gas/frags.h gas/gasp.c gas/gdbinit.in gas/hash.c gas/hash.h gas/input-file.c gas/input-file.h gas/input-scrub.c gas/itbl-lex.l gas/itbl-ops.c gas/itbl-ops.h gas/itbl-parse.y gas/link.cmd gas/listing.c gas/listing.h gas/literal.c gas/mac-as.r gas/macro.c gas/macro.h gas/makefile.vms gas/messages.c gas/mpw-config.in gas/mpw-make.sed gas/obj.h gas/output-file.c gas/output-file.h gas/po/Make-in gas/po/POTFILES.in gas/po/gas.pot gas/read.c gas/read.h gas/sb.c gas/sb.h gas/stabs.c gas/stamp-h.in gas/struc-symbol.h gas/subsegs.c gas/subsegs.h gas/symbols.c gas/symbols.h gas/tc.h gas/testsuite/ChangeLog gas/testsuite/config/default.exp gas/testsuite/gas/all/align.d gas/testsuite/gas/all/align.s gas/testsuite/gas/all/cofftag.d gas/testsuite/gas/all/cofftag.s gas/testsuite/gas/all/comment.s gas/testsuite/gas/all/cond.d gas/testsuite/gas/all/cond.s gas/testsuite/gas/all/diff1.s gas/testsuite/gas/all/float.s gas/testsuite/gas/all/gas.exp gas/testsuite/gas/all/itbl gas/testsuite/gas/all/itbl-test.c gas/testsuite/gas/all/itbl.s gas/testsuite/gas/all/p1480.s gas/testsuite/gas/all/p2425.s gas/testsuite/gas/all/struct.d gas/testsuite/gas/all/struct.s gas/testsuite/gas/all/x930509.s gas/testsuite/gas/alpha/fp.d gas/testsuite/gas/alpha/fp.exp gas/testsuite/gas/alpha/fp.s gas/testsuite/gas/arc/alias.d gas/testsuite/gas/arc/alias.s gas/testsuite/gas/arc/arc.exp gas/testsuite/gas/arc/branch.d gas/testsuite/gas/arc/branch.s gas/testsuite/gas/arc/flag.d gas/testsuite/gas/arc/flag.s gas/testsuite/gas/arc/insn3.d gas/testsuite/gas/arc/insn3.s gas/testsuite/gas/arc/j.d gas/testsuite/gas/arc/j.s gas/testsuite/gas/arc/ld.d gas/testsuite/gas/arc/ld.s gas/testsuite/gas/arc/math.d gas/testsuite/gas/arc/math.s gas/testsuite/gas/arc/sshift.d gas/testsuite/gas/arc/sshift.s gas/testsuite/gas/arc/st.d gas/testsuite/gas/arc/st.s gas/testsuite/gas/arc/warn.exp gas/testsuite/gas/arc/warn.s gas/testsuite/gas/arm/arch4t.s gas/testsuite/gas/arm/arm.exp gas/testsuite/gas/arm/arm3.s gas/testsuite/gas/arm/arm6.s gas/testsuite/gas/arm/arm7dm.s gas/testsuite/gas/arm/arm7t.d gas/testsuite/gas/arm/arm7t.s gas/testsuite/gas/arm/copro.s gas/testsuite/gas/arm/float.s gas/testsuite/gas/arm/immed.s gas/testsuite/gas/arm/inst.d gas/testsuite/gas/arm/inst.s gas/testsuite/gas/arm/le-fpconst.d gas/testsuite/gas/arm/le-fpconst.s gas/testsuite/gas/arm/thumb.s gas/testsuite/gas/d10v/d10.exp gas/testsuite/gas/d10v/inst.d gas/testsuite/gas/d10v/inst.s gas/testsuite/gas/d30v/align.d gas/testsuite/gas/d30v/align.s gas/testsuite/gas/d30v/array.d gas/testsuite/gas/d30v/array.s gas/testsuite/gas/d30v/bittest.d gas/testsuite/gas/d30v/bittest.l gas/testsuite/gas/d30v/bittest.s gas/testsuite/gas/d30v/d30.exp gas/testsuite/gas/d30v/guard-debug.d gas/testsuite/gas/d30v/guard-debug.s gas/testsuite/gas/d30v/guard.d gas/testsuite/gas/d30v/guard.s gas/testsuite/gas/d30v/inst.d gas/testsuite/gas/d30v/inst.s gas/testsuite/gas/d30v/label-debug.d gas/testsuite/gas/d30v/label-debug.s gas/testsuite/gas/d30v/label.d gas/testsuite/gas/d30v/label.s gas/testsuite/gas/d30v/mul.d gas/testsuite/gas/d30v/mul.s gas/testsuite/gas/d30v/opt.d gas/testsuite/gas/d30v/opt.s gas/testsuite/gas/d30v/reloc.d gas/testsuite/gas/d30v/reloc.s gas/testsuite/gas/d30v/serial.l gas/testsuite/gas/d30v/serial.s gas/testsuite/gas/d30v/serial2.l gas/testsuite/gas/d30v/serial2.s gas/testsuite/gas/d30v/serial2O.l gas/testsuite/gas/d30v/serial2O.s gas/testsuite/gas/d30v/warn_oddreg.l gas/testsuite/gas/d30v/warn_oddreg.s gas/testsuite/gas/elf/elf.exp gas/testsuite/gas/elf/section0.d gas/testsuite/gas/elf/section0.s gas/testsuite/gas/elf/section1.d gas/testsuite/gas/elf/section1.s gas/testsuite/gas/fr30/allinsn.d gas/testsuite/gas/fr30/allinsn.exp gas/testsuite/gas/fr30/allinsn.s gas/testsuite/gas/fr30/fr30.exp gas/testsuite/gas/h8300/addsub.s gas/testsuite/gas/h8300/addsubh.s gas/testsuite/gas/h8300/addsubs.s gas/testsuite/gas/h8300/bitops1.s gas/testsuite/gas/h8300/bitops1h.s gas/testsuite/gas/h8300/bitops1s.s gas/testsuite/gas/h8300/bitops2.s gas/testsuite/gas/h8300/bitops2h.s gas/testsuite/gas/h8300/bitops2s.s gas/testsuite/gas/h8300/bitops3.s gas/testsuite/gas/h8300/bitops3h.s gas/testsuite/gas/h8300/bitops3s.s gas/testsuite/gas/h8300/bitops4.s gas/testsuite/gas/h8300/bitops4h.s gas/testsuite/gas/h8300/bitops4s.s gas/testsuite/gas/h8300/branch.s gas/testsuite/gas/h8300/branchh.s gas/testsuite/gas/h8300/branchs.s gas/testsuite/gas/h8300/cbranch.s gas/testsuite/gas/h8300/cbranchh.s gas/testsuite/gas/h8300/cbranchs.s gas/testsuite/gas/h8300/cmpsi2.s gas/testsuite/gas/h8300/compare.s gas/testsuite/gas/h8300/compareh.s gas/testsuite/gas/h8300/compares.s gas/testsuite/gas/h8300/decimal.s gas/testsuite/gas/h8300/decimalh.s gas/testsuite/gas/h8300/decimals.s gas/testsuite/gas/h8300/divmul.s gas/testsuite/gas/h8300/divmulh.s gas/testsuite/gas/h8300/divmuls.s gas/testsuite/gas/h8300/extendh.s gas/testsuite/gas/h8300/extends.s gas/testsuite/gas/h8300/ffxx1.d gas/testsuite/gas/h8300/ffxx1.s gas/testsuite/gas/h8300/h8300.exp gas/testsuite/gas/h8300/incdec.s gas/testsuite/gas/h8300/incdech.s gas/testsuite/gas/h8300/incdecs.s gas/testsuite/gas/h8300/logical.s gas/testsuite/gas/h8300/logicalh.s gas/testsuite/gas/h8300/logicals.s gas/testsuite/gas/h8300/macs.s gas/testsuite/gas/h8300/misc.s gas/testsuite/gas/h8300/misch.s gas/testsuite/gas/h8300/miscs.s gas/testsuite/gas/h8300/mov32bug.s gas/testsuite/gas/h8300/movb.s gas/testsuite/gas/h8300/movbh.s gas/testsuite/gas/h8300/movbs.s gas/testsuite/gas/h8300/movlh.s gas/testsuite/gas/h8300/movls.s gas/testsuite/gas/h8300/movw.s gas/testsuite/gas/h8300/movwh.s gas/testsuite/gas/h8300/movws.s gas/testsuite/gas/h8300/multiples.s gas/testsuite/gas/h8300/pushpop.s gas/testsuite/gas/h8300/pushpoph.s gas/testsuite/gas/h8300/pushpops.s gas/testsuite/gas/h8300/rotsh.s gas/testsuite/gas/h8300/rotshh.s gas/testsuite/gas/h8300/rotshs.s gas/testsuite/gas/hppa/README gas/testsuite/gas/hppa/basic/add.s gas/testsuite/gas/hppa/basic/add2.s gas/testsuite/gas/hppa/basic/addi.s gas/testsuite/gas/hppa/basic/basic.exp gas/testsuite/gas/hppa/basic/branch.s gas/testsuite/gas/hppa/basic/branch2.s gas/testsuite/gas/hppa/basic/comclr.s gas/testsuite/gas/hppa/basic/copr.s gas/testsuite/gas/hppa/basic/coprmem.s gas/testsuite/gas/hppa/basic/dcor.s gas/testsuite/gas/hppa/basic/dcor2.s gas/testsuite/gas/hppa/basic/deposit.s gas/testsuite/gas/hppa/basic/deposit2.s gas/testsuite/gas/hppa/basic/deposit3.s gas/testsuite/gas/hppa/basic/ds.s gas/testsuite/gas/hppa/basic/extract.s gas/testsuite/gas/hppa/basic/extract2.s gas/testsuite/gas/hppa/basic/extract3.s gas/testsuite/gas/hppa/basic/fmem.s gas/testsuite/gas/hppa/basic/fmemLRbug.s gas/testsuite/gas/hppa/basic/fp_comp.s gas/testsuite/gas/hppa/basic/fp_comp2.s gas/testsuite/gas/hppa/basic/fp_conv.s gas/testsuite/gas/hppa/basic/fp_fcmp.s gas/testsuite/gas/hppa/basic/fp_misc.s gas/testsuite/gas/hppa/basic/imem.s gas/testsuite/gas/hppa/basic/immed.s gas/testsuite/gas/hppa/basic/logical.s gas/testsuite/gas/hppa/basic/media.s gas/testsuite/gas/hppa/basic/perf.s gas/testsuite/gas/hppa/basic/purge.s gas/testsuite/gas/hppa/basic/purge2.s gas/testsuite/gas/hppa/basic/sh1add.s gas/testsuite/gas/hppa/basic/sh2add.s gas/testsuite/gas/hppa/basic/sh3add.s gas/testsuite/gas/hppa/basic/shift.s gas/testsuite/gas/hppa/basic/shift2.s gas/testsuite/gas/hppa/basic/shift3.s gas/testsuite/gas/hppa/basic/shladd.s gas/testsuite/gas/hppa/basic/shladd2.s gas/testsuite/gas/hppa/basic/special.s gas/testsuite/gas/hppa/basic/spop.s gas/testsuite/gas/hppa/basic/sub.s gas/testsuite/gas/hppa/basic/sub2.s gas/testsuite/gas/hppa/basic/subi.s gas/testsuite/gas/hppa/basic/system.s gas/testsuite/gas/hppa/basic/system2.s gas/testsuite/gas/hppa/basic/unit.s gas/testsuite/gas/hppa/basic/unit2.s gas/testsuite/gas/hppa/basic/weird.s gas/testsuite/gas/hppa/parse/align1.s gas/testsuite/gas/hppa/parse/align2.s gas/testsuite/gas/hppa/parse/appbug.s gas/testsuite/gas/hppa/parse/badfmpyadd.s gas/testsuite/gas/hppa/parse/block1.s gas/testsuite/gas/hppa/parse/block2.s gas/testsuite/gas/hppa/parse/calldatabug.s gas/testsuite/gas/hppa/parse/callinfobug.s gas/testsuite/gas/hppa/parse/defbug.s gas/testsuite/gas/hppa/parse/entrybug.s gas/testsuite/gas/hppa/parse/exportbug.s gas/testsuite/gas/hppa/parse/exprbug.s gas/testsuite/gas/hppa/parse/fixup7bug.s gas/testsuite/gas/hppa/parse/global.s gas/testsuite/gas/hppa/parse/labelbug.s gas/testsuite/gas/hppa/parse/linesepbug.s gas/testsuite/gas/hppa/parse/lselbug.s gas/testsuite/gas/hppa/parse/nosubspace.s gas/testsuite/gas/hppa/parse/parse.exp gas/testsuite/gas/hppa/parse/procbug.s gas/testsuite/gas/hppa/parse/regpopbug.s gas/testsuite/gas/hppa/parse/spacebug.s gas/testsuite/gas/hppa/parse/ssbug.s gas/testsuite/gas/hppa/parse/stdreg.s gas/testsuite/gas/hppa/parse/stringer.s gas/testsuite/gas/hppa/parse/undefbug.s gas/testsuite/gas/hppa/parse/versionbug.s gas/testsuite/gas/hppa/parse/xmpyubug.s gas/testsuite/gas/hppa/reloc/applybug.s gas/testsuite/gas/hppa/reloc/blebug.s gas/testsuite/gas/hppa/reloc/blebug2.s gas/testsuite/gas/hppa/reloc/blebug3.s gas/testsuite/gas/hppa/reloc/exitbug.s gas/testsuite/gas/hppa/reloc/fixupbug.s gas/testsuite/gas/hppa/reloc/funcrelocbug.s gas/testsuite/gas/hppa/reloc/labelopbug.s gas/testsuite/gas/hppa/reloc/longcall.s gas/testsuite/gas/hppa/reloc/picreloc.s gas/testsuite/gas/hppa/reloc/plabelbug.s gas/testsuite/gas/hppa/reloc/r_no_reloc.s gas/testsuite/gas/hppa/reloc/reduce.s gas/testsuite/gas/hppa/reloc/reduce2.s gas/testsuite/gas/hppa/reloc/reduce3.s gas/testsuite/gas/hppa/reloc/reloc.exp gas/testsuite/gas/hppa/reloc/roundmode.s gas/testsuite/gas/hppa/reloc/selectorbug.s gas/testsuite/gas/hppa/unsorted/align3.s gas/testsuite/gas/hppa/unsorted/align4.s gas/testsuite/gas/hppa/unsorted/brlenbug.s gas/testsuite/gas/hppa/unsorted/common.s gas/testsuite/gas/hppa/unsorted/fragbug.s gas/testsuite/gas/hppa/unsorted/globalbug.s gas/testsuite/gas/hppa/unsorted/importbug.s gas/testsuite/gas/hppa/unsorted/labeldiffs.s gas/testsuite/gas/hppa/unsorted/locallabel.s gas/testsuite/gas/hppa/unsorted/ss_align.s gas/testsuite/gas/hppa/unsorted/unsorted.exp gas/testsuite/gas/i386/amd.d gas/testsuite/gas/i386/amd.s gas/testsuite/gas/i386/float.l gas/testsuite/gas/i386/float.s gas/testsuite/gas/i386/general.l gas/testsuite/gas/i386/general.s gas/testsuite/gas/i386/i386.exp gas/testsuite/gas/i386/inval.l gas/testsuite/gas/i386/inval.s gas/testsuite/gas/i386/katmai.d gas/testsuite/gas/i386/katmai.s gas/testsuite/gas/i386/modrm.l gas/testsuite/gas/i386/modrm.s gas/testsuite/gas/i386/naked.d gas/testsuite/gas/i386/naked.s gas/testsuite/gas/i386/opcode.d gas/testsuite/gas/i386/opcode.s gas/testsuite/gas/i386/prefix.d gas/testsuite/gas/i386/prefix.s gas/testsuite/gas/i386/reloc.d gas/testsuite/gas/i386/reloc.s gas/testsuite/gas/i386/white.l gas/testsuite/gas/i386/white.s gas/testsuite/gas/ieee-fp/x930509a.exp gas/testsuite/gas/ieee-fp/x930509a.s gas/testsuite/gas/m32r/allinsn.d gas/testsuite/gas/m32r/allinsn.exp gas/testsuite/gas/m32r/allinsn.s gas/testsuite/gas/m32r/error.exp gas/testsuite/gas/m32r/fslot.d gas/testsuite/gas/m32r/fslot.s gas/testsuite/gas/m32r/fslotx.d gas/testsuite/gas/m32r/fslotx.s gas/testsuite/gas/m32r/high-1.d gas/testsuite/gas/m32r/high-1.s gas/testsuite/gas/m32r/interfere.s gas/testsuite/gas/m32r/m32r.exp gas/testsuite/gas/m32r/m32rx.d gas/testsuite/gas/m32r/m32rx.exp gas/testsuite/gas/m32r/m32rx.s gas/testsuite/gas/m32r/outofrange.s gas/testsuite/gas/m32r/relax-1.d gas/testsuite/gas/m32r/relax-1.s gas/testsuite/gas/m32r/relax-2.d gas/testsuite/gas/m32r/relax-2.s gas/testsuite/gas/m32r/uppercase.d gas/testsuite/gas/m32r/uppercase.s gas/testsuite/gas/m32r/wrongsize.s gas/testsuite/gas/m68k-coff/gas.exp gas/testsuite/gas/m68k-coff/p2389.s gas/testsuite/gas/m68k-coff/p2389a.s gas/testsuite/gas/m68k-coff/p2430.s gas/testsuite/gas/m68k-coff/p2430a.s gas/testsuite/gas/m68k-coff/t1.s gas/testsuite/gas/m68k/all.exp gas/testsuite/gas/m68k/bitfield.d gas/testsuite/gas/m68k/bitfield.s gas/testsuite/gas/m68k/cas.d gas/testsuite/gas/m68k/cas.s gas/testsuite/gas/m68k/disperr.s gas/testsuite/gas/m68k/fmoveml.d gas/testsuite/gas/m68k/fmoveml.s gas/testsuite/gas/m68k/link.d gas/testsuite/gas/m68k/link.s gas/testsuite/gas/m68k/op68000.d gas/testsuite/gas/m68k/operands.d gas/testsuite/gas/m68k/operands.s gas/testsuite/gas/m68k/p2410.s gas/testsuite/gas/m68k/p2663.s gas/testsuite/gas/m68k/pcrel.d gas/testsuite/gas/m68k/pcrel.s gas/testsuite/gas/m68k/pic1.s gas/testsuite/gas/m68k/t2.d gas/testsuite/gas/m68k/t2.s gas/testsuite/gas/m88k/init.d gas/testsuite/gas/m88k/init.s gas/testsuite/gas/m88k/m88k.exp gas/testsuite/gas/macros/err.s gas/testsuite/gas/macros/irp.d gas/testsuite/gas/macros/irp.s gas/testsuite/gas/macros/macros.exp gas/testsuite/gas/macros/rept.d gas/testsuite/gas/macros/rept.s gas/testsuite/gas/macros/semi.d gas/testsuite/gas/macros/semi.s gas/testsuite/gas/macros/test1.d gas/testsuite/gas/macros/test1.s gas/testsuite/gas/macros/test2.d gas/testsuite/gas/macros/test2.s gas/testsuite/gas/macros/test3.d gas/testsuite/gas/macros/test3.s gas/testsuite/gas/mcore/allinsn.d gas/testsuite/gas/mcore/allinsn.exp gas/testsuite/gas/mcore/allinsn.s gas/testsuite/gas/mips/abs.d gas/testsuite/gas/mips/abs.s gas/testsuite/gas/mips/add.d gas/testsuite/gas/mips/add.s gas/testsuite/gas/mips/and.d gas/testsuite/gas/mips/and.s gas/testsuite/gas/mips/beq.d gas/testsuite/gas/mips/beq.s gas/testsuite/gas/mips/bge.d gas/testsuite/gas/mips/bge.s gas/testsuite/gas/mips/bgeu.d gas/testsuite/gas/mips/bgeu.s gas/testsuite/gas/mips/blt.d gas/testsuite/gas/mips/blt.s gas/testsuite/gas/mips/bltu.d gas/testsuite/gas/mips/bltu.s gas/testsuite/gas/mips/break20.d gas/testsuite/gas/mips/break20.s gas/testsuite/gas/mips/delay.d gas/testsuite/gas/mips/delay.s gas/testsuite/gas/mips/div-ilocks.d gas/testsuite/gas/mips/div.d gas/testsuite/gas/mips/div.s gas/testsuite/gas/mips/dli.d gas/testsuite/gas/mips/dli.s gas/testsuite/gas/mips/e32-rel2.d gas/testsuite/gas/mips/elf-rel.d gas/testsuite/gas/mips/elf-rel.s gas/testsuite/gas/mips/elf-rel2.d gas/testsuite/gas/mips/elf-rel2.s gas/testsuite/gas/mips/elf_e_flags.c gas/testsuite/gas/mips/elf_e_flags.s gas/testsuite/gas/mips/elf_e_flags1.d gas/testsuite/gas/mips/elf_e_flags2.d gas/testsuite/gas/mips/elf_e_flags3.d gas/testsuite/gas/mips/elf_e_flags4.d gas/testsuite/gas/mips/itbl gas/testsuite/gas/mips/itbl.s gas/testsuite/gas/mips/jal-empic.d gas/testsuite/gas/mips/jal-svr4pic.d gas/testsuite/gas/mips/jal-svr4pic.s gas/testsuite/gas/mips/jal-xgot.d gas/testsuite/gas/mips/jal.d gas/testsuite/gas/mips/jal.s gas/testsuite/gas/mips/la-empic.d gas/testsuite/gas/mips/la-empic.s gas/testsuite/gas/mips/la-svr4pic.d gas/testsuite/gas/mips/la-xgot.d gas/testsuite/gas/mips/la.d gas/testsuite/gas/mips/la.s gas/testsuite/gas/mips/lb-empic.d gas/testsuite/gas/mips/lb-pic.s gas/testsuite/gas/mips/lb-svr4pic.d gas/testsuite/gas/mips/lb-xgot-ilocks.d gas/testsuite/gas/mips/lb-xgot.d gas/testsuite/gas/mips/lb.d gas/testsuite/gas/mips/lb.s gas/testsuite/gas/mips/ld-empic.d gas/testsuite/gas/mips/ld-ilocks-addr32.d gas/testsuite/gas/mips/ld-ilocks.d gas/testsuite/gas/mips/ld-pic.s gas/testsuite/gas/mips/ld-svr4pic.d gas/testsuite/gas/mips/ld-xgot.d gas/testsuite/gas/mips/ld.d gas/testsuite/gas/mips/ld.s gas/testsuite/gas/mips/li.d gas/testsuite/gas/mips/li.s gas/testsuite/gas/mips/lif-empic.d gas/testsuite/gas/mips/lif-svr4pic.d gas/testsuite/gas/mips/lif-xgot.d gas/testsuite/gas/mips/lifloat.d gas/testsuite/gas/mips/lifloat.s gas/testsuite/gas/mips/lineno.d gas/testsuite/gas/mips/lineno.s gas/testsuite/gas/mips/mips.exp gas/testsuite/gas/mips/mips16.d gas/testsuite/gas/mips/mips16.s gas/testsuite/gas/mips/mips4.d gas/testsuite/gas/mips/mips4.s gas/testsuite/gas/mips/mips4010.d gas/testsuite/gas/mips/mips4010.s gas/testsuite/gas/mips/mips4100.d gas/testsuite/gas/mips/mips4100.s gas/testsuite/gas/mips/mips4650.d gas/testsuite/gas/mips/mips4650.s gas/testsuite/gas/mips/mul-ilocks.d gas/testsuite/gas/mips/mul.d gas/testsuite/gas/mips/mul.s gas/testsuite/gas/mips/nodelay.d gas/testsuite/gas/mips/rol.d gas/testsuite/gas/mips/rol.s gas/testsuite/gas/mips/sb.d gas/testsuite/gas/mips/sb.s gas/testsuite/gas/mips/sync.d gas/testsuite/gas/mips/sync.s gas/testsuite/gas/mips/trap20.d gas/testsuite/gas/mips/trap20.s gas/testsuite/gas/mips/trunc.d gas/testsuite/gas/mips/trunc.s gas/testsuite/gas/mips/uld.d gas/testsuite/gas/mips/uld.s gas/testsuite/gas/mips/ulh-empic.d gas/testsuite/gas/mips/ulh-pic.s gas/testsuite/gas/mips/ulh-svr4pic.d gas/testsuite/gas/mips/ulh-xgot.d gas/testsuite/gas/mips/ulh.d gas/testsuite/gas/mips/ulh.s gas/testsuite/gas/mips/ulw.d gas/testsuite/gas/mips/ulw.s gas/testsuite/gas/mips/usd.d gas/testsuite/gas/mips/usd.s gas/testsuite/gas/mips/ush.d gas/testsuite/gas/mips/ush.s gas/testsuite/gas/mips/usw.d gas/testsuite/gas/mips/usw.s gas/testsuite/gas/mn10200/add.s gas/testsuite/gas/mn10200/basic.exp gas/testsuite/gas/mn10200/bcc.s gas/testsuite/gas/mn10200/bccx.s gas/testsuite/gas/mn10200/bit.s gas/testsuite/gas/mn10200/cmp.s gas/testsuite/gas/mn10200/ext.s gas/testsuite/gas/mn10200/logical.s gas/testsuite/gas/mn10200/mov1.s gas/testsuite/gas/mn10200/mov2.s gas/testsuite/gas/mn10200/mov3.s gas/testsuite/gas/mn10200/mov4.s gas/testsuite/gas/mn10200/movb.s gas/testsuite/gas/mn10200/movbu.s gas/testsuite/gas/mn10200/movx.s gas/testsuite/gas/mn10200/muldiv.s gas/testsuite/gas/mn10200/other.s gas/testsuite/gas/mn10200/shift.s gas/testsuite/gas/mn10200/sub.s gas/testsuite/gas/mn10300/add.s gas/testsuite/gas/mn10300/am33.s gas/testsuite/gas/mn10300/am33_2.s gas/testsuite/gas/mn10300/am33_3.s gas/testsuite/gas/mn10300/am33_4.s gas/testsuite/gas/mn10300/am33_5.s gas/testsuite/gas/mn10300/am33_6.s gas/testsuite/gas/mn10300/am33_7.s gas/testsuite/gas/mn10300/am33_8.s gas/testsuite/gas/mn10300/basic.exp gas/testsuite/gas/mn10300/bcc.s gas/testsuite/gas/mn10300/bit.s gas/testsuite/gas/mn10300/cmp.s gas/testsuite/gas/mn10300/ext.s gas/testsuite/gas/mn10300/extend.s gas/testsuite/gas/mn10300/logical.s gas/testsuite/gas/mn10300/loop.s gas/testsuite/gas/mn10300/mov1.s gas/testsuite/gas/mn10300/mov2.s gas/testsuite/gas/mn10300/mov3.s gas/testsuite/gas/mn10300/mov4.s gas/testsuite/gas/mn10300/movbu.s gas/testsuite/gas/mn10300/movhu.s gas/testsuite/gas/mn10300/movm.s gas/testsuite/gas/mn10300/muldiv.s gas/testsuite/gas/mn10300/other.s gas/testsuite/gas/mn10300/shift.s gas/testsuite/gas/mn10300/sub.s gas/testsuite/gas/mn10300/udf.s gas/testsuite/gas/mri/char.d gas/testsuite/gas/mri/char.s gas/testsuite/gas/mri/comment.d gas/testsuite/gas/mri/comment.s gas/testsuite/gas/mri/common.d gas/testsuite/gas/mri/common.s gas/testsuite/gas/mri/constants.d gas/testsuite/gas/mri/constants.s gas/testsuite/gas/mri/empty.s gas/testsuite/gas/mri/equ.d gas/testsuite/gas/mri/equ.s gas/testsuite/gas/mri/expr.d gas/testsuite/gas/mri/expr.s gas/testsuite/gas/mri/float.d gas/testsuite/gas/mri/float.s gas/testsuite/gas/mri/for.d gas/testsuite/gas/mri/for.s gas/testsuite/gas/mri/if.d gas/testsuite/gas/mri/if.s gas/testsuite/gas/mri/immconst.d gas/testsuite/gas/mri/label.d gas/testsuite/gas/mri/label.s gas/testsuite/gas/mri/moveml.d gas/testsuite/gas/mri/moveml.s gas/testsuite/gas/mri/mri.exp gas/testsuite/gas/mri/repeat.d gas/testsuite/gas/mri/repeat.s gas/testsuite/gas/mri/semi.d gas/testsuite/gas/mri/semi.s gas/testsuite/gas/mri/while.d gas/testsuite/gas/mri/while.s gas/testsuite/gas/pj/ops.d gas/testsuite/gas/pj/ops.s gas/testsuite/gas/pj/pj.exp gas/testsuite/gas/ppc/astest.d gas/testsuite/gas/ppc/astest.s gas/testsuite/gas/ppc/astest2.d gas/testsuite/gas/ppc/astest2.s gas/testsuite/gas/ppc/ppc.exp gas/testsuite/gas/ppc/simpshft.d gas/testsuite/gas/ppc/simpshft.s gas/testsuite/gas/sh/basic.exp gas/testsuite/gas/sh/fp.s gas/testsuite/gas/sparc-solaris/addend.exp gas/testsuite/gas/sparc-solaris/addend.s gas/testsuite/gas/sparc-solaris/gas.exp gas/testsuite/gas/sparc-solaris/sol-cc.s gas/testsuite/gas/sparc-solaris/sol-gcc.s gas/testsuite/gas/sparc/asi.d gas/testsuite/gas/sparc/asi.s gas/testsuite/gas/sparc/membar.d gas/testsuite/gas/sparc/membar.s gas/testsuite/gas/sparc/mism-1.s gas/testsuite/gas/sparc/mismatch.exp gas/testsuite/gas/sparc/prefetch.d gas/testsuite/gas/sparc/prefetch.s gas/testsuite/gas/sparc/rdpr.d gas/testsuite/gas/sparc/rdpr.s gas/testsuite/gas/sparc/reloc64.d gas/testsuite/gas/sparc/reloc64.s gas/testsuite/gas/sparc/set64.d gas/testsuite/gas/sparc/set64.s gas/testsuite/gas/sparc/sparc.exp gas/testsuite/gas/sparc/splet-2.d gas/testsuite/gas/sparc/splet-2.s gas/testsuite/gas/sparc/splet.d gas/testsuite/gas/sparc/splet.s gas/testsuite/gas/sparc/synth.d gas/testsuite/gas/sparc/synth.s gas/testsuite/gas/sparc/synth64.d gas/testsuite/gas/sparc/synth64.s gas/testsuite/gas/sparc/wrpr.d gas/testsuite/gas/sparc/wrpr.s gas/testsuite/gas/sun4/addend.d gas/testsuite/gas/sun4/addend.exp gas/testsuite/gas/sun4/addend.s gas/testsuite/gas/template gas/testsuite/gas/tic80/add.d gas/testsuite/gas/tic80/add.lst gas/testsuite/gas/tic80/add.s gas/testsuite/gas/tic80/align.d gas/testsuite/gas/tic80/align.lst gas/testsuite/gas/tic80/align.s gas/testsuite/gas/tic80/bitnum.d gas/testsuite/gas/tic80/bitnum.lst gas/testsuite/gas/tic80/bitnum.s gas/testsuite/gas/tic80/ccode.d gas/testsuite/gas/tic80/ccode.lst gas/testsuite/gas/tic80/ccode.s gas/testsuite/gas/tic80/cregops.d gas/testsuite/gas/tic80/cregops.lst gas/testsuite/gas/tic80/cregops.s gas/testsuite/gas/tic80/endmask.d gas/testsuite/gas/tic80/endmask.lst gas/testsuite/gas/tic80/endmask.s gas/testsuite/gas/tic80/float.d gas/testsuite/gas/tic80/float.lst gas/testsuite/gas/tic80/float.s gas/testsuite/gas/tic80/regops.d gas/testsuite/gas/tic80/regops.lst gas/testsuite/gas/tic80/regops.s gas/testsuite/gas/tic80/regops2.d gas/testsuite/gas/tic80/regops2.lst gas/testsuite/gas/tic80/regops2.s gas/testsuite/gas/tic80/regops3.d gas/testsuite/gas/tic80/regops3.lst gas/testsuite/gas/tic80/regops3.s gas/testsuite/gas/tic80/regops4.d gas/testsuite/gas/tic80/regops4.lst gas/testsuite/gas/tic80/regops4.s gas/testsuite/gas/tic80/relocs1.c gas/testsuite/gas/tic80/relocs1.d gas/testsuite/gas/tic80/relocs1.lst gas/testsuite/gas/tic80/relocs1.s gas/testsuite/gas/tic80/relocs1b.d gas/testsuite/gas/tic80/relocs2.c gas/testsuite/gas/tic80/relocs2.d gas/testsuite/gas/tic80/relocs2.lst gas/testsuite/gas/tic80/relocs2.s gas/testsuite/gas/tic80/relocs2b.d gas/testsuite/gas/tic80/tic80.exp gas/testsuite/gas/v850/arith.s gas/testsuite/gas/v850/basic.exp gas/testsuite/gas/v850/bit.s gas/testsuite/gas/v850/branch.s gas/testsuite/gas/v850/compare.s gas/testsuite/gas/v850/fepsw.s gas/testsuite/gas/v850/hilo.s gas/testsuite/gas/v850/hilo2.s gas/testsuite/gas/v850/jumps.s gas/testsuite/gas/v850/logical.s gas/testsuite/gas/v850/mem.s gas/testsuite/gas/v850/misc.s gas/testsuite/gas/v850/move.s gas/testsuite/gas/v850/range.s gas/testsuite/gas/v850/reloc.s gas/testsuite/gas/vax/quad.exp gas/testsuite/gas/vax/quad.s gas/testsuite/gas/vtable/entry0.d gas/testsuite/gas/vtable/entry0.s gas/testsuite/gas/vtable/entry1.d gas/testsuite/gas/vtable/entry1.s gas/testsuite/gas/vtable/inherit0.d gas/testsuite/gas/vtable/inherit0.s gas/testsuite/gas/vtable/inherit1.l gas/testsuite/gas/vtable/inherit1.s gas/testsuite/gas/vtable/vtable.exp gas/testsuite/gasp/INC1.H gas/testsuite/gasp/INC2.H gas/testsuite/gasp/assign.asm gas/testsuite/gasp/assign.err gas/testsuite/gasp/assign.out gas/testsuite/gasp/condass.asm gas/testsuite/gasp/condass.err gas/testsuite/gasp/condass.out gas/testsuite/gasp/crash.asm gas/testsuite/gasp/crash.err gas/testsuite/gasp/crash.out gas/testsuite/gasp/crash1.asm gas/testsuite/gasp/crash1.err gas/testsuite/gasp/crash1.out gas/testsuite/gasp/crash2.asm gas/testsuite/gasp/crash2.err gas/testsuite/gasp/crash2.out gas/testsuite/gasp/data.asm gas/testsuite/gasp/data.err gas/testsuite/gasp/data.out gas/testsuite/gasp/exp.asm gas/testsuite/gasp/exp.err gas/testsuite/gasp/exp.out gas/testsuite/gasp/gasp.exp gas/testsuite/gasp/include.asm gas/testsuite/gasp/include.err gas/testsuite/gasp/include.out gas/testsuite/gasp/listing.asm gas/testsuite/gasp/listing.err gas/testsuite/gasp/listing.out gas/testsuite/gasp/macro.asm gas/testsuite/gasp/macro.err gas/testsuite/gasp/macro.out gas/testsuite/gasp/mdouble.asm gas/testsuite/gasp/mdouble.err gas/testsuite/gasp/mdouble.out gas/testsuite/gasp/mri/embed.asm gas/testsuite/gasp/mri/embed.out gas/testsuite/gasp/mri/exists.asm gas/testsuite/gasp/mri/exists.out gas/testsuite/gasp/mri/irp.asm gas/testsuite/gasp/mri/irp.out gas/testsuite/gasp/mri/irpc.asm gas/testsuite/gasp/mri/irpc.out gas/testsuite/gasp/mri/macro.asm gas/testsuite/gasp/mri/macro.out gas/testsuite/gasp/mri/narg.asm gas/testsuite/gasp/mri/narg.out gas/testsuite/gasp/mri/rept.asm gas/testsuite/gasp/mri/rept.out gas/testsuite/gasp/pl1.asm gas/testsuite/gasp/pl1.err gas/testsuite/gasp/pl1.out gas/testsuite/gasp/pl2.asm gas/testsuite/gasp/pl2.err gas/testsuite/gasp/pl2.out gas/testsuite/gasp/pl3.asm gas/testsuite/gasp/pl3.err gas/testsuite/gasp/pl3.out gas/testsuite/gasp/pl4.asm gas/testsuite/gasp/pl4.err gas/testsuite/gasp/pl4.out gas/testsuite/gasp/pl5.asm gas/testsuite/gasp/pl5.err gas/testsuite/gasp/pl5.out gas/testsuite/gasp/pl6.asm gas/testsuite/gasp/pl6.err gas/testsuite/gasp/pl6.out gas/testsuite/gasp/pl7.asm gas/testsuite/gasp/pl7.err gas/testsuite/gasp/pl7.out gas/testsuite/gasp/pl8.asm gas/testsuite/gasp/pl8.err gas/testsuite/gasp/pl8.out gas/testsuite/gasp/pr7583.asm gas/testsuite/gasp/pr7583.err gas/testsuite/gasp/pr7583.out gas/testsuite/gasp/reg.asm gas/testsuite/gasp/reg.err gas/testsuite/gasp/reg.out gas/testsuite/gasp/rep.asm gas/testsuite/gasp/rep.err gas/testsuite/gasp/rep.out gas/testsuite/gasp/repeat.asm gas/testsuite/gasp/repeat.err gas/testsuite/gasp/repeat.out gas/testsuite/gasp/reperr.asm gas/testsuite/gasp/reperr.err gas/testsuite/gasp/reperr.out gas/testsuite/gasp/reperr1.asm gas/testsuite/gasp/reperr1.err gas/testsuite/gasp/reperr1.out gas/testsuite/gasp/reperr2.asm gas/testsuite/gasp/reperr2.err gas/testsuite/gasp/reperr2.out gas/testsuite/gasp/reperr3.asm gas/testsuite/gasp/reperr3.err gas/testsuite/gasp/reperr3.out gas/testsuite/gasp/sdata.asm gas/testsuite/gasp/sdata.err gas/testsuite/gasp/sdata.out gas/testsuite/gasp/sfunc.asm gas/testsuite/gasp/sfunc.err gas/testsuite/gasp/sfunc.out gas/testsuite/gasp/t1.asm gas/testsuite/gasp/t1.err gas/testsuite/gasp/t1.out gas/testsuite/gasp/t2.asm gas/testsuite/gasp/t2.err gas/testsuite/gasp/t2.out gas/testsuite/gasp/t3.asm gas/testsuite/gasp/t3.err gas/testsuite/gasp/t3.out gas/testsuite/gasp/while.asm gas/testsuite/gasp/while.err gas/testsuite/gasp/while.out gas/testsuite/lib/doboth gas/testsuite/lib/doobjcmp gas/testsuite/lib/dostriptest gas/testsuite/lib/dotest gas/testsuite/lib/dounsreloc gas/testsuite/lib/dounssym gas/testsuite/lib/gas-defs.exp gas/testsuite/lib/gas-dg.exp gas/testsuite/lib/run gas/vmsconf.sh gas/write.c gas/write.h gdb/config/i386/windows.mh gdb/doc/GDBvn.texi gdb/doc/remote.texi gdb/testsuite/gdb.base/README gdb/testsuite/gdb.base/annota2.cc gdb/testsuite/gdb.base/annota2.exp gdb/testsuite/gdb.base/crossload.exp gdb/testsuite/gdb.base/i486-elf.u gdb/testsuite/gdb.base/i860-elf.u gdb/testsuite/gdb.base/m68k-aout.u gdb/testsuite/gdb.base/m68k-aout2.u gdb/testsuite/gdb.base/m68k-elf.u gdb/testsuite/gdb.base/mips-ecoff.u gdb/testsuite/gdb.base/sparc-aout.u gdb/testsuite/gdb.base/sparc-elf.u gdb/tui/Makefile gdb/windows-nat.c gprof/.gdbinit gprof/ChangeLog gprof/Makefile.am gprof/Makefile.in gprof/NOTES gprof/TEST gprof/TODO gprof/aclocal.m4 gprof/alpha.c gprof/basic_blocks.c gprof/basic_blocks.h gprof/bb_exit_func.c gprof/bbconv.pl gprof/bsd_callg_bl.m gprof/call_graph.c gprof/call_graph.h gprof/cg_arcs.c gprof/cg_arcs.h gprof/cg_dfn.c gprof/cg_dfn.h gprof/cg_print.c gprof/cg_print.h gprof/configure gprof/configure.in gprof/corefile.c gprof/corefile.h gprof/flat_bl.m gprof/fsf_callg_bl.m gprof/gconfig.in gprof/gen-c-prog.awk gprof/gmon.h gprof/gmon_io.c gprof/gmon_io.h gprof/gmon_out.h gprof/gprof.1 gprof/gprof.c gprof/gprof.h gprof/gprof.texi gprof/hertz.c gprof/hertz.h gprof/hist.c gprof/hist.h gprof/i386.c gprof/po/Make-in gprof/po/POTFILES.in gprof/po/gprof.pot gprof/search_list.c gprof/search_list.h gprof/source.c gprof/source.h gprof/sparc.c gprof/stamp-h.in gprof/sym_ids.c gprof/sym_ids.h gprof/symtab.c gprof/symtab.h gprof/tahoe.c gprof/utils.c gprof/utils.h gprof/vax.c include/COPYING include/ChangeLog include/ansidecl.h include/aout/ChangeLog include/aout/adobe.h include/aout/aout64.h include/aout/ar.h include/aout/dynix3.h include/aout/encap.h include/aout/host.h include/aout/hp.h include/aout/hp300hpux.h include/aout/hppa.h include/aout/ranlib.h include/aout/reloc.h include/aout/stab.def include/aout/stab_gnu.h include/aout/sun4.h include/bfdlink.h include/bout.h include/callback.h include/coff/ChangeLog include/coff/a29k.h include/coff/alpha.h include/coff/apollo.h include/coff/arm.h include/coff/aux-coff.h include/coff/ecoff.h include/coff/go32exe.h include/coff/h8300.h include/coff/h8500.h include/coff/i386.h include/coff/i860.h include/coff/i960.h include/coff/internal.h include/coff/m68k.h include/coff/m88k.h include/coff/mcore.h include/coff/mips.h include/coff/pe.h include/coff/powerpc.h include/coff/rs6000.h include/coff/sh.h include/coff/sparc.h include/coff/sym.h include/coff/symconst.h include/coff/tic30.h include/coff/tic80.h include/coff/w65.h include/coff/we32k.h include/coff/z8k.h include/demangle.h include/dis-asm.h include/elf/ChangeLog include/elf/alpha.h include/elf/arc.h include/elf/arm-oabi.h include/elf/arm.h include/elf/common.h include/elf/d10v.h include/elf/d30v.h include/elf/dwarf.h include/elf/dwarf2.h include/elf/external.h include/elf/fr30.h include/elf/hppa.h include/elf/i386.h include/elf/i960.h include/elf/internal.h include/elf/m32r.h include/elf/m68k.h include/elf/mcore.h include/elf/mips.h include/elf/mn10200.h include/elf/mn10300.h include/elf/pj.h include/elf/ppc.h include/elf/reloc-macros.h include/elf/sh.h include/elf/sparc.h include/elf/v850.h include/floatformat.h include/fnmatch.h include/fopen-bin.h include/fopen-same.h include/fopen-vms.h include/gdbm.h include/getopt.h include/hp-symtab.h include/ieee.h include/libiberty.h include/mpw/ChangeLog include/mpw/README include/mpw/dir.h include/mpw/dirent.h include/mpw/fcntl.h include/mpw/grp.h include/mpw/mpw.h include/mpw/pwd.h include/mpw/spin.h include/mpw/stat.h include/mpw/sys/file.h include/mpw/sys/param.h include/mpw/sys/resource.h include/mpw/sys/stat.h include/mpw/sys/time.h include/mpw/sys/types.h include/mpw/utime.h include/mpw/varargs.h include/nlm/ChangeLog include/nlm/alpha-ext.h include/nlm/common.h include/nlm/external.h include/nlm/i386-ext.h include/nlm/internal.h include/nlm/ppc-ext.h include/nlm/sparc32-ext.h include/oasys.h include/objalloc.h include/obstack.h include/opcode/ChangeLog include/opcode/a29k.h include/opcode/alpha.h include/opcode/arc.h include/opcode/arm.h include/opcode/cgen.h include/opcode/convex.h include/opcode/d10v.h include/opcode/d30v.h include/opcode/h8300.h include/opcode/hppa.h include/opcode/i386.h include/opcode/i860.h include/opcode/i960.h include/opcode/m68k.h include/opcode/m88k.h include/opcode/mips.h include/opcode/mn10200.h include/opcode/mn10300.h include/opcode/np1.h include/opcode/ns32k.h include/opcode/pj.h include/opcode/pn.h include/opcode/ppc.h include/opcode/pyr.h include/opcode/sparc.h include/opcode/tahoe.h include/opcode/tic30.h include/opcode/tic80.h include/opcode/v850.h include/opcode/vax.h include/os9k.h include/progress.h include/regs/ChangeLog include/remote-sim.h include/sim-d10v.h include/splay-tree.h include/symcat.h include/wait.h install-sh intl/ChangeLog intl/Makefile.in intl/acconfig.h intl/aclocal.m4 intl/bindtextdom.c intl/cat-compat.c intl/config.in intl/configure intl/configure.in intl/dcgettext.c intl/dgettext.c intl/explodename.c intl/finddomain.c intl/gettext.c intl/gettext.h intl/gettextP.h intl/hash-string.h intl/intl-compat.c intl/intlh.inst.in intl/l10nflist.c intl/libgettext.h intl/libintl.glibc intl/linux-msg.sed intl/loadinfo.h intl/loadmsgcat.c intl/localealias.c intl/po2tbl.sed.in intl/textdomain.c intl/xopen-msg.sed ld/ChangeLog ld/Makefile.am ld/Makefile.in ld/NEWS ld/README ld/TODO ld/acinclude.m4 ld/aclocal.m4 ld/config.in ld/configure ld/configure.host ld/configure.in ld/configure.tgt ld/deffile.h ld/deffilep.y ld/dep-in.sed ld/emulparams/README ld/emulparams/a29k.sh ld/emulparams/aixppc.sh ld/emulparams/aixrs6.sh ld/emulparams/alpha.sh ld/emulparams/arcelf.sh ld/emulparams/arm_epoc_pe.sh ld/emulparams/armaoutb.sh ld/emulparams/armaoutl.sh ld/emulparams/armcoff.sh ld/emulparams/armelf.sh ld/emulparams/armelf_linux.sh ld/emulparams/armelf_linux26.sh ld/emulparams/armelf_oabi.sh ld/emulparams/armnbsd.sh ld/emulparams/armpe.sh ld/emulparams/coff_sparc.sh ld/emulparams/d10velf.sh ld/emulparams/d30v_e.sh ld/emulparams/d30v_o.sh ld/emulparams/d30velf.sh ld/emulparams/delta68.sh ld/emulparams/ebmon29k.sh ld/emulparams/elf32_i960.sh ld/emulparams/elf32_sparc.sh ld/emulparams/elf32b4300.sh ld/emulparams/elf32bmip.sh ld/emulparams/elf32bmipn32.sh ld/emulparams/elf32bsmip.sh ld/emulparams/elf32ebmip.sh ld/emulparams/elf32elmip.sh ld/emulparams/elf32fr30.sh ld/emulparams/elf32l4300.sh ld/emulparams/elf32lmip.sh ld/emulparams/elf32lppc.sh ld/emulparams/elf32lsmip.sh ld/emulparams/elf32mcore.sh ld/emulparams/elf32ppc.sh ld/emulparams/elf32ppclinux.sh ld/emulparams/elf64_sparc.sh ld/emulparams/elf64alpha.sh ld/emulparams/elf64bmip.sh ld/emulparams/elf64hppa.sh ld/emulparams/elf_i386.sh ld/emulparams/elf_i386_be.sh ld/emulparams/gld960.sh ld/emulparams/gld960coff.sh ld/emulparams/h8300.sh ld/emulparams/h8300h.sh ld/emulparams/h8300s.sh ld/emulparams/h8500.sh ld/emulparams/h8500b.sh ld/emulparams/h8500c.sh ld/emulparams/h8500m.sh ld/emulparams/h8500s.sh ld/emulparams/hp300bsd.sh ld/emulparams/hp3hpux.sh ld/emulparams/hppaelf.sh ld/emulparams/i386aout.sh ld/emulparams/i386beos.sh ld/emulparams/i386bsd.sh ld/emulparams/i386coff.sh ld/emulparams/i386go32.sh ld/emulparams/i386linux.sh ld/emulparams/i386lynx.sh ld/emulparams/i386mach.sh ld/emulparams/i386moss.sh ld/emulparams/i386msdos.sh ld/emulparams/i386nbsd.sh ld/emulparams/i386nw.sh ld/emulparams/i386pe.sh ld/emulparams/i386pe_posix.sh ld/emulparams/lnk960.sh ld/emulparams/m32relf.sh ld/emulparams/m68k4knbsd.sh ld/emulparams/m68kaout.sh ld/emulparams/m68kaux.sh ld/emulparams/m68kcoff.sh ld/emulparams/m68kelf.sh ld/emulparams/m68klinux.sh ld/emulparams/m68klynx.sh ld/emulparams/m68knbsd.sh ld/emulparams/m68kpsos.sh ld/emulparams/m88kbcs.sh ld/emulparams/mcorepe.sh ld/emulparams/mipsbig.sh ld/emulparams/mipsbsd.sh ld/emulparams/mipsidt.sh ld/emulparams/mipsidtl.sh ld/emulparams/mipslit.sh ld/emulparams/mipslnews.sh ld/emulparams/mn10200.sh ld/emulparams/mn10300.sh ld/emulparams/news.sh ld/emulparams/ns32knbsd.sh ld/emulparams/pc532macha.sh ld/emulparams/pjelf.sh ld/emulparams/pjlelf.sh ld/emulparams/ppcmacos.sh ld/emulparams/ppcnw.sh ld/emulparams/ppcpe.sh ld/emulparams/riscix.sh ld/emulparams/sa29200.sh ld/emulparams/sh.sh ld/emulparams/shelf.sh ld/emulparams/shl.sh ld/emulparams/shlelf.sh ld/emulparams/sparcaout.sh ld/emulparams/sparclinux.sh ld/emulparams/sparclynx.sh ld/emulparams/sparcnbsd.sh ld/emulparams/st2000.sh ld/emulparams/sun3.sh ld/emulparams/sun4.sh ld/emulparams/tic30aout.sh ld/emulparams/tic30coff.sh ld/emulparams/tic80coff.sh ld/emulparams/v850.sh ld/emulparams/vanilla.sh ld/emulparams/vax.sh ld/emulparams/vsta.sh ld/emulparams/w65.sh ld/emulparams/z8001.sh ld/emulparams/z8002.sh ld/emultempl/README ld/emultempl/aix.em ld/emultempl/armcoff.em ld/emultempl/armelf.em ld/emultempl/armelf_oabi.em ld/emultempl/astring.sed ld/emultempl/beos.em ld/emultempl/elf32.em ld/emultempl/generic.em ld/emultempl/gld960.em ld/emultempl/gld960c.em ld/emultempl/hppaelf.em ld/emultempl/linux.em ld/emultempl/lnk960.em ld/emultempl/mipsecoff.em ld/emultempl/ostring.sed ld/emultempl/pe.em ld/emultempl/sunos.em ld/emultempl/vanilla.em ld/gen-doc.texi ld/genscripts.sh ld/h8-doc.texi ld/ld.1 ld/ld.h ld/ld.texinfo ld/ldcref.c ld/ldctor.c ld/ldctor.h ld/ldemul.c ld/ldemul.h ld/ldexp.c ld/ldexp.h ld/ldfile.c ld/ldfile.h ld/ldgram.y ld/ldint.texinfo ld/ldlang.c ld/ldlang.h ld/ldlex.h ld/ldlex.l ld/ldmain.c ld/ldmain.h ld/ldmisc.c ld/ldmisc.h ld/ldver.c ld/ldver.h ld/ldwrite.c ld/ldwrite.h ld/lexsup.c ld/mac-ld.r ld/mpw-config.in ld/mpw-elfmips.c ld/mpw-eppcmac.c ld/mpw-esh.c ld/mpw-idtmips.c ld/mpw-make.sed ld/mri.c ld/mri.h ld/pe-dll.c ld/pe-dll.h ld/po/Make-in ld/po/POTFILES.in ld/po/ld.pot ld/scripttempl/README ld/scripttempl/a29k.sc ld/scripttempl/aix.sc ld/scripttempl/alpha.sc ld/scripttempl/aout.sc ld/scripttempl/armaout.sc ld/scripttempl/armcoff.sc ld/scripttempl/delta68.sc ld/scripttempl/ebmon29k.sc ld/scripttempl/elf.sc ld/scripttempl/elfd10v.sc ld/scripttempl/elfd30v.sc ld/scripttempl/elfppc.sc ld/scripttempl/epocpe.sc ld/scripttempl/h8300.sc ld/scripttempl/h8300h.sc ld/scripttempl/h8300s.sc ld/scripttempl/h8500.sc ld/scripttempl/h8500b.sc ld/scripttempl/h8500c.sc ld/scripttempl/h8500m.sc ld/scripttempl/h8500s.sc ld/scripttempl/hppaelf.sc ld/scripttempl/i386beos.sc ld/scripttempl/i386coff.sc ld/scripttempl/i386go32.sc ld/scripttempl/i386lynx.sc ld/scripttempl/i386msdos.sc ld/scripttempl/i960.sc ld/scripttempl/m68kaux.sc ld/scripttempl/m68kcoff.sc ld/scripttempl/m68klynx.sc ld/scripttempl/m88kbcs.sc ld/scripttempl/mcorepe.sc ld/scripttempl/mips.sc ld/scripttempl/mipsbsd.sc ld/scripttempl/nw.sc ld/scripttempl/pe.sc ld/scripttempl/pj.sc ld/scripttempl/ppcpe.sc ld/scripttempl/psos.sc ld/scripttempl/riscix.sc ld/scripttempl/sa29200.sc ld/scripttempl/sh.sc ld/scripttempl/sparccoff.sc ld/scripttempl/sparclynx.sc ld/scripttempl/st2000.sc ld/scripttempl/tic30aout.sc ld/scripttempl/tic30coff.sc ld/scripttempl/tic80coff.sc ld/scripttempl/v850.sc ld/scripttempl/vanilla.sc ld/scripttempl/w65.sc ld/scripttempl/z8000.sc ld/stamp-h.in ld/sysdep.h ld/testsuite/ChangeLog ld/testsuite/config/default.exp ld/testsuite/ld-bootstrap/bootstrap.exp ld/testsuite/ld-cdtest/cdtest-bar.cc ld/testsuite/ld-cdtest/cdtest-foo.cc ld/testsuite/ld-cdtest/cdtest-foo.h ld/testsuite/ld-cdtest/cdtest-main.cc ld/testsuite/ld-cdtest/cdtest.dat ld/testsuite/ld-cdtest/cdtest.exp ld/testsuite/ld-checks/asm.s ld/testsuite/ld-checks/checks.exp ld/testsuite/ld-checks/script ld/testsuite/ld-elfvers/vers.exp ld/testsuite/ld-elfvers/vers1.c ld/testsuite/ld-elfvers/vers1.dsym ld/testsuite/ld-elfvers/vers1.map ld/testsuite/ld-elfvers/vers1.sym ld/testsuite/ld-elfvers/vers1.ver ld/testsuite/ld-elfvers/vers13.asym ld/testsuite/ld-elfvers/vers15.c ld/testsuite/ld-elfvers/vers15.dsym ld/testsuite/ld-elfvers/vers15.sym ld/testsuite/ld-elfvers/vers15.ver ld/testsuite/ld-elfvers/vers16.c ld/testsuite/ld-elfvers/vers16.dsym ld/testsuite/ld-elfvers/vers16.map ld/testsuite/ld-elfvers/vers16a.c ld/testsuite/ld-elfvers/vers16a.dsym ld/testsuite/ld-elfvers/vers16a.ver ld/testsuite/ld-elfvers/vers17.c ld/testsuite/ld-elfvers/vers17.dsym ld/testsuite/ld-elfvers/vers17.map ld/testsuite/ld-elfvers/vers17.ver ld/testsuite/ld-elfvers/vers18.c ld/testsuite/ld-elfvers/vers18.dsym ld/testsuite/ld-elfvers/vers18.map ld/testsuite/ld-elfvers/vers18.sym ld/testsuite/ld-elfvers/vers18.ver ld/testsuite/ld-elfvers/vers19.c ld/testsuite/ld-elfvers/vers19.dsym ld/testsuite/ld-elfvers/vers19.ver ld/testsuite/ld-elfvers/vers2.c ld/testsuite/ld-elfvers/vers2.dsym ld/testsuite/ld-elfvers/vers2.map ld/testsuite/ld-elfvers/vers2.ver ld/testsuite/ld-elfvers/vers3.c ld/testsuite/ld-elfvers/vers3.dsym ld/testsuite/ld-elfvers/vers3.ver ld/testsuite/ld-elfvers/vers4.c ld/testsuite/ld-elfvers/vers4.sym ld/testsuite/ld-elfvers/vers4a.dsym ld/testsuite/ld-elfvers/vers4a.sym ld/testsuite/ld-elfvers/vers4a.ver ld/testsuite/ld-elfvers/vers5.c ld/testsuite/ld-elfvers/vers6.c ld/testsuite/ld-elfvers/vers6.dsym ld/testsuite/ld-elfvers/vers6.sym ld/testsuite/ld-elfvers/vers6.ver ld/testsuite/ld-elfvers/vers7.c ld/testsuite/ld-elfvers/vers7.map ld/testsuite/ld-elfvers/vers7a.c ld/testsuite/ld-elfvers/vers7a.dsym ld/testsuite/ld-elfvers/vers7a.sym ld/testsuite/ld-elfvers/vers7a.ver ld/testsuite/ld-elfvers/vers8.c ld/testsuite/ld-elfvers/vers8.map ld/testsuite/ld-elfvers/vers8.ver ld/testsuite/ld-elfvers/vers9.c ld/testsuite/ld-elfvers/vers9.dsym ld/testsuite/ld-elfvers/vers9.sym ld/testsuite/ld-elfvers/vers9.ver ld/testsuite/ld-empic/empic.exp ld/testsuite/ld-empic/relax.t ld/testsuite/ld-empic/relax1.c ld/testsuite/ld-empic/relax2.c ld/testsuite/ld-empic/relax3.c ld/testsuite/ld-empic/relax4.c ld/testsuite/ld-empic/run.c ld/testsuite/ld-empic/runtest1.c ld/testsuite/ld-empic/runtest2.c ld/testsuite/ld-empic/runtesti.s ld/testsuite/ld-scripts/cross1.c ld/testsuite/ld-scripts/cross1.t ld/testsuite/ld-scripts/cross2.c ld/testsuite/ld-scripts/cross2.t ld/testsuite/ld-scripts/cross3.c ld/testsuite/ld-scripts/crossref.exp ld/testsuite/ld-scripts/defined.exp ld/testsuite/ld-scripts/defined.s ld/testsuite/ld-scripts/defined.t ld/testsuite/ld-scripts/phdrs.exp ld/testsuite/ld-scripts/phdrs.s ld/testsuite/ld-scripts/phdrs.t ld/testsuite/ld-scripts/script.exp ld/testsuite/ld-scripts/script.s ld/testsuite/ld-scripts/script.t ld/testsuite/ld-scripts/scriptm.t ld/testsuite/ld-scripts/sizeof.exp ld/testsuite/ld-scripts/sizeof.s ld/testsuite/ld-scripts/sizeof.t ld/testsuite/ld-scripts/weak.exp ld/testsuite/ld-scripts/weak.t ld/testsuite/ld-scripts/weak1.s ld/testsuite/ld-scripts/weak2.s ld/testsuite/ld-selective/1.c ld/testsuite/ld-selective/2.c ld/testsuite/ld-selective/3.cc ld/testsuite/ld-selective/4.cc ld/testsuite/ld-selective/selective.exp ld/testsuite/ld-sh/sh.exp ld/testsuite/ld-sh/sh1.s ld/testsuite/ld-sh/sh2.c ld/testsuite/ld-sh/start.s ld/testsuite/ld-shared/elf-offset.ld ld/testsuite/ld-shared/main.c ld/testsuite/ld-shared/sh1.c ld/testsuite/ld-shared/sh2.c ld/testsuite/ld-shared/shared.dat ld/testsuite/ld-shared/shared.exp ld/testsuite/ld-shared/sun4.dat ld/testsuite/ld-shared/xcoff.dat ld/testsuite/ld-srec/sr1.c ld/testsuite/ld-srec/sr2.c ld/testsuite/ld-srec/sr3.cc ld/testsuite/ld-srec/srec.exp ld/testsuite/ld-undefined/undefined.c ld/testsuite/ld-undefined/undefined.exp ld/testsuite/ld-versados/t1-1.ro ld/testsuite/ld-versados/t1-2.ro ld/testsuite/ld-versados/t1.ld ld/testsuite/ld-versados/t1.ook ld/testsuite/ld-versados/t2-1.ro ld/testsuite/ld-versados/t2-2.ro ld/testsuite/ld-versados/t2-3.ro ld/testsuite/ld-versados/t2.ld ld/testsuite/ld-versados/t2.ook ld/testsuite/ld-versados/versados.exp ld/testsuite/lib/ld-lib.exp libiberty/COPYING.LIB libiberty/ChangeLog libiberty/Makefile.in libiberty/README libiberty/acconfig.h libiberty/alloca-conf.h libiberty/alloca.c libiberty/argv.c libiberty/asprintf.c libiberty/atexit.c libiberty/basename.c libiberty/bcmp.c libiberty/bcopy.c libiberty/bzero.c libiberty/calloc.c libiberty/choose-temp.c libiberty/clock.c libiberty/concat.c libiberty/config.h-vms libiberty/config.in libiberty/config.table libiberty/config/mh-aix libiberty/config/mh-beos libiberty/config/mh-cxux7 libiberty/config/mh-fbsd21 libiberty/config/mh-windows libiberty/configure libiberty/configure.in libiberty/copysign.c libiberty/cplus-dem.c libiberty/fdmatch.c libiberty/floatformat.c libiberty/fnmatch.c libiberty/getcwd.c libiberty/getopt.c libiberty/getopt1.c libiberty/getpagesize.c libiberty/getruntime.c libiberty/hex.c libiberty/index.c libiberty/insque.c libiberty/makefile.vms libiberty/memchr.c libiberty/memcmp.c libiberty/memcpy.c libiberty/memmove.c libiberty/memset.c libiberty/mkstemps.c libiberty/mpw-config.in libiberty/mpw-make.sed libiberty/mpw.c libiberty/msdos.c libiberty/objalloc.c libiberty/obstack.c libiberty/pexecute.c libiberty/random.c libiberty/rename.c libiberty/rindex.c libiberty/sigsetmask.c libiberty/spaces.c libiberty/splay-tree.c libiberty/strcasecmp.c libiberty/strchr.c libiberty/strdup.c libiberty/strerror.c libiberty/strncasecmp.c libiberty/strrchr.c libiberty/strsignal.c libiberty/strstr.c libiberty/strtod.c libiberty/strtol.c libiberty/strtoul.c libiberty/tmpnam.c libiberty/vasprintf.c libiberty/vfork.c libiberty/vfprintf.c libiberty/vmsbuild.com libiberty/vprintf.c libiberty/vsprintf.c libiberty/waitpid.c libiberty/xatexit.c libiberty/xexit.c libiberty/xmalloc.c libiberty/xstrdup.c libiberty/xstrerror.c ltconfig ltmain.sh makefile.vms missing mkdep mkinstalldirs move-if-change mpw-README mpw-build.in mpw-config.in mpw-configure mpw-install opcodes/ChangeLog opcodes/Makefile.am opcodes/Makefile.in opcodes/a29k-dis.c opcodes/acinclude.m4 opcodes/aclocal.m4 opcodes/alpha-dis.c opcodes/alpha-opc.c opcodes/arc-dis.c opcodes/arc-opc.c opcodes/arm-dis.c opcodes/arm-opc.h opcodes/cgen-asm.c opcodes/cgen-dis.c opcodes/cgen-opc.c opcodes/config.in opcodes/configure opcodes/configure.in opcodes/d10v-dis.c opcodes/d10v-opc.c opcodes/d30v-dis.c opcodes/d30v-opc.c opcodes/dep-in.sed opcodes/dis-buf.c opcodes/disassemble.c opcodes/fr30-asm.c opcodes/fr30-desc.c opcodes/fr30-desc.h opcodes/fr30-dis.c opcodes/fr30-ibld.c opcodes/fr30-opc.c opcodes/fr30-opc.h opcodes/h8300-dis.c opcodes/h8500-dis.c opcodes/h8500-opc.h opcodes/hppa-dis.c opcodes/i386-dis.c opcodes/i960-dis.c opcodes/m10200-dis.c opcodes/m10200-opc.c opcodes/m10300-dis.c opcodes/m10300-opc.c opcodes/m32r-asm.c opcodes/m32r-desc.c opcodes/m32r-desc.h opcodes/m32r-dis.c opcodes/m32r-ibld.c opcodes/m32r-opc.c opcodes/m32r-opc.h opcodes/m32r-opinst.c opcodes/m68k-dis.c opcodes/m68k-opc.c opcodes/m88k-dis.c opcodes/makefile.vms opcodes/mcore-dis.c opcodes/mcore-opc.h opcodes/mips-dis.c opcodes/mips-opc.c opcodes/mips16-opc.c opcodes/mpw-config.in opcodes/mpw-make.sed opcodes/ns32k-dis.c opcodes/opintl.h opcodes/pj-dis.c opcodes/pj-opc.c opcodes/po/Make-in opcodes/po/POTFILES.in opcodes/po/opcodes.pot opcodes/ppc-dis.c opcodes/ppc-opc.c opcodes/sh-dis.c opcodes/sh-opc.h opcodes/sparc-dis.c opcodes/sparc-opc.c opcodes/stamp-h.in opcodes/sysdep.h opcodes/tic30-dis.c opcodes/tic80-dis.c opcodes/tic80-opc.c opcodes/v850-dis.c opcodes/v850-opc.c opcodes/vax-dis.c opcodes/w65-dis.c opcodes/w65-opc.h opcodes/z8k-dis.c opcodes/z8k-opc.h opcodes/z8kgen.c readline/ChangeLog setup.com symlink-tree texinfo/texinfo.tex ylwrap
Diffstat (limited to 'gas/config/tc-sparc.c')
-rw-r--r--gas/config/tc-sparc.c4008
1 files changed, 0 insertions, 4008 deletions
diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c
deleted file mode 100644
index d9d7b5c2c4a..00000000000
--- a/gas/config/tc-sparc.c
+++ /dev/null
@@ -1,4008 +0,0 @@
-/* tc-sparc.c -- Assemble for the SPARC
- Copyright (C) 1989, 90-96, 97, 98, 1999 Free Software Foundation, Inc.
- This file is part of GAS, the GNU Assembler.
-
- GAS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2, or (at your option)
- any later version.
-
- GAS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public
- License along with GAS; see the file COPYING. If not, write
- to the Free Software Foundation, 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
-
-#include <stdio.h>
-#include <ctype.h>
-
-#include "as.h"
-#include "subsegs.h"
-
-#include "opcode/sparc.h"
-
-#ifdef OBJ_ELF
-#include "elf/sparc.h"
-#endif
-
-static struct sparc_arch *lookup_arch PARAMS ((char *));
-static void init_default_arch PARAMS ((void));
-static int sparc_ip PARAMS ((char *, const struct sparc_opcode **));
-static int in_signed_range PARAMS ((bfd_signed_vma, bfd_signed_vma));
-static int in_unsigned_range PARAMS ((bfd_vma, bfd_vma));
-static int in_bitfield_range PARAMS ((bfd_signed_vma, bfd_signed_vma));
-static int sparc_ffs PARAMS ((unsigned int));
-static void synthetize_setuw PARAMS ((const struct sparc_opcode *));
-static void synthetize_setsw PARAMS ((const struct sparc_opcode *));
-static void synthetize_setx PARAMS ((const struct sparc_opcode *));
-static bfd_vma BSR PARAMS ((bfd_vma, int));
-static int cmp_reg_entry PARAMS ((const PTR, const PTR));
-static int parse_keyword_arg PARAMS ((int (*) (const char *), char **, int *));
-static int parse_const_expr_arg PARAMS ((char **, int *));
-static int get_expression PARAMS ((char *str));
-
-/* Default architecture. */
-/* ??? The default value should be V8, but sparclite support was added
- by making it the default. GCC now passes -Asparclite, so maybe sometime in
- the future we can set this to V8. */
-#ifndef DEFAULT_ARCH
-#define DEFAULT_ARCH "sparclite"
-#endif
-static char *default_arch = DEFAULT_ARCH;
-
-/* Non-zero if the initial values of `max_architecture' and `sparc_arch_size'
- have been set. */
-static int default_init_p;
-
-/* Current architecture. We don't bump up unless necessary. */
-static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6;
-
-/* The maximum architecture level we can bump up to.
- In a 32 bit environment, don't allow bumping up to v9 by default.
- The native assembler works this way. The user is required to pass
- an explicit argument before we'll create v9 object files. However, if
- we don't see any v9 insns, a v8plus object file is not created. */
-static enum sparc_opcode_arch_val max_architecture;
-
-/* Either 32 or 64, selects file format. */
-static int sparc_arch_size;
-/* Initial (default) value, recorded separately in case a user option
- changes the value before md_show_usage is called. */
-static int default_arch_size;
-
-#ifdef OBJ_ELF
-/* The currently selected v9 memory model. Currently only used for
- ELF. */
-static enum { MM_TSO, MM_PSO, MM_RMO } sparc_memory_model = MM_RMO;
-#endif
-
-static int architecture_requested;
-static int warn_on_bump;
-
-/* If warn_on_bump and the needed architecture is higher than this
- architecture, issue a warning. */
-static enum sparc_opcode_arch_val warn_after_architecture;
-
-/* Non-zero if as should generate error if an undeclared g[23] register
- has been used in -64. */
-static int no_undeclared_regs;
-
-/* Non-zero if we are generating PIC code. */
-int sparc_pic_code;
-
-/* Non-zero if we should give an error when misaligned data is seen. */
-static int enforce_aligned_data;
-
-extern int target_big_endian;
-
-static int target_little_endian_data;
-
-/* Symbols for global registers on v9. */
-static symbolS *globals[8];
-
-/* V9 and 86x have big and little endian data, but instructions are always big
- endian. The sparclet has bi-endian support but both data and insns have
- the same endianness. Global `target_big_endian' is used for data.
- The following macro is used for instructions. */
-#ifndef INSN_BIG_ENDIAN
-#define INSN_BIG_ENDIAN (target_big_endian \
- || default_arch_type == sparc86x \
- || SPARC_OPCODE_ARCH_V9_P (max_architecture))
-#endif
-
-/* handle of the OPCODE hash table */
-static struct hash_control *op_hash;
-
-static int log2 PARAMS ((int));
-static void s_data1 PARAMS ((void));
-static void s_seg PARAMS ((int));
-static void s_proc PARAMS ((int));
-static void s_reserve PARAMS ((int));
-static void s_common PARAMS ((int));
-static void s_empty PARAMS ((int));
-static void s_uacons PARAMS ((int));
-static void s_ncons PARAMS ((int));
-static void s_register PARAMS ((int));
-
-const pseudo_typeS md_pseudo_table[] =
-{
- {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
- {"common", s_common, 0},
- {"empty", s_empty, 0},
- {"global", s_globl, 0},
- {"half", cons, 2},
- {"nword", s_ncons, 0},
- {"optim", s_ignore, 0},
- {"proc", s_proc, 0},
- {"reserve", s_reserve, 0},
- {"seg", s_seg, 0},
- {"skip", s_space, 0},
- {"word", cons, 4},
- {"xword", cons, 8},
- {"uahalf", s_uacons, 2},
- {"uaword", s_uacons, 4},
- {"uaxword", s_uacons, 8},
-#ifdef OBJ_ELF
- /* these are specific to sparc/svr4 */
- {"2byte", s_uacons, 2},
- {"4byte", s_uacons, 4},
- {"8byte", s_uacons, 8},
- {"register", s_register, 0},
-#endif
- {NULL, 0, 0},
-};
-
-const int md_reloc_size = 12; /* Size of relocation record */
-
-/* This array holds the chars that always start a comment. If the
- pre-processor is disabled, these aren't very useful */
-const char comment_chars[] = "!"; /* JF removed '|' from comment_chars */
-
-/* This array holds the chars that only start a comment at the beginning of
- a line. If the line seems to have the form '# 123 filename'
- .line and .file directives will appear in the pre-processed output */
-/* Note that input_file.c hand checks for '#' at the beginning of the
- first line of the input file. This is because the compiler outputs
- #NO_APP at the beginning of its output. */
-/* Also note that comments started like this one will always
- work if '/' isn't otherwise defined. */
-const char line_comment_chars[] = "#";
-
-const char line_separator_chars[] = "";
-
-/* Chars that can be used to separate mant from exp in floating point nums */
-const char EXP_CHARS[] = "eE";
-
-/* Chars that mean this number is a floating point constant */
-/* As in 0f12.456 */
-/* or 0d1.2345e12 */
-const char FLT_CHARS[] = "rRsSfFdDxXpP";
-
-/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
- changed in read.c. Ideally it shouldn't have to know about it at all,
- but nothing is ideal around here. */
-
-#define isoctal(c) ((unsigned)((c) - '0') < '8')
-
-struct sparc_it
- {
- char *error;
- unsigned long opcode;
- struct nlist *nlistp;
- expressionS exp;
- expressionS exp2;
- int pcrel;
- bfd_reloc_code_real_type reloc;
- };
-
-struct sparc_it the_insn, set_insn;
-
-static void output_insn
- PARAMS ((const struct sparc_opcode *, struct sparc_it *));
-
-/* Table of arguments to -A.
- The sparc_opcode_arch table in sparc-opc.c is insufficient and incorrect
- for this use. That table is for opcodes only. This table is for opcodes
- and file formats. */
-
-enum sparc_arch_types {v6, v7, v8, sparclet, sparclite, sparc86x, v8plus,
- v8plusa, v9, v9a, v9_64};
-
-static struct sparc_arch {
- char *name;
- char *opcode_arch;
- enum sparc_arch_types arch_type;
- /* Default word size, as specified during configuration.
- A value of zero means can't be used to specify default architecture. */
- int default_arch_size;
- /* Allowable arg to -A? */
- int user_option_p;
-} sparc_arch_table[] = {
- { "v6", "v6", v6, 0, 1 },
- { "v7", "v7", v7, 0, 1 },
- { "v8", "v8", v8, 32, 1 },
- { "sparclet", "sparclet", sparclet, 32, 1 },
- { "sparclite", "sparclite", sparclite, 32, 1 },
- { "sparc86x", "sparclite", sparc86x, 32, 1 },
- { "v8plus", "v9", v9, 0, 1 },
- { "v8plusa", "v9a", v9, 0, 1 },
- { "v9", "v9", v9, 0, 1 },
- { "v9a", "v9a", v9, 0, 1 },
- /* This exists to allow configure.in/Makefile.in to pass one
- value to specify both the default machine and default word size. */
- { "v9-64", "v9", v9, 64, 0 },
- { NULL, NULL, v8, 0, 0 }
-};
-
-/* Variant of default_arch */
-static enum sparc_arch_types default_arch_type;
-
-static struct sparc_arch *
-lookup_arch (name)
- char *name;
-{
- struct sparc_arch *sa;
-
- for (sa = &sparc_arch_table[0]; sa->name != NULL; sa++)
- if (strcmp (sa->name, name) == 0)
- break;
- if (sa->name == NULL)
- return NULL;
- return sa;
-}
-
-/* Initialize the default opcode arch and word size from the default
- architecture name. */
-
-static void
-init_default_arch ()
-{
- struct sparc_arch *sa = lookup_arch (default_arch);
-
- if (sa == NULL
- || sa->default_arch_size == 0)
- as_fatal (_("Invalid default architecture, broken assembler."));
-
- max_architecture = sparc_opcode_lookup_arch (sa->opcode_arch);
- if (max_architecture == SPARC_OPCODE_ARCH_BAD)
- as_fatal (_("Bad opcode table, broken assembler."));
- default_arch_size = sparc_arch_size = sa->default_arch_size;
- default_init_p = 1;
- default_arch_type = sa->arch_type;
-}
-
-/* Called by TARGET_FORMAT. */
-
-const char *
-sparc_target_format ()
-{
- /* We don't get a chance to initialize anything before we're called,
- so handle that now. */
- if (! default_init_p)
- init_default_arch ();
-
-#ifdef OBJ_AOUT
-#ifdef TE_NetBSD
- return "a.out-sparc-netbsd";
-#else
-#ifdef TE_SPARCAOUT
- if (target_big_endian)
- return "a.out-sunos-big";
- else if (default_arch_type == sparc86x && target_little_endian_data)
- return "a.out-sunos-big";
- else return "a.out-sparc-little";
-#else
- return "a.out-sunos-big";
-#endif
-#endif
-#endif
-
-#ifdef OBJ_BOUT
- return "b.out.big";
-#endif
-
-#ifdef OBJ_COFF
-#ifdef TE_LYNX
- return "coff-sparc-lynx";
-#else
- return "coff-sparc";
-#endif
-#endif
-
-#ifdef OBJ_ELF
- return sparc_arch_size == 64 ? "elf64-sparc" : "elf32-sparc";
-#endif
-
- abort ();
-}
-
-/*
- * md_parse_option
- * Invocation line includes a switch not recognized by the base assembler.
- * See if it's a processor-specific option. These are:
- *
- * -bump
- * Warn on architecture bumps. See also -A.
- *
- * -Av6, -Av7, -Av8, -Asparclite, -Asparclet
- * Standard 32 bit architectures.
- * -Av8plus, -Av8plusa
- * Sparc64 in a 32 bit world.
- * -Av9, -Av9a
- * Sparc64 in either a 32 or 64 bit world (-32/-64 says which).
- * This used to only mean 64 bits, but properly specifying it
- * complicated gcc's ASM_SPECs, so now opcode selection is
- * specified orthogonally to word size (except when specifying
- * the default, but that is an internal implementation detail).
- * -xarch=v8plus, -xarch=v8plusa
- * Same as -Av8plus{,a}, for compatibility with Sun's assembler.
- *
- * Select the architecture and possibly the file format.
- * Instructions or features not supported by the selected
- * architecture cause fatal errors.
- *
- * The default is to start at v6, and bump the architecture up
- * whenever an instruction is seen at a higher level. In 32 bit
- * environments, v9 is not bumped up to, the user must pass
- * -Av8plus{,a}.
- *
- * If -bump is specified, a warning is printing when bumping to
- * higher levels.
- *
- * If an architecture is specified, all instructions must match
- * that architecture. Any higher level instructions are flagged
- * as errors. Note that in the 32 bit environment specifying
- * -Av8plus does not automatically create a v8plus object file, a
- * v9 insn must be seen.
- *
- * If both an architecture and -bump are specified, the
- * architecture starts at the specified level, but bumps are
- * warnings. Note that we can't set `current_architecture' to
- * the requested level in this case: in the 32 bit environment,
- * we still must avoid creating v8plus object files unless v9
- * insns are seen.
- *
- * Note:
- * Bumping between incompatible architectures is always an
- * error. For example, from sparclite to v9.
- */
-
-#ifdef OBJ_ELF
-CONST char *md_shortopts = "A:K:VQ:sq";
-#else
-#ifdef OBJ_AOUT
-CONST char *md_shortopts = "A:k";
-#else
-CONST char *md_shortopts = "A:";
-#endif
-#endif
-struct option md_longopts[] = {
-#define OPTION_BUMP (OPTION_MD_BASE)
- {"bump", no_argument, NULL, OPTION_BUMP},
-#define OPTION_SPARC (OPTION_MD_BASE + 1)
- {"sparc", no_argument, NULL, OPTION_SPARC},
-#define OPTION_XARCH (OPTION_MD_BASE + 2)
- {"xarch", required_argument, NULL, OPTION_XARCH},
-#ifdef OBJ_ELF
-#define OPTION_32 (OPTION_MD_BASE + 3)
- {"32", no_argument, NULL, OPTION_32},
-#define OPTION_64 (OPTION_MD_BASE + 4)
- {"64", no_argument, NULL, OPTION_64},
-#define OPTION_TSO (OPTION_MD_BASE + 5)
- {"TSO", no_argument, NULL, OPTION_TSO},
-#define OPTION_PSO (OPTION_MD_BASE + 6)
- {"PSO", no_argument, NULL, OPTION_PSO},
-#define OPTION_RMO (OPTION_MD_BASE + 7)
- {"RMO", no_argument, NULL, OPTION_RMO},
-#endif
-#ifdef SPARC_BIENDIAN
-#define OPTION_LITTLE_ENDIAN (OPTION_MD_BASE + 8)
- {"EL", no_argument, NULL, OPTION_LITTLE_ENDIAN},
-#define OPTION_BIG_ENDIAN (OPTION_MD_BASE + 9)
- {"EB", no_argument, NULL, OPTION_BIG_ENDIAN},
-#endif
-#define OPTION_ENFORCE_ALIGNED_DATA (OPTION_MD_BASE + 10)
- {"enforce-aligned-data", no_argument, NULL, OPTION_ENFORCE_ALIGNED_DATA},
-#define OPTION_LITTLE_ENDIAN_DATA (OPTION_MD_BASE + 11)
- {"little-endian-data", no_argument, NULL, OPTION_LITTLE_ENDIAN_DATA},
-#ifdef OBJ_ELF
-#define OPTION_NO_UNDECLARED_REGS (OPTION_MD_BASE + 12)
- {"no-undeclared-regs", no_argument, NULL, OPTION_NO_UNDECLARED_REGS},
-#endif
- {NULL, no_argument, NULL, 0}
-};
-size_t md_longopts_size = sizeof(md_longopts);
-
-int
-md_parse_option (c, arg)
- int c;
- char *arg;
-{
- /* We don't get a chance to initialize anything before we're called,
- so handle that now. */
- if (! default_init_p)
- init_default_arch ();
-
- switch (c)
- {
- case OPTION_BUMP:
- warn_on_bump = 1;
- warn_after_architecture = SPARC_OPCODE_ARCH_V6;
- break;
-
- case OPTION_XARCH:
- /* This is for compatibility with Sun's assembler. */
- if (strcmp (arg, "v8plus") != 0
- && strcmp (arg, "v8plusa") != 0)
- {
- as_bad (_("invalid architecture -xarch=%s"), arg);
- return 0;
- }
-
- /* fall through */
-
- case 'A':
- {
- struct sparc_arch *sa;
- enum sparc_opcode_arch_val opcode_arch;
-
- sa = lookup_arch (arg);
- if (sa == NULL
- || ! sa->user_option_p)
- {
- as_bad (_("invalid architecture -A%s"), arg);
- return 0;
- }
-
- opcode_arch = sparc_opcode_lookup_arch (sa->opcode_arch);
- if (opcode_arch == SPARC_OPCODE_ARCH_BAD)
- as_fatal (_("Bad opcode table, broken assembler."));
-
- max_architecture = opcode_arch;
- architecture_requested = 1;
- }
- break;
-
- case OPTION_SPARC:
- /* Ignore -sparc, used by SunOS make default .s.o rule. */
- break;
-
- case OPTION_ENFORCE_ALIGNED_DATA:
- enforce_aligned_data = 1;
- break;
-
-#ifdef SPARC_BIENDIAN
- case OPTION_LITTLE_ENDIAN:
- target_big_endian = 0;
- if (default_arch_type != sparclet)
- as_fatal ("This target does not support -EL");
- break;
- case OPTION_LITTLE_ENDIAN_DATA:
- target_little_endian_data = 1;
- target_big_endian = 0;
- if (default_arch_type != sparc86x
- && default_arch_type != v9)
- as_fatal ("This target does not support --little-endian-data");
- break;
- case OPTION_BIG_ENDIAN:
- target_big_endian = 1;
- break;
-#endif
-
-#ifdef OBJ_AOUT
- case 'k':
- sparc_pic_code = 1;
- break;
-#endif
-
-#ifdef OBJ_ELF
- case OPTION_32:
- case OPTION_64:
- {
- const char **list, **l;
-
- sparc_arch_size = c == OPTION_32 ? 32 : 64;
- list = bfd_target_list ();
- for (l = list; *l != NULL; l++)
- {
- if (sparc_arch_size == 32)
- {
- if (strcmp (*l, "elf32-sparc") == 0)
- break;
- }
- else
- {
- if (strcmp (*l, "elf64-sparc") == 0)
- break;
- }
- }
- if (*l == NULL)
- as_fatal (_("No compiled in support for %d bit object file format"),
- sparc_arch_size);
- free (list);
- }
- break;
-
- case OPTION_TSO:
- sparc_memory_model = MM_TSO;
- break;
-
- case OPTION_PSO:
- sparc_memory_model = MM_PSO;
- break;
-
- case OPTION_RMO:
- sparc_memory_model = MM_RMO;
- break;
-
- case 'V':
- print_version_id ();
- break;
-
- case 'Q':
- /* Qy - do emit .comment
- Qn - do not emit .comment */
- break;
-
- case 's':
- /* use .stab instead of .stab.excl */
- break;
-
- case 'q':
- /* quick -- native assembler does fewer checks */
- break;
-
- case 'K':
- if (strcmp (arg, "PIC") != 0)
- as_warn (_("Unrecognized option following -K"));
- else
- sparc_pic_code = 1;
- break;
-
- case OPTION_NO_UNDECLARED_REGS:
- no_undeclared_regs = 1;
- break;
-#endif
-
- default:
- return 0;
- }
-
- return 1;
-}
-
-void
-md_show_usage (stream)
- FILE *stream;
-{
- const struct sparc_arch *arch;
-
- /* We don't get a chance to initialize anything before we're called,
- so handle that now. */
- if (! default_init_p)
- init_default_arch ();
-
- fprintf(stream, _("SPARC options:\n"));
- for (arch = &sparc_arch_table[0]; arch->name; arch++)
- {
- if (arch != &sparc_arch_table[0])
- fprintf (stream, " | ");
- if (arch->user_option_p)
- fprintf (stream, "-A%s", arch->name);
- }
- fprintf (stream, _("\n-xarch=v8plus | -xarch=v8plusa\n"));
- fprintf (stream, _("\
- specify variant of SPARC architecture\n\
--bump warn when assembler switches architectures\n\
--sparc ignored\n\
---enforce-aligned-data force .long, etc., to be aligned correctly\n"));
-#ifdef OBJ_AOUT
- fprintf (stream, _("\
--k generate PIC\n"));
-#endif
-#ifdef OBJ_ELF
- fprintf (stream, _("\
--32 create 32 bit object file\n\
--64 create 64 bit object file\n"));
- fprintf (stream, _("\
- [default is %d]\n"), default_arch_size);
- fprintf (stream, _("\
--TSO use Total Store Ordering\n\
--PSO use Partial Store Ordering\n\
--RMO use Relaxed Memory Ordering\n"));
- fprintf (stream, _("\
- [default is %s]\n"), (default_arch_size == 64) ? "RMO" : "TSO");
- fprintf (stream, _("\
--KPIC generate PIC\n\
--V print assembler version number\n\
--q ignored\n\
--Qy, -Qn ignored\n\
--s ignored\n"));
-#endif
-#ifdef SPARC_BIENDIAN
- fprintf (stream, _("\
--EL generate code for a little endian machine\n\
--EB generate code for a big endian machine\n\
---little-endian-data generate code for a machine having big endian\n\
- instructions and little endian data."));
-#endif
-}
-
-/* native operand size opcode translation */
-struct
- {
- char *name;
- char *name32;
- char *name64;
- } native_op_table[] =
-{
- {"ldn", "ld", "ldx"},
- {"ldna", "lda", "ldxa"},
- {"stn", "st", "stx"},
- {"stna", "sta", "stxa"},
- {"slln", "sll", "sllx"},
- {"srln", "srl", "srlx"},
- {"sran", "sra", "srax"},
- {"casn", "cas", "casx"},
- {"casna", "casa", "casxa"},
- {"clrn", "clr", "clrx"},
- {NULL, NULL, NULL},
-};
-
-/* sparc64 priviledged registers */
-
-struct priv_reg_entry
- {
- char *name;
- int regnum;
- };
-
-struct priv_reg_entry priv_reg_table[] =
-{
- {"tpc", 0},
- {"tnpc", 1},
- {"tstate", 2},
- {"tt", 3},
- {"tick", 4},
- {"tba", 5},
- {"pstate", 6},
- {"tl", 7},
- {"pil", 8},
- {"cwp", 9},
- {"cansave", 10},
- {"canrestore", 11},
- {"cleanwin", 12},
- {"otherwin", 13},
- {"wstate", 14},
- {"fq", 15},
- {"ver", 31},
- {"", -1}, /* end marker */
-};
-
-/* v9a specific asrs */
-
-struct priv_reg_entry v9a_asr_table[] =
-{
- {"tick_cmpr", 23},
- {"softint", 22},
- {"set_softint", 20},
- {"pic", 17},
- {"pcr", 16},
- {"gsr", 19},
- {"dcr", 18},
- {"clear_softint", 21},
- {"", -1}, /* end marker */
-};
-
-static int
-cmp_reg_entry (parg, qarg)
- const PTR parg;
- const PTR qarg;
-{
- const struct priv_reg_entry *p = (const struct priv_reg_entry *) parg;
- const struct priv_reg_entry *q = (const struct priv_reg_entry *) qarg;
-
- return strcmp (q->name, p->name);
-}
-
-/* This function is called once, at assembler startup time. It should
- set up all the tables, etc. that the MD part of the assembler will need. */
-
-void
-md_begin ()
-{
- register const char *retval = NULL;
- int lose = 0;
- register unsigned int i = 0;
-
- /* We don't get a chance to initialize anything before md_parse_option
- is called, and it may not be called, so handle default initialization
- now if not already done. */
- if (! default_init_p)
- init_default_arch ();
-
- op_hash = hash_new ();
-
- while (i < (unsigned int) sparc_num_opcodes)
- {
- const char *name = sparc_opcodes[i].name;
- retval = hash_insert (op_hash, name, (PTR) &sparc_opcodes[i]);
- if (retval != NULL)
- {
- as_bad (_("Internal error: can't hash `%s': %s\n"),
- sparc_opcodes[i].name, retval);
- lose = 1;
- }
- do
- {
- if (sparc_opcodes[i].match & sparc_opcodes[i].lose)
- {
- as_bad (_("Internal error: losing opcode: `%s' \"%s\"\n"),
- sparc_opcodes[i].name, sparc_opcodes[i].args);
- lose = 1;
- }
- ++i;
- }
- while (i < (unsigned int) sparc_num_opcodes
- && !strcmp (sparc_opcodes[i].name, name));
- }
-
- for (i = 0; native_op_table[i].name; i++)
- {
- const struct sparc_opcode *insn;
- char *name = sparc_arch_size == 32 ? native_op_table[i].name32 :
- native_op_table[i].name64;
- insn = (struct sparc_opcode *)hash_find (op_hash, name);
- if (insn == NULL)
- {
- as_bad (_("Internal error: can't find opcode `%s' for `%s'\n"),
- name, native_op_table[i].name);
- lose = 1;
- }
- else
- {
- retval = hash_insert (op_hash, native_op_table[i].name, (PTR) insn);
- if (retval != NULL)
- {
- as_bad (_("Internal error: can't hash `%s': %s\n"),
- sparc_opcodes[i].name, retval);
- lose = 1;
- }
- }
- }
-
- if (lose)
- as_fatal (_("Broken assembler. No assembly attempted."));
-
- qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]),
- sizeof (priv_reg_table[0]), cmp_reg_entry);
-
- /* If -bump, record the architecture level at which we start issuing
- warnings. The behaviour is different depending upon whether an
- architecture was explicitly specified. If it wasn't, we issue warnings
- for all upwards bumps. If it was, we don't start issuing warnings until
- we need to bump beyond the requested architecture or when we bump between
- conflicting architectures. */
-
- if (warn_on_bump
- && architecture_requested)
- {
- /* `max_architecture' records the requested architecture.
- Issue warnings if we go above it. */
- warn_after_architecture = max_architecture;
-
- /* Find the highest architecture level that doesn't conflict with
- the requested one. */
- for (max_architecture = SPARC_OPCODE_ARCH_MAX;
- max_architecture > warn_after_architecture;
- --max_architecture)
- if (! SPARC_OPCODE_CONFLICT_P (max_architecture,
- warn_after_architecture))
- break;
- }
-}
-
-/* Called after all assembly has been done. */
-
-void
-sparc_md_end ()
-{
- if (sparc_arch_size == 64)
- {
- if (current_architecture == SPARC_OPCODE_ARCH_V9A)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a);
- else
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9);
- }
- else
- {
- if (current_architecture == SPARC_OPCODE_ARCH_V9)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus);
- else if (current_architecture == SPARC_OPCODE_ARCH_V9A)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa);
- else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet);
- else if (default_arch_type == sparc86x && target_little_endian_data)
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclite_le);
- else
- {
- /* The sparclite is treated like a normal sparc. Perhaps it shouldn't
- be but for now it is (since that's the way it's always been
- treated). */
- bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc);
- }
- }
-}
-
-/* Return non-zero if VAL is in the range -(MAX+1) to MAX. */
-
-static INLINE int
-in_signed_range (val, max)
- bfd_signed_vma val, max;
-{
- if (max <= 0)
- abort ();
- /* Sign-extend the value from the architecture word size, so that
- 0xffffffff is always considered -1 on sparc32. */
- if (sparc_arch_size == 32)
- {
- bfd_signed_vma sign = (bfd_signed_vma)1 << 31;
- val = ((val & 0xffffffff) ^ sign) - sign;
- }
- if (val > max)
- return 0;
- if (val < ~max)
- return 0;
- return 1;
-}
-
-/* Return non-zero if VAL is in the range 0 to MAX. */
-
-static INLINE int
-in_unsigned_range (val, max)
- bfd_vma val, max;
-{
- if (val > max)
- return 0;
- return 1;
-}
-
-/* Return non-zero if VAL is in the range -(MAX/2+1) to MAX.
- (e.g. -15 to +31). */
-
-static INLINE int
-in_bitfield_range (val, max)
- bfd_signed_vma val, max;
-{
- if (max <= 0)
- abort ();
- if (val > max)
- return 0;
- if (val < ~(max >> 1))
- return 0;
- return 1;
-}
-
-static int
-sparc_ffs (mask)
- unsigned int mask;
-{
- int i;
-
- if (mask == 0)
- return -1;
-
- for (i = 0; (mask & 1) == 0; ++i)
- mask >>= 1;
- return i;
-}
-
-/* Implement big shift right. */
-static bfd_vma
-BSR (val, amount)
- bfd_vma val;
- int amount;
-{
- if (sizeof (bfd_vma) <= 4 && amount >= 32)
- as_fatal (_("Support for 64-bit arithmetic not compiled in."));
- return val >> amount;
-}
-
-/* For communication between sparc_ip and get_expression. */
-static char *expr_end;
-
-/* Values for `special_case'.
- Instructions that require wierd handling because they're longer than
- 4 bytes. */
-#define SPECIAL_CASE_NONE 0
-#define SPECIAL_CASE_SET 1
-#define SPECIAL_CASE_SETSW 2
-#define SPECIAL_CASE_SETX 3
-/* FIXME: sparc-opc.c doesn't have necessary "S" trigger to enable this. */
-#define SPECIAL_CASE_FDIV 4
-
-/* Bit masks of various insns. */
-#define NOP_INSN 0x01000000
-#define OR_INSN 0x80100000
-#define XOR_INSN 0x80180000
-#define FMOVS_INSN 0x81A00020
-#define SETHI_INSN 0x01000000
-#define SLLX_INSN 0x81281000
-#define SRA_INSN 0x81380000
-
-/* The last instruction to be assembled. */
-static const struct sparc_opcode *last_insn;
-/* The assembled opcode of `last_insn'. */
-static unsigned long last_opcode;
-
-/* Handle the set and setuw synthetic instructions. */
-static void
-synthetize_setuw (insn)
- const struct sparc_opcode *insn;
-{
- int need_hi22_p = 0;
- int rd = (the_insn.opcode & RD (~0)) >> 25;
-
- if (the_insn.exp.X_op == O_constant)
- {
- if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
- {
- if (sizeof(offsetT) > 4
- && (the_insn.exp.X_add_number < 0
- || the_insn.exp.X_add_number > (offsetT) 0xffffffff))
- as_warn (_("set: number not in 0..4294967295 range"));
- }
- else
- {
- if (sizeof(offsetT) > 4
- && (the_insn.exp.X_add_number < -(offsetT) 0x80000000
- || the_insn.exp.X_add_number > (offsetT) 0xffffffff))
- as_warn (_("set: number not in -2147483648..4294967295 range"));
- the_insn.exp.X_add_number = (int)the_insn.exp.X_add_number;
- }
- }
-
- /* See if operand is absolute and small; skip sethi if so. */
- if (the_insn.exp.X_op != O_constant
- || the_insn.exp.X_add_number >= (1 << 12)
- || the_insn.exp.X_add_number < -(1 << 12))
- {
- the_insn.opcode = (SETHI_INSN | RD (rd)
- | ((the_insn.exp.X_add_number >> 10)
- & (the_insn.exp.X_op == O_constant ? 0x3fffff : 0)));
- the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_HI22
- : BFD_RELOC_NONE);
- output_insn (insn, &the_insn);
- need_hi22_p = 1;
- }
-
- /* See if operand has no low-order bits; skip OR if so. */
- if (the_insn.exp.X_op != O_constant
- || (need_hi22_p && (the_insn.exp.X_add_number & 0x3FF) != 0)
- || ! need_hi22_p)
- {
- the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (rd) : 0)
- | RD (rd) | IMMED
- | (the_insn.exp.X_add_number
- & (the_insn.exp.X_op != O_constant ? 0 :
- need_hi22_p ? 0x3ff : 0x1fff)));
- the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_LO10
- : BFD_RELOC_NONE);
- output_insn (insn, &the_insn);
- }
-}
-
-/* Handle the setsw synthetic instruction. */
-static void
-synthetize_setsw (insn)
- const struct sparc_opcode *insn;
-{
- int low32, rd, opc;
-
- rd = (the_insn.opcode & RD (~0)) >> 25;
-
- if (the_insn.exp.X_op != O_constant)
- {
- synthetize_setuw (insn);
-
- /* Need to sign extend it. */
- the_insn.opcode = (SRA_INSN | RS1 (rd) | RD (rd));
- the_insn.reloc = BFD_RELOC_NONE;
- output_insn (insn, &the_insn);
- return;
- }
-
- if (sizeof(offsetT) > 4
- && (the_insn.exp.X_add_number < -(offsetT) 0x80000000
- || the_insn.exp.X_add_number > (offsetT) 0xffffffff))
- as_warn (_("setsw: number not in -2147483648..4294967295 range"));
-
- low32 = the_insn.exp.X_add_number;
-
- if (low32 >= 0)
- {
- synthetize_setuw (insn);
- return;
- }
-
- opc = OR_INSN;
-
- the_insn.reloc = BFD_RELOC_NONE;
- /* See if operand is absolute and small; skip sethi if so. */
- if (low32 < -(1 << 12))
- {
- the_insn.opcode = (SETHI_INSN | RD (rd)
- | (((~the_insn.exp.X_add_number) >> 10) & 0x3fffff));
- output_insn (insn, &the_insn);
- low32 = 0x1c00 | (low32 & 0x3ff);
- opc = RS1 (rd) | XOR_INSN;
- }
-
- the_insn.opcode = (opc | RD (rd) | IMMED
- | (low32 & 0x1fff));
- output_insn (insn, &the_insn);
-}
-
-/* Handle the setsw synthetic instruction. */
-static void
-synthetize_setx (insn)
- const struct sparc_opcode *insn;
-{
- int upper32, lower32;
- int tmpreg = (the_insn.opcode & RS1 (~0)) >> 14;
- int dstreg = (the_insn.opcode & RD (~0)) >> 25;
- int upper_dstreg;
- int need_hh22_p = 0, need_hm10_p = 0, need_hi22_p = 0, need_lo10_p = 0;
- int need_xor10_p = 0;
-
-#define SIGNEXT32(x) ((((x) & 0xffffffff) ^ 0x80000000) - 0x80000000)
- lower32 = SIGNEXT32 (the_insn.exp.X_add_number);
- upper32 = SIGNEXT32 (BSR (the_insn.exp.X_add_number, 32));
-#undef SIGNEXT32
-
- upper_dstreg = tmpreg;
- /* The tmp reg should not be the dst reg. */
- if (tmpreg == dstreg)
- as_warn (_("setx: temporary register same as destination register"));
-
- /* ??? Obviously there are other optimizations we can do
- (e.g. sethi+shift for 0x1f0000000) and perhaps we shouldn't be
- doing some of these. Later. If you do change things, try to
- change all of this to be table driven as well. */
- /* What to output depends on the number if it's constant.
- Compute that first, then output what we've decided upon. */
- if (the_insn.exp.X_op != O_constant)
- {
- if (sparc_arch_size == 32)
- {
- /* When arch size is 32, we want setx to be equivalent
- to setuw for anything but constants. */
- the_insn.exp.X_add_number &= 0xffffffff;
- synthetize_setuw (insn);
- return;
- }
- need_hh22_p = need_hm10_p = need_hi22_p = need_lo10_p = 1;
- lower32 = 0; upper32 = 0;
- }
- else
- {
- /* Reset X_add_number, we've extracted it as upper32/lower32.
- Otherwise fixup_segment will complain about not being able to
- write an 8 byte number in a 4 byte field. */
- the_insn.exp.X_add_number = 0;
-
- /* Only need hh22 if `or' insn can't handle constant. */
- if (upper32 < -(1 << 12) || upper32 >= (1 << 12))
- need_hh22_p = 1;
-
- /* Does bottom part (after sethi) have bits? */
- if ((need_hh22_p && (upper32 & 0x3ff) != 0)
- /* No hh22, but does upper32 still have bits we can't set
- from lower32? */
- || (! need_hh22_p && upper32 != 0 && upper32 != -1))
- need_hm10_p = 1;
-
- /* If the lower half is all zero, we build the upper half directly
- into the dst reg. */
- if (lower32 != 0
- /* Need lower half if number is zero or 0xffffffff00000000. */
- || (! need_hh22_p && ! need_hm10_p))
- {
- /* No need for sethi if `or' insn can handle constant. */
- if (lower32 < -(1 << 12) || lower32 >= (1 << 12)
- /* Note that we can't use a negative constant in the `or'
- insn unless the upper 32 bits are all ones. */
- || (lower32 < 0 && upper32 != -1)
- || (lower32 >= 0 && upper32 == -1))
- need_hi22_p = 1;
-
- if (need_hi22_p && upper32 == -1)
- need_xor10_p = 1;
-
- /* Does bottom part (after sethi) have bits? */
- else if ((need_hi22_p && (lower32 & 0x3ff) != 0)
- /* No sethi. */
- || (! need_hi22_p && (lower32 & 0x1fff) != 0)
- /* Need `or' if we didn't set anything else. */
- || (! need_hi22_p && ! need_hh22_p && ! need_hm10_p))
- need_lo10_p = 1;
- }
- else
- /* Output directly to dst reg if lower 32 bits are all zero. */
- upper_dstreg = dstreg;
- }
-
- if (!upper_dstreg && dstreg)
- as_warn (_("setx: illegal temporary register g0"));
-
- if (need_hh22_p)
- {
- the_insn.opcode = (SETHI_INSN | RD (upper_dstreg)
- | ((upper32 >> 10) & 0x3fffff));
- the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_SPARC_HH22 : BFD_RELOC_NONE);
- output_insn (insn, &the_insn);
- }
-
- if (need_hi22_p)
- {
- the_insn.opcode = (SETHI_INSN | RD (dstreg)
- | (((need_xor10_p ? ~lower32 : lower32)
- >> 10) & 0x3fffff));
- the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_SPARC_LM22 : BFD_RELOC_NONE);
- output_insn (insn, &the_insn);
- }
-
- if (need_hm10_p)
- {
- the_insn.opcode = (OR_INSN
- | (need_hh22_p ? RS1 (upper_dstreg) : 0)
- | RD (upper_dstreg)
- | IMMED
- | (upper32 & (need_hh22_p ? 0x3ff : 0x1fff)));
- the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_SPARC_HM10 : BFD_RELOC_NONE);
- output_insn (insn, &the_insn);
- }
-
- if (need_lo10_p)
- {
- /* FIXME: One nice optimization to do here is to OR the low part
- with the highpart if hi22 isn't needed and the low part is
- positive. */
- the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (dstreg) : 0)
- | RD (dstreg)
- | IMMED
- | (lower32 & (need_hi22_p ? 0x3ff : 0x1fff)));
- the_insn.reloc = (the_insn.exp.X_op != O_constant
- ? BFD_RELOC_LO10 : BFD_RELOC_NONE);
- output_insn (insn, &the_insn);
- }
-
- /* If we needed to build the upper part, shift it into place. */
- if (need_hh22_p || need_hm10_p)
- {
- the_insn.opcode = (SLLX_INSN | RS1 (upper_dstreg) | RD (upper_dstreg)
- | IMMED | 32);
- the_insn.reloc = BFD_RELOC_NONE;
- output_insn (insn, &the_insn);
- }
-
- /* To get -1 in upper32, we do sethi %hi(~x), r; xor r, -0x400 | x, r. */
- if (need_xor10_p)
- {
- the_insn.opcode = (XOR_INSN | RS1 (dstreg) | RD (dstreg) | IMMED
- | 0x1c00 | (lower32 & 0x3ff));
- the_insn.reloc = BFD_RELOC_NONE;
- output_insn (insn, &the_insn);
- }
-
- /* If we needed to build both upper and lower parts, OR them together. */
- else if ((need_hh22_p || need_hm10_p) && (need_hi22_p || need_lo10_p))
- {
- the_insn.opcode = (OR_INSN | RS1 (dstreg) | RS2 (upper_dstreg)
- | RD (dstreg));
- the_insn.reloc = BFD_RELOC_NONE;
- output_insn (insn, &the_insn);
- }
-}
-
-/* Main entry point to assemble one instruction. */
-
-void
-md_assemble (str)
- char *str;
-{
- const struct sparc_opcode *insn;
- int special_case;
-
- know (str);
- special_case = sparc_ip (str, &insn);
-
- /* We warn about attempts to put a floating point branch in a delay slot,
- unless the delay slot has been annulled. */
- if (insn != NULL
- && last_insn != NULL
- && (insn->flags & F_FBR) != 0
- && (last_insn->flags & F_DELAYED) != 0
- /* ??? This test isn't completely accurate. We assume anything with
- F_{UNBR,CONDBR,FBR} set is annullable. */
- && ((last_insn->flags & (F_UNBR | F_CONDBR | F_FBR)) == 0
- || (last_opcode & ANNUL) == 0))
- as_warn (_("FP branch in delay slot"));
-
- /* SPARC before v9 requires a nop instruction between a floating
- point instruction and a floating point branch. We insert one
- automatically, with a warning. */
- if (max_architecture < SPARC_OPCODE_ARCH_V9
- && insn != NULL
- && last_insn != NULL
- && (insn->flags & F_FBR) != 0
- && (last_insn->flags & F_FLOAT) != 0)
- {
- struct sparc_it nop_insn;
-
- nop_insn.opcode = NOP_INSN;
- nop_insn.reloc = BFD_RELOC_NONE;
- output_insn (insn, &nop_insn);
- as_warn (_("FP branch preceded by FP instruction; NOP inserted"));
- }
-
- switch (special_case)
- {
- case SPECIAL_CASE_NONE:
- /* normal insn */
- output_insn (insn, &the_insn);
- break;
-
- case SPECIAL_CASE_SETSW:
- synthetize_setsw (insn);
- break;
-
- case SPECIAL_CASE_SET:
- synthetize_setuw (insn);
- break;
-
- case SPECIAL_CASE_SETX:
- synthetize_setx (insn);
- break;
-
- case SPECIAL_CASE_FDIV:
- {
- int rd = (the_insn.opcode >> 25) & 0x1f;
-
- output_insn (insn, &the_insn);
-
- /* According to information leaked from Sun, the "fdiv" instructions
- on early SPARC machines would produce incorrect results sometimes.
- The workaround is to add an fmovs of the destination register to
- itself just after the instruction. This was true on machines
- with Weitek 1165 float chips, such as the Sun-4/260 and /280. */
- assert (the_insn.reloc == BFD_RELOC_NONE);
- the_insn.opcode = FMOVS_INSN | rd | RD (rd);
- output_insn (insn, &the_insn);
- return;
- }
-
- default:
- as_fatal (_("failed special case insn sanity check"));
- }
-}
-
-/* Subroutine of md_assemble to do the actual parsing. */
-
-static int
-sparc_ip (str, pinsn)
- char *str;
- const struct sparc_opcode **pinsn;
-{
- char *error_message = "";
- char *s;
- const char *args;
- char c;
- const struct sparc_opcode *insn;
- char *argsStart;
- unsigned long opcode;
- unsigned int mask = 0;
- int match = 0;
- int comma = 0;
- int v9_arg_p;
- int special_case = SPECIAL_CASE_NONE;
-
- s = str;
- if (islower ((unsigned char) *s))
- {
- do
- ++s;
- while (islower ((unsigned char) *s) || isdigit ((unsigned char) *s));
- }
-
- switch (*s)
- {
- case '\0':
- break;
-
- case ',':
- comma = 1;
-
- /*FALLTHROUGH */
-
- case ' ':
- *s++ = '\0';
- break;
-
- default:
- as_fatal (_("Unknown opcode: `%s'"), str);
- }
- insn = (struct sparc_opcode *) hash_find (op_hash, str);
- *pinsn = insn;
- if (insn == NULL)
- {
- as_bad (_("Unknown opcode: `%s'"), str);
- return special_case;
- }
- if (comma)
- {
- *--s = ',';
- }
-
- argsStart = s;
- for (;;)
- {
- opcode = insn->match;
- memset (&the_insn, '\0', sizeof (the_insn));
- the_insn.reloc = BFD_RELOC_NONE;
- v9_arg_p = 0;
-
- /*
- * Build the opcode, checking as we go to make
- * sure that the operands match
- */
- for (args = insn->args;; ++args)
- {
- switch (*args)
- {
- case 'K':
- {
- int kmask = 0;
-
- /* Parse a series of masks. */
- if (*s == '#')
- {
- while (*s == '#')
- {
- int mask;
-
- if (! parse_keyword_arg (sparc_encode_membar, &s,
- &mask))
- {
- error_message = _(": invalid membar mask name");
- goto error;
- }
- kmask |= mask;
- while (*s == ' ') { ++s; continue; }
- if (*s == '|' || *s == '+')
- ++s;
- while (*s == ' ') { ++s; continue; }
- }
- }
- else
- {
- if (! parse_const_expr_arg (&s, &kmask))
- {
- error_message = _(": invalid membar mask expression");
- goto error;
- }
- if (kmask < 0 || kmask > 127)
- {
- error_message = _(": invalid membar mask number");
- goto error;
- }
- }
-
- opcode |= MEMBAR (kmask);
- continue;
- }
-
- case '*':
- {
- int fcn = 0;
-
- /* Parse a prefetch function. */
- if (*s == '#')
- {
- if (! parse_keyword_arg (sparc_encode_prefetch, &s, &fcn))
- {
- error_message = _(": invalid prefetch function name");
- goto error;
- }
- }
- else
- {
- if (! parse_const_expr_arg (&s, &fcn))
- {
- error_message = _(": invalid prefetch function expression");
- goto error;
- }
- if (fcn < 0 || fcn > 31)
- {
- error_message = _(": invalid prefetch function number");
- goto error;
- }
- }
- opcode |= RD (fcn);
- continue;
- }
-
- case '!':
- case '?':
- /* Parse a sparc64 privileged register. */
- if (*s == '%')
- {
- struct priv_reg_entry *p = priv_reg_table;
- unsigned int len = 9999999; /* init to make gcc happy */
-
- s += 1;
- while (p->name[0] > s[0])
- p++;
- while (p->name[0] == s[0])
- {
- len = strlen (p->name);
- if (strncmp (p->name, s, len) == 0)
- break;
- p++;
- }
- if (p->name[0] != s[0])
- {
- error_message = _(": unrecognizable privileged register");
- goto error;
- }
- if (*args == '?')
- opcode |= (p->regnum << 14);
- else
- opcode |= (p->regnum << 25);
- s += len;
- continue;
- }
- else
- {
- error_message = _(": unrecognizable privileged register");
- goto error;
- }
-
- case '_':
- case '/':
- /* Parse a v9a ancillary state register. */
- if (*s == '%')
- {
- struct priv_reg_entry *p = v9a_asr_table;
- unsigned int len = 9999999; /* init to make gcc happy */
-
- s += 1;
- while (p->name[0] > s[0])
- p++;
- while (p->name[0] == s[0])
- {
- len = strlen (p->name);
- if (strncmp (p->name, s, len) == 0)
- break;
- p++;
- }
- if (p->name[0] != s[0])
- {
- error_message = _(": unrecognizable v9a ancillary state register");
- goto error;
- }
- if (*args == '/' && (p->regnum == 20 || p->regnum == 21))
- {
- error_message = _(": rd on write only ancillary state register");
- goto error;
- }
- if (*args == '/')
- opcode |= (p->regnum << 14);
- else
- opcode |= (p->regnum << 25);
- s += len;
- continue;
- }
- else
- {
- error_message = _(": unrecognizable v9a ancillary state register");
- goto error;
- }
-
- case 'M':
- case 'm':
- if (strncmp (s, "%asr", 4) == 0)
- {
- s += 4;
-
- if (isdigit ((unsigned char) *s))
- {
- long num = 0;
-
- while (isdigit ((unsigned char) *s))
- {
- num = num * 10 + *s - '0';
- ++s;
- }
-
- if (current_architecture >= SPARC_OPCODE_ARCH_V9)
- {
- if (num < 16 || 31 < num)
- {
- error_message = _(": asr number must be between 16 and 31");
- goto error;
- }
- }
- else
- {
- if (num < 0 || 31 < num)
- {
- error_message = _(": asr number must be between 0 and 31");
- goto error;
- }
- }
-
- opcode |= (*args == 'M' ? RS1 (num) : RD (num));
- continue;
- }
- else
- {
- error_message = _(": expecting %asrN");
- goto error;
- }
- } /* if %asr */
- break;
-
- case 'I':
- the_insn.reloc = BFD_RELOC_SPARC_11;
- goto immediate;
-
- case 'j':
- the_insn.reloc = BFD_RELOC_SPARC_10;
- goto immediate;
-
- case 'X':
- /* V8 systems don't understand BFD_RELOC_SPARC_5. */
- if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
- the_insn.reloc = BFD_RELOC_SPARC_5;
- else
- the_insn.reloc = BFD_RELOC_SPARC13;
- /* These fields are unsigned, but for upward compatibility,
- allow negative values as well. */
- goto immediate;
-
- case 'Y':
- /* V8 systems don't understand BFD_RELOC_SPARC_6. */
- if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
- the_insn.reloc = BFD_RELOC_SPARC_6;
- else
- the_insn.reloc = BFD_RELOC_SPARC13;
- /* These fields are unsigned, but for upward compatibility,
- allow negative values as well. */
- goto immediate;
-
- case 'k':
- the_insn.reloc = /* RELOC_WDISP2_14 */ BFD_RELOC_SPARC_WDISP16;
- the_insn.pcrel = 1;
- goto immediate;
-
- case 'G':
- the_insn.reloc = BFD_RELOC_SPARC_WDISP19;
- the_insn.pcrel = 1;
- goto immediate;
-
- case 'N':
- if (*s == 'p' && s[1] == 'n')
- {
- s += 2;
- continue;
- }
- break;
-
- case 'T':
- if (*s == 'p' && s[1] == 't')
- {
- s += 2;
- continue;
- }
- break;
-
- case 'z':
- if (*s == ' ')
- {
- ++s;
- }
- if (strncmp (s, "%icc", 4) == 0)
- {
- s += 4;
- continue;
- }
- break;
-
- case 'Z':
- if (*s == ' ')
- {
- ++s;
- }
- if (strncmp (s, "%xcc", 4) == 0)
- {
- s += 4;
- continue;
- }
- break;
-
- case '6':
- if (*s == ' ')
- {
- ++s;
- }
- if (strncmp (s, "%fcc0", 5) == 0)
- {
- s += 5;
- continue;
- }
- break;
-
- case '7':
- if (*s == ' ')
- {
- ++s;
- }
- if (strncmp (s, "%fcc1", 5) == 0)
- {
- s += 5;
- continue;
- }
- break;
-
- case '8':
- if (*s == ' ')
- {
- ++s;
- }
- if (strncmp (s, "%fcc2", 5) == 0)
- {
- s += 5;
- continue;
- }
- break;
-
- case '9':
- if (*s == ' ')
- {
- ++s;
- }
- if (strncmp (s, "%fcc3", 5) == 0)
- {
- s += 5;
- continue;
- }
- break;
-
- case 'P':
- if (strncmp (s, "%pc", 3) == 0)
- {
- s += 3;
- continue;
- }
- break;
-
- case 'W':
- if (strncmp (s, "%tick", 5) == 0)
- {
- s += 5;
- continue;
- }
- break;
-
- case '\0': /* end of args */
- if (*s == '\0')
- {
- match = 1;
- }
- break;
-
- case '+':
- if (*s == '+')
- {
- ++s;
- continue;
- }
- if (*s == '-')
- {
- continue;
- }
- break;
-
- case '[': /* these must match exactly */
- case ']':
- case ',':
- case ' ':
- if (*s++ == *args)
- continue;
- break;
-
- case '#': /* must be at least one digit */
- if (isdigit ((unsigned char) *s++))
- {
- while (isdigit ((unsigned char) *s))
- {
- ++s;
- }
- continue;
- }
- break;
-
- case 'C': /* coprocessor state register */
- if (strncmp (s, "%csr", 4) == 0)
- {
- s += 4;
- continue;
- }
- break;
-
- case 'b': /* next operand is a coprocessor register */
- case 'c':
- case 'D':
- if (*s++ == '%' && *s++ == 'c' && isdigit ((unsigned char) *s))
- {
- mask = *s++;
- if (isdigit ((unsigned char) *s))
- {
- mask = 10 * (mask - '0') + (*s++ - '0');
- if (mask >= 32)
- {
- break;
- }
- }
- else
- {
- mask -= '0';
- }
- switch (*args)
- {
-
- case 'b':
- opcode |= mask << 14;
- continue;
-
- case 'c':
- opcode |= mask;
- continue;
-
- case 'D':
- opcode |= mask << 25;
- continue;
- }
- }
- break;
-
- case 'r': /* next operand must be a register */
- case 'O':
- case '1':
- case '2':
- case 'd':
- if (*s++ == '%')
- {
- switch (c = *s++)
- {
-
- case 'f': /* frame pointer */
- if (*s++ == 'p')
- {
- mask = 0x1e;
- break;
- }
- goto error;
-
- case 'g': /* global register */
- c = *s++;
- if (isoctal (c))
- {
- mask = c - '0';
- break;
- }
- goto error;
-
- case 'i': /* in register */
- c = *s++;
- if (isoctal (c))
- {
- mask = c - '0' + 24;
- break;
- }
- goto error;
-
- case 'l': /* local register */
- c = *s++;
- if (isoctal (c))
- {
- mask = (c - '0' + 16);
- break;
- }
- goto error;
-
- case 'o': /* out register */
- c = *s++;
- if (isoctal (c))
- {
- mask = (c - '0' + 8);
- break;
- }
- goto error;
-
- case 's': /* stack pointer */
- if (*s++ == 'p')
- {
- mask = 0xe;
- break;
- }
- goto error;
-
- case 'r': /* any register */
- if (!isdigit ((unsigned char) (c = *s++)))
- {
- goto error;
- }
- /* FALLTHROUGH */
- case '0':
- case '1':
- case '2':
- case '3':
- case '4':
- case '5':
- case '6':
- case '7':
- case '8':
- case '9':
- if (isdigit ((unsigned char) *s))
- {
- if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32)
- {
- goto error;
- }
- }
- else
- {
- c -= '0';
- }
- mask = c;
- break;
-
- default:
- goto error;
- }
-
- if ((mask & ~1) == 2 && sparc_arch_size == 64
- && no_undeclared_regs && ! globals [mask])
- as_bad (_("detected global register use not "
- "covered by .register pseudo-op"));
-
- /* Got the register, now figure out where
- it goes in the opcode. */
- switch (*args)
- {
- case '1':
- opcode |= mask << 14;
- continue;
-
- case '2':
- opcode |= mask;
- continue;
-
- case 'd':
- opcode |= mask << 25;
- continue;
-
- case 'r':
- opcode |= (mask << 25) | (mask << 14);
- continue;
-
- case 'O':
- opcode |= (mask << 25) | (mask << 0);
- continue;
- }
- }
- break;
-
- case 'e': /* next operand is a floating point register */
- case 'v':
- case 'V':
-
- case 'f':
- case 'B':
- case 'R':
-
- case 'g':
- case 'H':
- case 'J':
- {
- char format;
-
- if (*s++ == '%'
- && ((format = *s) == 'f')
- && isdigit ((unsigned char) *++s))
- {
- for (mask = 0; isdigit ((unsigned char) *s); ++s)
- {
- mask = 10 * mask + (*s - '0');
- } /* read the number */
-
- if ((*args == 'v'
- || *args == 'B'
- || *args == 'H')
- && (mask & 1))
- {
- break;
- } /* register must be even numbered */
-
- if ((*args == 'V'
- || *args == 'R'
- || *args == 'J')
- && (mask & 3))
- {
- break;
- } /* register must be multiple of 4 */
-
- if (mask >= 64)
- {
- if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
- error_message = _(": There are only 64 f registers; [0-63]");
- else
- error_message = _(": There are only 32 f registers; [0-31]");
- goto error;
- } /* on error */
- else if (mask >= 32)
- {
- if (SPARC_OPCODE_ARCH_V9_P (max_architecture))
- {
- v9_arg_p = 1;
- mask -= 31; /* wrap high bit */
- }
- else
- {
- error_message = _(": There are only 32 f registers; [0-31]");
- goto error;
- }
- }
- }
- else
- {
- break;
- } /* if not an 'f' register. */
-
- switch (*args)
- {
- case 'v':
- case 'V':
- case 'e':
- opcode |= RS1 (mask);
- continue;
-
-
- case 'f':
- case 'B':
- case 'R':
- opcode |= RS2 (mask);
- continue;
-
- case 'g':
- case 'H':
- case 'J':
- opcode |= RD (mask);
- continue;
- } /* pack it in. */
-
- know (0);
- break;
- } /* float arg */
-
- case 'F':
- if (strncmp (s, "%fsr", 4) == 0)
- {
- s += 4;
- continue;
- }
- break;
-
- case '0': /* 64 bit immediate (set, setsw, setx insn) */
- the_insn.reloc = BFD_RELOC_NONE; /* reloc handled elsewhere */
- goto immediate;
-
- case 'l': /* 22 bit PC relative immediate */
- the_insn.reloc = BFD_RELOC_SPARC_WDISP22;
- the_insn.pcrel = 1;
- goto immediate;
-
- case 'L': /* 30 bit immediate */
- the_insn.reloc = BFD_RELOC_32_PCREL_S2;
- the_insn.pcrel = 1;
- goto immediate;
-
- case 'h':
- case 'n': /* 22 bit immediate */
- the_insn.reloc = BFD_RELOC_SPARC22;
- goto immediate;
-
- case 'i': /* 13 bit immediate */
- the_insn.reloc = BFD_RELOC_SPARC13;
-
- /* fallthrough */
-
- immediate:
- if (*s == ' ')
- s++;
-
- {
- char *s1;
- char *op_arg = NULL;
- expressionS op_exp;
- bfd_reloc_code_real_type old_reloc = the_insn.reloc;
-
- /* Check for %hi, etc. */
- if (*s == '%')
- {
- static const struct ops {
- /* The name as it appears in assembler. */
- char *name;
- /* strlen (name), precomputed for speed */
- int len;
- /* The reloc this pseudo-op translates to. */
- int reloc;
- /* Non-zero if for v9 only. */
- int v9_p;
- /* Non-zero if can be used in pc-relative contexts. */
- int pcrel_p;/*FIXME:wip*/
- } ops[] = {
- /* hix/lox must appear before hi/lo so %hix won't be
- mistaken for %hi. */
- { "hix", 3, BFD_RELOC_SPARC_HIX22, 1, 0 },
- { "lox", 3, BFD_RELOC_SPARC_LOX10, 1, 0 },
- { "hi", 2, BFD_RELOC_HI22, 0, 1 },
- { "lo", 2, BFD_RELOC_LO10, 0, 1 },
- { "hh", 2, BFD_RELOC_SPARC_HH22, 1, 1 },
- { "hm", 2, BFD_RELOC_SPARC_HM10, 1, 1 },
- { "lm", 2, BFD_RELOC_SPARC_LM22, 1, 1 },
- { "h44", 3, BFD_RELOC_SPARC_H44, 1, 0 },
- { "m44", 3, BFD_RELOC_SPARC_M44, 1, 0 },
- { "l44", 3, BFD_RELOC_SPARC_L44, 1, 0 },
- { "uhi", 3, BFD_RELOC_SPARC_HH22, 1, 0 },
- { "ulo", 3, BFD_RELOC_SPARC_HM10, 1, 0 },
- { NULL }
- };
- const struct ops *o;
-
- for (o = ops; o->name; o++)
- if (strncmp (s + 1, o->name, o->len) == 0)
- break;
- if (o->name == NULL)
- break;
-
- if (s[o->len + 1] != '(')
- {
- as_bad (_("Illegal operands: %%%s requires arguments in ()"), o->name);
- return special_case;
- }
-
- op_arg = o->name;
- the_insn.reloc = o->reloc;
- s += o->len + 2;
- v9_arg_p = o->v9_p;
- }
-
- /* Note that if the get_expression() fails, we will still
- have created U entries in the symbol table for the
- 'symbols' in the input string. Try not to create U
- symbols for registers, etc. */
-
- /* This stuff checks to see if the expression ends in
- +%reg. If it does, it removes the register from
- the expression, and re-sets 's' to point to the
- right place. */
-
- if (op_arg)
- {
- int npar = 0;
-
- for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++)
- if (*s1 == '(')
- npar++;
- else if (*s1 == ')')
- {
- if (!npar)
- break;
- npar--;
- }
-
- if (*s1 != ')')
- {
- as_bad (_("Illegal operands: %%%s requires arguments in ()"), op_arg);
- return special_case;
- }
-
- *s1 = '\0';
- (void) get_expression (s);
- *s1 = ')';
- s = s1 + 1;
- if (*s == ',' || *s == ']' || !*s)
- continue;
- if (*s != '+' && *s != '-')
- {
- as_bad (_("Illegal operands: Can't do arithmetics other than + and - involving %%%s()"), op_arg);
- return special_case;
- }
- *s1 = '0';
- s = s1;
- op_exp = the_insn.exp;
- memset (&the_insn.exp, 0, sizeof(the_insn.exp));
- }
-
- for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++) ;
-
- if (s1 != s && isdigit ((unsigned char) s1[-1]))
- {
- if (s1[-2] == '%' && s1[-3] == '+')
- s1 -= 3;
- else if (strchr ("goli0123456789", s1[-2]) && s1[-3] == '%' && s1[-4] == '+')
- s1 -= 4;
- else
- s1 = NULL;
- if (s1)
- {
- *s1 = '\0';
- if (op_arg && s1 == s + 1)
- the_insn.exp.X_op = O_absent;
- else
- (void) get_expression (s);
- *s1 = '+';
- if (op_arg)
- *s = ')';
- s = s1;
- }
- }
- else
- s1 = NULL;
-
- if (!s1)
- {
- (void) get_expression (s);
- if (op_arg)
- *s = ')';
- s = expr_end;
- }
-
- if (op_arg)
- {
- the_insn.exp2 = the_insn.exp;
- the_insn.exp = op_exp;
- if (the_insn.exp2.X_op == O_absent)
- the_insn.exp2.X_op = O_illegal;
- else if (the_insn.exp.X_op == O_absent)
- {
- the_insn.exp = the_insn.exp2;
- the_insn.exp2.X_op = O_illegal;
- }
- else if (the_insn.exp.X_op == O_constant)
- {
- valueT val = the_insn.exp.X_add_number;
- switch (the_insn.reloc)
- {
- default:
- break;
-
- case BFD_RELOC_SPARC_HH22:
- val = BSR (val, 32);
- /* intentional fallthrough */
-
- case BFD_RELOC_SPARC_LM22:
- case BFD_RELOC_HI22:
- val = (val >> 10) & 0x3fffff;
- break;
-
- case BFD_RELOC_SPARC_HM10:
- val = BSR (val, 32);
- /* intentional fallthrough */
-
- case BFD_RELOC_LO10:
- val &= 0x3ff;
- break;
-
- case BFD_RELOC_SPARC_H44:
- val >>= 22;
- val &= 0x3fffff;
- break;
-
- case BFD_RELOC_SPARC_M44:
- val >>= 12;
- val &= 0x3ff;
- break;
-
- case BFD_RELOC_SPARC_L44:
- val &= 0xfff;
- break;
-
- case BFD_RELOC_SPARC_HIX22:
- val = ~ val;
- val = (val >> 10) & 0x3fffff;
- break;
-
- case BFD_RELOC_SPARC_LOX10:
- val = (val & 0x3ff) | 0x1c00;
- break;
- }
- the_insn.exp = the_insn.exp2;
- the_insn.exp.X_add_number += val;
- the_insn.exp2.X_op = O_illegal;
- the_insn.reloc = old_reloc;
- }
- else if (the_insn.exp2.X_op != O_constant)
- {
- as_bad (_("Illegal operands: Can't add non-constant expression to %%%s()"), op_arg);
- return special_case;
- }
- else
- {
- if (old_reloc != BFD_RELOC_SPARC13
- || the_insn.reloc != BFD_RELOC_LO10
- || sparc_arch_size != 64
- || sparc_pic_code)
- {
- as_bad (_("Illegal operands: Can't do arithmetics involving %%%s() of a relocatable symbol"), op_arg);
- return special_case;
- }
- the_insn.reloc = BFD_RELOC_SPARC_OLO10;
- }
- }
- }
- /* Check for constants that don't require emitting a reloc. */
- if (the_insn.exp.X_op == O_constant
- && the_insn.exp.X_add_symbol == 0
- && the_insn.exp.X_op_symbol == 0)
- {
- /* For pc-relative call instructions, we reject
- constants to get better code. */
- if (the_insn.pcrel
- && the_insn.reloc == BFD_RELOC_32_PCREL_S2
- && in_signed_range (the_insn.exp.X_add_number, 0x3fff))
- {
- error_message = _(": PC-relative operand can't be a constant");
- goto error;
- }
-
- /* Constants that won't fit are checked in md_apply_fix3
- and bfd_install_relocation.
- ??? It would be preferable to install the constants
- into the insn here and save having to create a fixS
- for each one. There already exists code to handle
- all the various cases (e.g. in md_apply_fix3 and
- bfd_install_relocation) so duplicating all that code
- here isn't right. */
- }
-
- continue;
-
- case 'a':
- if (*s++ == 'a')
- {
- opcode |= ANNUL;
- continue;
- }
- break;
-
- case 'A':
- {
- int asi = 0;
-
- /* Parse an asi. */
- if (*s == '#')
- {
- if (! parse_keyword_arg (sparc_encode_asi, &s, &asi))
- {
- error_message = _(": invalid ASI name");
- goto error;
- }
- }
- else
- {
- if (! parse_const_expr_arg (&s, &asi))
- {
- error_message = _(": invalid ASI expression");
- goto error;
- }
- if (asi < 0 || asi > 255)
- {
- error_message = _(": invalid ASI number");
- goto error;
- }
- }
- opcode |= ASI (asi);
- continue;
- } /* alternate space */
-
- case 'p':
- if (strncmp (s, "%psr", 4) == 0)
- {
- s += 4;
- continue;
- }
- break;
-
- case 'q': /* floating point queue */
- if (strncmp (s, "%fq", 3) == 0)
- {
- s += 3;
- continue;
- }
- break;
-
- case 'Q': /* coprocessor queue */
- if (strncmp (s, "%cq", 3) == 0)
- {
- s += 3;
- continue;
- }
- break;
-
- case 'S':
- if (strcmp (str, "set") == 0
- || strcmp (str, "setuw") == 0)
- {
- special_case = SPECIAL_CASE_SET;
- continue;
- }
- else if (strcmp (str, "setsw") == 0)
- {
- special_case = SPECIAL_CASE_SETSW;
- continue;
- }
- else if (strcmp (str, "setx") == 0)
- {
- special_case = SPECIAL_CASE_SETX;
- continue;
- }
- else if (strncmp (str, "fdiv", 4) == 0)
- {
- special_case = SPECIAL_CASE_FDIV;
- continue;
- }
- break;
-
- case 'o':
- if (strncmp (s, "%asi", 4) != 0)
- break;
- s += 4;
- continue;
-
- case 's':
- if (strncmp (s, "%fprs", 5) != 0)
- break;
- s += 5;
- continue;
-
- case 'E':
- if (strncmp (s, "%ccr", 4) != 0)
- break;
- s += 4;
- continue;
-
- case 't':
- if (strncmp (s, "%tbr", 4) != 0)
- break;
- s += 4;
- continue;
-
- case 'w':
- if (strncmp (s, "%wim", 4) != 0)
- break;
- s += 4;
- continue;
-
- case 'x':
- {
- char *push = input_line_pointer;
- expressionS e;
-
- input_line_pointer = s;
- expression (&e);
- if (e.X_op == O_constant)
- {
- int n = e.X_add_number;
- if (n != e.X_add_number || (n & ~0x1ff) != 0)
- as_bad (_("OPF immediate operand out of range (0-0x1ff)"));
- else
- opcode |= e.X_add_number << 5;
- }
- else
- as_bad (_("non-immediate OPF operand, ignored"));
- s = input_line_pointer;
- input_line_pointer = push;
- continue;
- }
-
- case 'y':
- if (strncmp (s, "%y", 2) != 0)
- break;
- s += 2;
- continue;
-
- case 'u':
- case 'U':
- {
- /* Parse a sparclet cpreg. */
- int cpreg;
- if (! parse_keyword_arg (sparc_encode_sparclet_cpreg, &s, &cpreg))
- {
- error_message = _(": invalid cpreg name");
- goto error;
- }
- opcode |= (*args == 'U' ? RS1 (cpreg) : RD (cpreg));
- continue;
- }
-
- default:
- as_fatal (_("failed sanity check."));
- } /* switch on arg code */
-
- /* Break out of for() loop. */
- break;
- } /* for each arg that we expect */
-
- error:
- if (match == 0)
- {
- /* Args don't match. */
- if (&insn[1] - sparc_opcodes < sparc_num_opcodes
- && (insn->name == insn[1].name
- || !strcmp (insn->name, insn[1].name)))
- {
- ++insn;
- s = argsStart;
- continue;
- }
- else
- {
- as_bad (_("Illegal operands%s"), error_message);
- return special_case;
- }
- }
- else
- {
- /* We have a match. Now see if the architecture is ok. */
- int needed_arch_mask = insn->architecture;
-
- if (v9_arg_p)
- {
- needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9)
- | (1 << SPARC_OPCODE_ARCH_V9A));
- needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9);
- }
-
- if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (current_architecture))
- ; /* ok */
- /* Can we bump up the architecture? */
- else if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (max_architecture))
- {
- enum sparc_opcode_arch_val needed_architecture =
- sparc_ffs (SPARC_OPCODE_SUPPORTED (max_architecture)
- & needed_arch_mask);
-
- assert (needed_architecture <= SPARC_OPCODE_ARCH_MAX);
- if (warn_on_bump
- && needed_architecture > warn_after_architecture)
- {
- as_warn (_("architecture bumped from \"%s\" to \"%s\" on \"%s\""),
- sparc_opcode_archs[current_architecture].name,
- sparc_opcode_archs[needed_architecture].name,
- str);
- warn_after_architecture = needed_architecture;
- }
- current_architecture = needed_architecture;
- }
- /* Conflict. */
- /* ??? This seems to be a bit fragile. What if the next entry in
- the opcode table is the one we want and it is supported?
- It is possible to arrange the table today so that this can't
- happen but what about tomorrow? */
- else
- {
- int arch,printed_one_p = 0;
- char *p;
- char required_archs[SPARC_OPCODE_ARCH_MAX * 16];
-
- /* Create a list of the architectures that support the insn. */
- needed_arch_mask &= ~ SPARC_OPCODE_SUPPORTED (max_architecture);
- p = required_archs;
- arch = sparc_ffs (needed_arch_mask);
- while ((1 << arch) <= needed_arch_mask)
- {
- if ((1 << arch) & needed_arch_mask)
- {
- if (printed_one_p)
- *p++ = '|';
- strcpy (p, sparc_opcode_archs[arch].name);
- p += strlen (p);
- printed_one_p = 1;
- }
- ++arch;
- }
-
- as_bad (_("Architecture mismatch on \"%s\"."), str);
- as_tsktsk (_(" (Requires %s; requested architecture is %s.)"),
- required_archs,
- sparc_opcode_archs[max_architecture].name);
- return special_case;
- }
- } /* if no match */
-
- break;
- } /* forever looking for a match */
-
- the_insn.opcode = opcode;
- return special_case;
-}
-
-/* Parse an argument that can be expressed as a keyword.
- (eg: #StoreStore or %ccfr).
- The result is a boolean indicating success.
- If successful, INPUT_POINTER is updated. */
-
-static int
-parse_keyword_arg (lookup_fn, input_pointerP, valueP)
- int (*lookup_fn) PARAMS ((const char *));
- char **input_pointerP;
- int *valueP;
-{
- int value;
- char c, *p, *q;
-
- p = *input_pointerP;
- for (q = p + (*p == '#' || *p == '%');
- isalnum ((unsigned char) *q) || *q == '_';
- ++q)
- continue;
- c = *q;
- *q = 0;
- value = (*lookup_fn) (p);
- *q = c;
- if (value == -1)
- return 0;
- *valueP = value;
- *input_pointerP = q;
- return 1;
-}
-
-/* Parse an argument that is a constant expression.
- The result is a boolean indicating success. */
-
-static int
-parse_const_expr_arg (input_pointerP, valueP)
- char **input_pointerP;
- int *valueP;
-{
- char *save = input_line_pointer;
- expressionS exp;
-
- input_line_pointer = *input_pointerP;
- /* The next expression may be something other than a constant
- (say if we're not processing the right variant of the insn).
- Don't call expression unless we're sure it will succeed as it will
- signal an error (which we want to defer until later). */
- /* FIXME: It might be better to define md_operand and have it recognize
- things like %asi, etc. but continuing that route through to the end
- is a lot of work. */
- if (*input_line_pointer == '%')
- {
- input_line_pointer = save;
- return 0;
- }
- expression (&exp);
- *input_pointerP = input_line_pointer;
- input_line_pointer = save;
- if (exp.X_op != O_constant)
- return 0;
- *valueP = exp.X_add_number;
- return 1;
-}
-
-/* Subroutine of sparc_ip to parse an expression. */
-
-static int
-get_expression (str)
- char *str;
-{
- char *save_in;
- segT seg;
-
- save_in = input_line_pointer;
- input_line_pointer = str;
- seg = expression (&the_insn.exp);
- if (seg != absolute_section
- && seg != text_section
- && seg != data_section
- && seg != bss_section
- && seg != undefined_section)
- {
- the_insn.error = _("bad segment");
- expr_end = input_line_pointer;
- input_line_pointer = save_in;
- return 1;
- }
- expr_end = input_line_pointer;
- input_line_pointer = save_in;
- return 0;
-}
-
-/* Subroutine of md_assemble to output one insn. */
-
-static void
-output_insn (insn, the_insn)
- const struct sparc_opcode *insn;
- struct sparc_it *the_insn;
-{
- char *toP = frag_more (4);
-
- /* put out the opcode */
- if (INSN_BIG_ENDIAN)
- number_to_chars_bigendian (toP, (valueT) the_insn->opcode, 4);
- else
- number_to_chars_littleendian (toP, (valueT) the_insn->opcode, 4);
-
- /* put out the symbol-dependent stuff */
- if (the_insn->reloc != BFD_RELOC_NONE)
- {
- fixS *fixP = fix_new_exp (frag_now, /* which frag */
- (toP - frag_now->fr_literal), /* where */
- 4, /* size */
- &the_insn->exp,
- the_insn->pcrel,
- the_insn->reloc);
- /* Turn off overflow checking in fixup_segment. We'll do our
- own overflow checking in md_apply_fix3. This is necessary because
- the insn size is 4 and fixup_segment will signal an overflow for
- large 8 byte quantities. */
- fixP->fx_no_overflow = 1;
- if (the_insn->reloc == BFD_RELOC_SPARC_OLO10)
- fixP->tc_fix_data = the_insn->exp2.X_add_number;
- }
-
- last_insn = insn;
- last_opcode = the_insn->opcode;
-}
-
-/*
- This is identical to the md_atof in m68k.c. I think this is right,
- but I'm not sure.
-
- Turn a string in input_line_pointer into a floating point constant of type
- type, and store the appropriate bytes in *litP. The number of LITTLENUMS
- emitted is stored in *sizeP . An error message is returned, or NULL on OK.
- */
-
-/* Equal to MAX_PRECISION in atof-ieee.c */
-#define MAX_LITTLENUMS 6
-
-char *
-md_atof (type, litP, sizeP)
- char type;
- char *litP;
- int *sizeP;
-{
- int i,prec;
- LITTLENUM_TYPE words[MAX_LITTLENUMS];
- char *t;
-
- switch (type)
- {
- case 'f':
- case 'F':
- case 's':
- case 'S':
- prec = 2;
- break;
-
- case 'd':
- case 'D':
- case 'r':
- case 'R':
- prec = 4;
- break;
-
- case 'x':
- case 'X':
- prec = 6;
- break;
-
- case 'p':
- case 'P':
- prec = 6;
- break;
-
- default:
- *sizeP = 0;
- return _("Bad call to MD_ATOF()");
- }
-
- t = atof_ieee (input_line_pointer, type, words);
- if (t)
- input_line_pointer = t;
- *sizeP = prec * sizeof (LITTLENUM_TYPE);
-
- if (target_big_endian)
- {
- for (i = 0; i < prec; i++)
- {
- md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
- litP += sizeof (LITTLENUM_TYPE);
- }
- }
- else
- {
- for (i = prec - 1; i >= 0; i--)
- {
- md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
- litP += sizeof (LITTLENUM_TYPE);
- }
- }
-
- return 0;
-}
-
-/* Write a value out to the object file, using the appropriate
- endianness. */
-
-void
-md_number_to_chars (buf, val, n)
- char *buf;
- valueT val;
- int n;
-{
- if (target_big_endian)
- number_to_chars_bigendian (buf, val, n);
- else if (target_little_endian_data
- && ((n == 4 || n == 2) && ~now_seg->flags & SEC_ALLOC))
- /* Output debug words, which are not in allocated sections, as big endian */
- number_to_chars_bigendian (buf, val, n);
- else if (target_little_endian_data || ! target_big_endian)
- number_to_chars_littleendian (buf, val, n);
-}
-
-/* Apply a fixS to the frags, now that we know the value it ought to
- hold. */
-
-int
-md_apply_fix3 (fixP, value, segment)
- fixS *fixP;
- valueT *value;
- segT segment;
-{
- char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
- offsetT val;
- long insn;
-
- val = *value;
-
- assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
-
- fixP->fx_addnumber = val; /* Remember value for emit_reloc */
-
-#ifdef OBJ_ELF
- /* FIXME: SPARC ELF relocations don't use an addend in the data
- field itself. This whole approach should be somehow combined
- with the calls to bfd_install_relocation. Also, the value passed
- in by fixup_segment includes the value of a defined symbol. We
- don't want to include the value of an externally visible symbol. */
- if (fixP->fx_addsy != NULL)
- {
- if (symbol_used_in_reloc_p (fixP->fx_addsy)
- && (S_IS_EXTERNAL (fixP->fx_addsy)
- || S_IS_WEAK (fixP->fx_addsy)
- || (sparc_pic_code && ! fixP->fx_pcrel)
- || (S_GET_SEGMENT (fixP->fx_addsy) != segment
- && ((bfd_get_section_flags (stdoutput,
- S_GET_SEGMENT (fixP->fx_addsy))
- & SEC_LINK_ONCE) != 0
- || strncmp (segment_name (S_GET_SEGMENT (fixP->fx_addsy)),
- ".gnu.linkonce",
- sizeof ".gnu.linkonce" - 1) == 0)))
- && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section
- && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section
- && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy)))
- fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy);
- return 1;
- }
-#endif
-
- /* This is a hack. There should be a better way to
- handle this. Probably in terms of howto fields, once
- we can look at these fixups in terms of howtos. */
- if (fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 && fixP->fx_addsy)
- val += fixP->fx_where + fixP->fx_frag->fr_address;
-
-#ifdef OBJ_AOUT
- /* FIXME: More ridiculous gas reloc hacking. If we are going to
- generate a reloc, then we just want to let the reloc addend set
- the value. We do not want to also stuff the addend into the
- object file. Including the addend in the object file works when
- doing a static link, because the linker will ignore the object
- file contents. However, the dynamic linker does not ignore the
- object file contents. */
- if (fixP->fx_addsy != NULL
- && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2)
- val = 0;
-
- /* When generating PIC code, we do not want an addend for a reloc
- against a local symbol. We adjust fx_addnumber to cancel out the
- value already included in val, and to also cancel out the
- adjustment which bfd_install_relocation will create. */
- if (sparc_pic_code
- && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2
- && fixP->fx_addsy != NULL
- && ! S_IS_COMMON (fixP->fx_addsy)
- && symbol_section_p (fixP->fx_addsy))
- fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy);
-
- /* When generating PIC code, we need to fiddle to get
- bfd_install_relocation to do the right thing for a PC relative
- reloc against a local symbol which we are going to keep. */
- if (sparc_pic_code
- && fixP->fx_r_type == BFD_RELOC_32_PCREL_S2
- && fixP->fx_addsy != NULL
- && (S_IS_EXTERNAL (fixP->fx_addsy)
- || S_IS_WEAK (fixP->fx_addsy))
- && S_IS_DEFINED (fixP->fx_addsy)
- && ! S_IS_COMMON (fixP->fx_addsy))
- {
- val = 0;
- fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy);
- }
-#endif
-
- /* If this is a data relocation, just output VAL. */
-
- if (fixP->fx_r_type == BFD_RELOC_16)
- {
- md_number_to_chars (buf, val, 2);
- }
- else if (fixP->fx_r_type == BFD_RELOC_32
- || fixP->fx_r_type == BFD_RELOC_SPARC_REV32)
- {
- md_number_to_chars (buf, val, 4);
- }
- else if (fixP->fx_r_type == BFD_RELOC_64)
- {
- md_number_to_chars (buf, val, 8);
- }
- else if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
- || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
- {
- fixP->fx_done = 0;
- return 1;
- }
- else
- {
- /* It's a relocation against an instruction. */
-
- if (INSN_BIG_ENDIAN)
- insn = bfd_getb32 ((unsigned char *) buf);
- else
- insn = bfd_getl32 ((unsigned char *) buf);
-
- switch (fixP->fx_r_type)
- {
- case BFD_RELOC_32_PCREL_S2:
- val = val >> 2;
- /* FIXME: This increment-by-one deserves a comment of why it's
- being done! */
- if (! sparc_pic_code
- || fixP->fx_addsy == NULL
- || symbol_section_p (fixP->fx_addsy))
- ++val;
- insn |= val & 0x3fffffff;
- break;
-
- case BFD_RELOC_SPARC_11:
- if (! in_signed_range (val, 0x7ff))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- insn |= val & 0x7ff;
- break;
-
- case BFD_RELOC_SPARC_10:
- if (! in_signed_range (val, 0x3ff))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- insn |= val & 0x3ff;
- break;
-
- case BFD_RELOC_SPARC_7:
- if (! in_bitfield_range (val, 0x7f))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- insn |= val & 0x7f;
- break;
-
- case BFD_RELOC_SPARC_6:
- if (! in_bitfield_range (val, 0x3f))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- insn |= val & 0x3f;
- break;
-
- case BFD_RELOC_SPARC_5:
- if (! in_bitfield_range (val, 0x1f))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- insn |= val & 0x1f;
- break;
-
- case BFD_RELOC_SPARC_WDISP16:
- /* FIXME: simplify */
- if (((val > 0) && (val & ~0x3fffc))
- || ((val < 0) && (~(val - 1) & ~0x3fffc)))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- /* FIXME: The +1 deserves a comment. */
- val = (val >> 2) + 1;
- insn |= ((val & 0xc000) << 6) | (val & 0x3fff);
- break;
-
- case BFD_RELOC_SPARC_WDISP19:
- /* FIXME: simplify */
- if (((val > 0) && (val & ~0x1ffffc))
- || ((val < 0) && (~(val - 1) & ~0x1ffffc)))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- /* FIXME: The +1 deserves a comment. */
- val = (val >> 2) + 1;
- insn |= val & 0x7ffff;
- break;
-
- case BFD_RELOC_SPARC_HH22:
- val = BSR (val, 32);
- /* intentional fallthrough */
-
- case BFD_RELOC_SPARC_LM22:
- case BFD_RELOC_HI22:
- if (!fixP->fx_addsy)
- {
- insn |= (val >> 10) & 0x3fffff;
- }
- else
- {
- /* FIXME: Need comment explaining why we do this. */
- insn &= ~0xffff;
- }
- break;
-
- case BFD_RELOC_SPARC22:
- if (val & ~0x003fffff)
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- insn |= (val & 0x3fffff);
- break;
-
- case BFD_RELOC_SPARC_HM10:
- val = BSR (val, 32);
- /* intentional fallthrough */
-
- case BFD_RELOC_LO10:
- if (!fixP->fx_addsy)
- {
- insn |= val & 0x3ff;
- }
- else
- {
- /* FIXME: Need comment explaining why we do this. */
- insn &= ~0xff;
- }
- break;
-
- case BFD_RELOC_SPARC_OLO10:
- val &= 0x3ff;
- val += fixP->tc_fix_data;
- /* intentional fallthrough */
-
- case BFD_RELOC_SPARC13:
- if (! in_signed_range (val, 0x1fff))
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("relocation overflow"));
- insn |= val & 0x1fff;
- break;
-
- case BFD_RELOC_SPARC_WDISP22:
- val = (val >> 2) + 1;
- /* FALLTHROUGH */
- case BFD_RELOC_SPARC_BASE22:
- insn |= val & 0x3fffff;
- break;
-
- case BFD_RELOC_SPARC_H44:
- if (!fixP->fx_addsy)
- {
- bfd_vma tval = val;
- tval >>= 22;
- insn |= tval & 0x3fffff;
- }
- break;
-
- case BFD_RELOC_SPARC_M44:
- if (!fixP->fx_addsy)
- insn |= (val >> 12) & 0x3ff;
- break;
-
- case BFD_RELOC_SPARC_L44:
- if (!fixP->fx_addsy)
- insn |= val & 0xfff;
- break;
-
- case BFD_RELOC_SPARC_HIX22:
- if (!fixP->fx_addsy)
- {
- val ^= ~ (offsetT) 0;
- insn |= (val >> 10) & 0x3fffff;
- }
- break;
-
- case BFD_RELOC_SPARC_LOX10:
- if (!fixP->fx_addsy)
- insn |= 0x1c00 | (val & 0x3ff);
- break;
-
- case BFD_RELOC_NONE:
- default:
- as_bad_where (fixP->fx_file, fixP->fx_line,
- _("bad or unhandled relocation type: 0x%02x"),
- fixP->fx_r_type);
- break;
- }
-
- if (INSN_BIG_ENDIAN)
- bfd_putb32 (insn, (unsigned char *) buf);
- else
- bfd_putl32 (insn, (unsigned char *) buf);
- }
-
- /* Are we finished with this relocation now? */
- if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
- fixP->fx_done = 1;
-
- return 1;
-}
-
-/* Translate internal representation of relocation info to BFD target
- format. */
-arelent **
-tc_gen_reloc (section, fixp)
- asection *section;
- fixS *fixp;
-{
- static arelent *relocs[3];
- arelent *reloc;
- bfd_reloc_code_real_type code;
-
- relocs[0] = reloc = (arelent *) xmalloc (sizeof (arelent));
- relocs[1] = NULL;
-
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
- *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
- reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
-
- switch (fixp->fx_r_type)
- {
- case BFD_RELOC_16:
- case BFD_RELOC_32:
- case BFD_RELOC_HI22:
- case BFD_RELOC_LO10:
- case BFD_RELOC_32_PCREL_S2:
- case BFD_RELOC_SPARC13:
- case BFD_RELOC_SPARC22:
- case BFD_RELOC_SPARC_BASE13:
- case BFD_RELOC_SPARC_WDISP16:
- case BFD_RELOC_SPARC_WDISP19:
- case BFD_RELOC_SPARC_WDISP22:
- case BFD_RELOC_64:
- case BFD_RELOC_SPARC_5:
- case BFD_RELOC_SPARC_6:
- case BFD_RELOC_SPARC_7:
- case BFD_RELOC_SPARC_10:
- case BFD_RELOC_SPARC_11:
- case BFD_RELOC_SPARC_HH22:
- case BFD_RELOC_SPARC_HM10:
- case BFD_RELOC_SPARC_LM22:
- case BFD_RELOC_SPARC_PC_HH22:
- case BFD_RELOC_SPARC_PC_HM10:
- case BFD_RELOC_SPARC_PC_LM22:
- case BFD_RELOC_SPARC_H44:
- case BFD_RELOC_SPARC_M44:
- case BFD_RELOC_SPARC_L44:
- case BFD_RELOC_SPARC_HIX22:
- case BFD_RELOC_SPARC_LOX10:
- case BFD_RELOC_SPARC_REV32:
- case BFD_RELOC_SPARC_OLO10:
- case BFD_RELOC_VTABLE_ENTRY:
- case BFD_RELOC_VTABLE_INHERIT:
- code = fixp->fx_r_type;
- break;
- default:
- abort ();
- return NULL;
- }
-
-#if defined (OBJ_ELF) || defined (OBJ_AOUT)
- /* If we are generating PIC code, we need to generate a different
- set of relocs. */
-
-#ifdef OBJ_ELF
-#define GOT_NAME "_GLOBAL_OFFSET_TABLE_"
-#else
-#define GOT_NAME "__GLOBAL_OFFSET_TABLE_"
-#endif
-
- /* This code must be parallel to the OBJ_ELF tc_fix_adjustable. */
-
- if (sparc_pic_code)
- {
- switch (code)
- {
- case BFD_RELOC_32_PCREL_S2:
- if (! S_IS_DEFINED (fixp->fx_addsy)
- || S_IS_COMMON (fixp->fx_addsy)
- || S_IS_EXTERNAL (fixp->fx_addsy)
- || S_IS_WEAK (fixp->fx_addsy))
- code = BFD_RELOC_SPARC_WPLT30;
- break;
- case BFD_RELOC_HI22:
- if (fixp->fx_addsy != NULL
- && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
- code = BFD_RELOC_SPARC_PC22;
- else
- code = BFD_RELOC_SPARC_GOT22;
- break;
- case BFD_RELOC_LO10:
- if (fixp->fx_addsy != NULL
- && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0)
- code = BFD_RELOC_SPARC_PC10;
- else
- code = BFD_RELOC_SPARC_GOT10;
- break;
- case BFD_RELOC_SPARC13:
- code = BFD_RELOC_SPARC_GOT13;
- break;
- default:
- break;
- }
- }
-#endif /* defined (OBJ_ELF) || defined (OBJ_AOUT) */
-
- if (code == BFD_RELOC_SPARC_OLO10)
- reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_LO10);
- else
- reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
- if (reloc->howto == 0)
- {
- as_bad_where (fixp->fx_file, fixp->fx_line,
- _("internal error: can't export reloc type %d (`%s')"),
- fixp->fx_r_type, bfd_get_reloc_code_name (code));
- xfree (reloc);
- relocs[0] = NULL;
- return relocs;
- }
-
- /* @@ Why fx_addnumber sometimes and fx_offset other times? */
-#ifdef OBJ_AOUT
-
- if (reloc->howto->pc_relative == 0
- || code == BFD_RELOC_SPARC_PC10
- || code == BFD_RELOC_SPARC_PC22)
- reloc->addend = fixp->fx_addnumber;
- else if (sparc_pic_code
- && fixp->fx_r_type == BFD_RELOC_32_PCREL_S2
- && fixp->fx_addsy != NULL
- && (S_IS_EXTERNAL (fixp->fx_addsy)
- || S_IS_WEAK (fixp->fx_addsy))
- && S_IS_DEFINED (fixp->fx_addsy)
- && ! S_IS_COMMON (fixp->fx_addsy))
- reloc->addend = fixp->fx_addnumber;
- else
- reloc->addend = fixp->fx_offset - reloc->address;
-
-#else /* elf or coff */
-
- if (reloc->howto->pc_relative == 0
- || code == BFD_RELOC_SPARC_PC10
- || code == BFD_RELOC_SPARC_PC22)
- reloc->addend = fixp->fx_addnumber;
- else if (symbol_section_p (fixp->fx_addsy))
- reloc->addend = (section->vma
- + fixp->fx_addnumber
- + md_pcrel_from (fixp));
- else
- reloc->addend = fixp->fx_offset;
-#endif
-
- /* We expand R_SPARC_OLO10 to R_SPARC_LO10 and R_SPARC_13
- on the same location. */
- if (code == BFD_RELOC_SPARC_OLO10)
- {
- relocs[1] = reloc = (arelent *) xmalloc (sizeof (arelent));
- relocs[2] = NULL;
-
- reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
- *reloc->sym_ptr_ptr = symbol_get_bfdsym (section_symbol (absolute_section));
- reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
- reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_SPARC13);
- reloc->addend = fixp->tc_fix_data;
- }
-
- return relocs;
-}
-
-/* We have no need to default values of symbols. */
-
-/* ARGSUSED */
-symbolS *
-md_undefined_symbol (name)
- char *name;
-{
- return 0;
-} /* md_undefined_symbol() */
-
-/* Round up a section size to the appropriate boundary. */
-valueT
-md_section_align (segment, size)
- segT segment;
- valueT size;
-{
-#ifndef OBJ_ELF
- /* This is not right for ELF; a.out wants it, and COFF will force
- the alignment anyways. */
- valueT align = ((valueT) 1
- << (valueT) bfd_get_section_alignment (stdoutput, segment));
- valueT newsize;
- /* turn alignment value into a mask */
- align--;
- newsize = (size + align) & ~align;
- return newsize;
-#else
- return size;
-#endif
-}
-
-/* Exactly what point is a PC-relative offset relative TO?
- On the sparc, they're relative to the address of the offset, plus
- its size. This gets us to the following instruction.
- (??? Is this right? FIXME-SOON) */
-long
-md_pcrel_from (fixP)
- fixS *fixP;
-{
- long ret;
-
- ret = fixP->fx_where + fixP->fx_frag->fr_address;
- if (! sparc_pic_code
- || fixP->fx_addsy == NULL
- || symbol_section_p (fixP->fx_addsy))
- ret += fixP->fx_size;
- return ret;
-}
-
-/* Return log2 (VALUE), or -1 if VALUE is not an exact positive power
- of two. */
-
-static int
-log2 (value)
- int value;
-{
- int shift;
-
- if (value <= 0)
- return -1;
-
- for (shift = 0; (value & 1) == 0; value >>= 1)
- ++shift;
-
- return (value == 1) ? shift : -1;
-}
-
-/*
- * sort of like s_lcomm
- */
-
-#ifndef OBJ_ELF
-static int max_alignment = 15;
-#endif
-
-static void
-s_reserve (ignore)
- int ignore;
-{
- char *name;
- char *p;
- char c;
- int align;
- int size;
- int temp;
- symbolS *symbolP;
-
- name = input_line_pointer;
- c = get_symbol_end ();
- p = input_line_pointer;
- *p = c;
- SKIP_WHITESPACE ();
-
- if (*input_line_pointer != ',')
- {
- as_bad (_("Expected comma after name"));
- ignore_rest_of_line ();
- return;
- }
-
- ++input_line_pointer;
-
- if ((size = get_absolute_expression ()) < 0)
- {
- as_bad (_("BSS length (%d.) <0! Ignored."), size);
- ignore_rest_of_line ();
- return;
- } /* bad length */
-
- *p = 0;
- symbolP = symbol_find_or_make (name);
- *p = c;
-
- if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0
- && strncmp (input_line_pointer, ",\".bss\"", 7) != 0)
- {
- as_bad (_("bad .reserve segment -- expected BSS segment"));
- return;
- }
-
- if (input_line_pointer[2] == '.')
- input_line_pointer += 7;
- else
- input_line_pointer += 6;
- SKIP_WHITESPACE ();
-
- if (*input_line_pointer == ',')
- {
- ++input_line_pointer;
-
- SKIP_WHITESPACE ();
- if (*input_line_pointer == '\n')
- {
- as_bad (_("missing alignment"));
- ignore_rest_of_line ();
- return;
- }
-
- align = (int) get_absolute_expression ();
-
-#ifndef OBJ_ELF
- if (align > max_alignment)
- {
- align = max_alignment;
- as_warn (_("alignment too large; assuming %d"), align);
- }
-#endif
-
- if (align < 0)
- {
- as_bad (_("negative alignment"));
- ignore_rest_of_line ();
- return;
- }
-
- if (align != 0)
- {
- temp = log2 (align);
- if (temp < 0)
- {
- as_bad (_("alignment not a power of 2"));
- ignore_rest_of_line ();
- return;
- }
-
- align = temp;
- }
-
- record_alignment (bss_section, align);
- }
- else
- align = 0;
-
- if (!S_IS_DEFINED (symbolP)
-#ifdef OBJ_AOUT
- && S_GET_OTHER (symbolP) == 0
- && S_GET_DESC (symbolP) == 0
-#endif
- )
- {
- if (! need_pass_2)
- {
- char *pfrag;
- segT current_seg = now_seg;
- subsegT current_subseg = now_subseg;
-
- subseg_set (bss_section, 1); /* switch to bss */
-
- if (align)
- frag_align (align, 0, 0); /* do alignment */
-
- /* detach from old frag */
- if (S_GET_SEGMENT(symbolP) == bss_section)
- symbol_get_frag (symbolP)->fr_symbol = NULL;
-
- symbol_set_frag (symbolP, frag_now);
- pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP,
- (offsetT) size, (char *)0);
- *pfrag = 0;
-
- S_SET_SEGMENT (symbolP, bss_section);
-
- subseg_set (current_seg, current_subseg);
-
-#ifdef OBJ_ELF
- S_SET_SIZE (symbolP, size);
-#endif
- }
- }
- else
- {
- as_warn("Ignoring attempt to re-define symbol %s",
- S_GET_NAME (symbolP));
- } /* if not redefining */
-
- demand_empty_rest_of_line ();
-}
-
-static void
-s_common (ignore)
- int ignore;
-{
- char *name;
- char c;
- char *p;
- int temp, size;
- symbolS *symbolP;
-
- name = input_line_pointer;
- c = get_symbol_end ();
- /* just after name is now '\0' */
- p = input_line_pointer;
- *p = c;
- SKIP_WHITESPACE ();
- if (*input_line_pointer != ',')
- {
- as_bad (_("Expected comma after symbol-name"));
- ignore_rest_of_line ();
- return;
- }
- input_line_pointer++; /* skip ',' */
- if ((temp = get_absolute_expression ()) < 0)
- {
- as_bad (_(".COMMon length (%d.) <0! Ignored."), temp);
- ignore_rest_of_line ();
- return;
- }
- size = temp;
- *p = 0;
- symbolP = symbol_find_or_make (name);
- *p = c;
- if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
- {
- as_bad (_("Ignoring attempt to re-define symbol"));
- ignore_rest_of_line ();
- return;
- }
- if (S_GET_VALUE (symbolP) != 0)
- {
- if (S_GET_VALUE (symbolP) != (valueT) size)
- {
- as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
- S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
- }
- }
- else
- {
-#ifndef OBJ_ELF
- S_SET_VALUE (symbolP, (valueT) size);
- S_SET_EXTERNAL (symbolP);
-#endif
- }
- know (symbol_get_frag (symbolP) == &zero_address_frag);
- if (*input_line_pointer != ',')
- {
- as_bad (_("Expected comma after common length"));
- ignore_rest_of_line ();
- return;
- }
- input_line_pointer++;
- SKIP_WHITESPACE ();
- if (*input_line_pointer != '"')
- {
- temp = get_absolute_expression ();
-
-#ifndef OBJ_ELF
- if (temp > max_alignment)
- {
- temp = max_alignment;
- as_warn (_("alignment too large; assuming %d"), temp);
- }
-#endif
-
- if (temp < 0)
- {
- as_bad (_("negative alignment"));
- ignore_rest_of_line ();
- return;
- }
-
-#ifdef OBJ_ELF
- if (symbol_get_obj (symbolP)->local)
- {
- segT old_sec;
- int old_subsec;
- char *p;
- int align;
-
- old_sec = now_seg;
- old_subsec = now_subseg;
-
- if (temp == 0)
- align = 0;
- else
- align = log2 (temp);
-
- if (align < 0)
- {
- as_bad (_("alignment not a power of 2"));
- ignore_rest_of_line ();
- return;
- }
-
- record_alignment (bss_section, align);
- subseg_set (bss_section, 0);
- if (align)
- frag_align (align, 0, 0);
- if (S_GET_SEGMENT (symbolP) == bss_section)
- symbol_get_frag (symbolP)->fr_symbol = 0;
- symbol_set_frag (symbolP, frag_now);
- p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
- (offsetT) size, (char *) 0);
- *p = 0;
- S_SET_SEGMENT (symbolP, bss_section);
- S_CLEAR_EXTERNAL (symbolP);
- S_SET_SIZE (symbolP, size);
- subseg_set (old_sec, old_subsec);
- }
- else
-#endif /* OBJ_ELF */
- {
- allocate_common:
- S_SET_VALUE (symbolP, (valueT) size);
-#ifdef OBJ_ELF
- S_SET_ALIGN (symbolP, temp);
- S_SET_SIZE (symbolP, size);
-#endif
- S_SET_EXTERNAL (symbolP);
- S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
- }
- }
- else
- {
- input_line_pointer++;
- /* @@ Some use the dot, some don't. Can we get some consistency?? */
- if (*input_line_pointer == '.')
- input_line_pointer++;
- /* @@ Some say data, some say bss. */
- if (strncmp (input_line_pointer, "bss\"", 4)
- && strncmp (input_line_pointer, "data\"", 5))
- {
- while (*--input_line_pointer != '"')
- ;
- input_line_pointer--;
- goto bad_common_segment;
- }
- while (*input_line_pointer++ != '"')
- ;
- goto allocate_common;
- }
-
-#ifdef BFD_ASSEMBLER
- symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
-#endif
-
- demand_empty_rest_of_line ();
- return;
-
- {
- bad_common_segment:
- p = input_line_pointer;
- while (*p && *p != '\n')
- p++;
- c = *p;
- *p = '\0';
- as_bad (_("bad .common segment %s"), input_line_pointer + 1);
- *p = c;
- input_line_pointer = p;
- ignore_rest_of_line ();
- return;
- }
-}
-
-/* Handle the .empty pseudo-op. This supresses the warnings about
- invalid delay slot usage. */
-
-static void
-s_empty (ignore)
- int ignore;
-{
- /* The easy way to implement is to just forget about the last
- instruction. */
- last_insn = NULL;
-}
-
-static void
-s_seg (ignore)
- int ignore;
-{
-
- if (strncmp (input_line_pointer, "\"text\"", 6) == 0)
- {
- input_line_pointer += 6;
- s_text (0);
- return;
- }
- if (strncmp (input_line_pointer, "\"data\"", 6) == 0)
- {
- input_line_pointer += 6;
- s_data (0);
- return;
- }
- if (strncmp (input_line_pointer, "\"data1\"", 7) == 0)
- {
- input_line_pointer += 7;
- s_data1 ();
- return;
- }
- if (strncmp (input_line_pointer, "\"bss\"", 5) == 0)
- {
- input_line_pointer += 5;
- /* We only support 2 segments -- text and data -- for now, so
- things in the "bss segment" will have to go into data for now.
- You can still allocate SEG_BSS stuff with .lcomm or .reserve. */
- subseg_set (data_section, 255); /* FIXME-SOMEDAY */
- return;
- }
- as_bad (_("Unknown segment type"));
- demand_empty_rest_of_line ();
-}
-
-static void
-s_data1 ()
-{
- subseg_set (data_section, 1);
- demand_empty_rest_of_line ();
-}
-
-static void
-s_proc (ignore)
- int ignore;
-{
- while (!is_end_of_line[(unsigned char) *input_line_pointer])
- {
- ++input_line_pointer;
- }
- ++input_line_pointer;
-}
-
-/* This static variable is set by s_uacons to tell sparc_cons_align
- that the expession does not need to be aligned. */
-
-static int sparc_no_align_cons = 0;
-
-/* This handles the unaligned space allocation pseudo-ops, such as
- .uaword. .uaword is just like .word, but the value does not need
- to be aligned. */
-
-static void
-s_uacons (bytes)
- int bytes;
-{
- /* Tell sparc_cons_align not to align this value. */
- sparc_no_align_cons = 1;
- cons (bytes);
-}
-
-/* This handles the native word allocation pseudo-op .nword.
- For sparc_arch_size 32 it is equivalent to .word, for
- sparc_arch_size 64 it is equivalent to .xword. */
-
-static void
-s_ncons (bytes)
- int bytes;
-{
- cons (sparc_arch_size == 32 ? 4 : 8);
-}
-
-#ifdef OBJ_ELF
-/* Handle the SPARC ELF .register pseudo-op. This sets the binding of a
- global register.
- The syntax is:
-
- .register %g[2367],{#scratch|symbolname|#ignore}
- */
-
-static void
-s_register (ignore)
- int ignore;
-{
- char c;
- int reg;
- int flags;
- const char *regname;
-
- if (input_line_pointer[0] != '%'
- || input_line_pointer[1] != 'g'
- || ((input_line_pointer[2] & ~1) != '2'
- && (input_line_pointer[2] & ~1) != '6')
- || input_line_pointer[3] != ',')
- as_bad (_("register syntax is .register %%g[2367],{#scratch|symbolname|#ignore}"));
- reg = input_line_pointer[2] - '0';
- input_line_pointer += 4;
-
- if (*input_line_pointer == '#')
- {
- ++input_line_pointer;
- regname = input_line_pointer;
- c = get_symbol_end ();
- if (strcmp (regname, "scratch") && strcmp (regname, "ignore"))
- as_bad (_("register syntax is .register %%g[2367],{#scratch|symbolname|#ignore}"));
- if (regname [0] == 'i')
- regname = NULL;
- else
- regname = "";
- }
- else
- {
- regname = input_line_pointer;
- c = get_symbol_end ();
- }
- if (sparc_arch_size == 64)
- {
- if (globals [reg])
- {
- if ((regname && globals [reg] != (symbolS *)1
- && strcmp (S_GET_NAME (globals [reg]), regname))
- || ((regname != NULL) ^ (globals [reg] != (symbolS *)1)))
- as_bad (_("redefinition of global register"));
- }
- else
- {
- if (regname == NULL)
- globals [reg] = (symbolS *)1;
- else
- {
- if (*regname)
- {
- if (symbol_find (regname))
- as_bad (_("Register symbol %s already defined."),
- regname);
- }
- globals [reg] = symbol_make (regname);
- flags = symbol_get_bfdsym (globals [reg])->flags;
- if (! *regname)
- flags = flags & ~(BSF_GLOBAL|BSF_LOCAL|BSF_WEAK);
- if (! (flags & (BSF_GLOBAL|BSF_LOCAL|BSF_WEAK)))
- flags |= BSF_GLOBAL;
- symbol_get_bfdsym (globals [reg])->flags = flags;
- S_SET_VALUE (globals [reg], (valueT)reg);
- S_SET_ALIGN (globals [reg], reg);
- S_SET_SIZE (globals [reg], 0);
- /* Although we actually want undefined_section here,
- we have to use absolute_section, because otherwise
- generic as code will make it a COM section.
- We fix this up in sparc_adjust_symtab. */
- S_SET_SEGMENT (globals [reg], absolute_section);
- S_SET_OTHER (globals [reg], 0);
- elf_symbol (symbol_get_bfdsym (globals [reg]))
- ->internal_elf_sym.st_info =
- ELF_ST_INFO(STB_GLOBAL, STT_REGISTER);
- elf_symbol (symbol_get_bfdsym (globals [reg]))
- ->internal_elf_sym.st_shndx = SHN_UNDEF;
- }
- }
- }
-
- *input_line_pointer = c;
-
- demand_empty_rest_of_line ();
-}
-
-/* Adjust the symbol table. We set undefined sections for STT_REGISTER
- symbols which need it. */
-
-void
-sparc_adjust_symtab ()
-{
- symbolS *sym;
-
- for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
- {
- if (ELF_ST_TYPE (elf_symbol (symbol_get_bfdsym (sym))
- ->internal_elf_sym.st_info) != STT_REGISTER)
- continue;
-
- if (ELF_ST_TYPE (elf_symbol (symbol_get_bfdsym (sym))
- ->internal_elf_sym.st_shndx != SHN_UNDEF))
- continue;
-
- S_SET_SEGMENT (sym, undefined_section);
- }
-}
-#endif
-
-/* If the --enforce-aligned-data option is used, we require .word,
- et. al., to be aligned correctly. We do it by setting up an
- rs_align_code frag, and checking in HANDLE_ALIGN to make sure that
- no unexpected alignment was introduced.
-
- The SunOS and Solaris native assemblers enforce aligned data by
- default. We don't want to do that, because gcc can deliberately
- generate misaligned data if the packed attribute is used. Instead,
- we permit misaligned data by default, and permit the user to set an
- option to check for it. */
-
-void
-sparc_cons_align (nbytes)
- int nbytes;
-{
- int nalign;
- char *p;
-
- /* Only do this if we are enforcing aligned data. */
- if (! enforce_aligned_data)
- return;
-
- if (sparc_no_align_cons)
- {
- /* This is an unaligned pseudo-op. */
- sparc_no_align_cons = 0;
- return;
- }
-
- nalign = log2 (nbytes);
- if (nalign == 0)
- return;
-
- assert (nalign > 0);
-
- if (now_seg == absolute_section)
- {
- if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
- as_bad (_("misaligned data"));
- return;
- }
-
- p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
- (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
-
- record_alignment (now_seg, nalign);
-}
-
-/* This is where we do the unexpected alignment check.
- This is called from HANDLE_ALIGN in tc-sparc.h. */
-
-void
-sparc_handle_align (fragp)
- fragS *fragp;
-{
- if (fragp->fr_type == rs_align_code && !fragp->fr_subtype
- && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0)
- as_bad_where (fragp->fr_file, fragp->fr_line, _("misaligned data"));
- if (fragp->fr_type == rs_align_code && fragp->fr_subtype == 1024)
- {
- int count = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
-
- if (count >= 4
- && !(count & 3)
- && count <= 1024
- && !((long)(fragp->fr_literal + fragp->fr_fix) & 3))
- {
- unsigned *p = (unsigned *)(fragp->fr_literal + fragp->fr_fix);
- int i;
-
- for (i = 0; i < count; i += 4, p++)
- if (INSN_BIG_ENDIAN)
- number_to_chars_bigendian ((char *)p, 0x01000000, 4); /* emit nops */
- else
- number_to_chars_littleendian ((char *)p, 0x10000000, 4);
-
- if (SPARC_OPCODE_ARCH_V9_P (max_architecture) && count > 8)
- {
- char *waddr = &fragp->fr_literal[fragp->fr_fix];
- unsigned wval = (0x30680000 | count >> 2); /* ba,a,pt %xcc, 1f */
- if (INSN_BIG_ENDIAN)
- number_to_chars_bigendian (waddr, wval, 4);
- else
- number_to_chars_littleendian (waddr, wval, 4);
- }
- fragp->fr_var = count;
- }
- }
-}
-
-#ifdef OBJ_ELF
-/* Some special processing for a Sparc ELF file. */
-
-void
-sparc_elf_final_processing ()
-{
- /* Set the Sparc ELF flag bits. FIXME: There should probably be some
- sort of BFD interface for this. */
- if (sparc_arch_size == 64)
- {
- switch (sparc_memory_model)
- {
- case MM_RMO:
- elf_elfheader (stdoutput)->e_flags |= EF_SPARCV9_RMO;
- break;
- case MM_PSO:
- elf_elfheader (stdoutput)->e_flags |= EF_SPARCV9_PSO;
- break;
- default:
- break;
- }
- }
- else if (current_architecture >= SPARC_OPCODE_ARCH_V9)
- elf_elfheader (stdoutput)->e_flags |= EF_SPARC_32PLUS;
- if (current_architecture == SPARC_OPCODE_ARCH_V9A)
- elf_elfheader (stdoutput)->e_flags |= EF_SPARC_SUN_US1;
-}
-#endif
-
-/* This is called by emit_expr via TC_CONS_FIX_NEW when creating a
- reloc for a cons. We could use the definition there, except that
- we want to handle little endian relocs specially. */
-
-void
-cons_fix_new_sparc (frag, where, nbytes, exp)
- fragS *frag;
- int where;
- unsigned int nbytes;
- expressionS *exp;
-{
- bfd_reloc_code_real_type r;
-
- r = (nbytes == 1 ? BFD_RELOC_8 :
- (nbytes == 2 ? BFD_RELOC_16 :
- (nbytes == 4 ? BFD_RELOC_32 : BFD_RELOC_64)));
-
- if (target_little_endian_data && nbytes == 4
- && now_seg->flags & SEC_ALLOC)
- r = BFD_RELOC_SPARC_REV32;
- fix_new_exp (frag, where, (int) nbytes, exp, 0, r);
-}
-
-#ifdef OBJ_ELF
-int
-elf32_sparc_force_relocation (fixp)
- struct fix *fixp;
-{
- if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
- || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
- return 1;
-
- return 0;
-}
-#endif
-