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author | Max Filippov <jcmvbkbc@gmail.com> | 2020-04-28 04:15:05 -0700 |
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committer | Max Filippov <jcmvbkbc@gmail.com> | 2020-04-29 18:31:32 -0700 |
commit | 935f1f4ba35dc018ec6adbc1ba5f0787c84f273b (patch) | |
tree | 22af1878042971f615dbaa26714db5f1fa108c9c /gas/ChangeLog | |
parent | ffc2844e9672ce4b2d9d2a4f6f676a46f64f4d09 (diff) | |
download | binutils-gdb-935f1f4ba35dc018ec6adbc1ba5f0787c84f273b.tar.gz |
xtensa: gas: support optional immediate simcall parameter
Starting with RH.0 release Xtensa ISA adds immediate parameter to
simcall opcode. For assembly source compatibility treat "simcall"
instruction without parameter as "simcall 0" when parameter is required.
2020-04-29 Max Filippov <jcmvbkbc@gmail.com>
gas/
* config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0
if it's not defined.
(microarch_earliest): New static variable.
(xg_translate_idioms): Translate "simcall" to "simcall 0" when
simcall opcode has mandatory parameter.
(xg_init_global_config): Initialize microarch_earliest.
Diffstat (limited to 'gas/ChangeLog')
-rw-r--r-- | gas/ChangeLog | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 69e117cf5eb..f47deba09b6 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2020-04-29 Max Filippov <jcmvbkbc@gmail.com> + + * config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0 + if it's not defined. + (microarch_earliest): New static variable. + (xg_translate_idioms): Translate "simcall" to "simcall 0" when + simcall opcode has mandatory parameter. + (xg_init_global_config): Initialize microarch_earliest. + 2020-04-29 Nick Clifton <nickc@redhat.com> PR 22699 |