Arc assembler: Convert nps400 from a machine type to an extension.

gas	* config/tc-arc.c (check_cpu_feature, md_parse_option):
	Add nps400 option and feature. Add check for nps400
	feature. Refactor existing checks to check subclass before
	feature enablement.
	(md_show_usage): Document flags for NPS-400 and add some other
	undocumented flags.
	(cpu_type): Remove nps400 CPU type entry
	(check_zol): Remove bfd_mach_arc_nps400 case.
	(md_show_usage): Add help on -mcpu=nps400.
	(cpu_types): Add entry for nps400 as arc700 plus nps400 extension
	set.
	* doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and
	-fpuda flags.  Document -mcpu=nps400.
	* testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change
	expected flags to match ARC700 instead of NPS400.
	* testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400.
	* testsuite/gas/arc/nps-400-2.d: Likewise.
	* testsuite/gas/arc/nps-400-3.d: Likewise.
	* testsuite/gas/arc/nps-400-4.d: Likewise.
	* testsuite/gas/arc/nps-400-5.d: Likewise.
	* testsuite/gas/arc/nps-400-6.d: Likewise.
	* testsuite/gas/arc/nps-400-7.d: Likewise.
	* testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to
	avoid clash with cbba instruction.
	* testsuite/gas/arc/textinsn2op01.d: Likewise.
	* testsuite/gas/arc/textinsn3op.d: Likewise.
	* testsuite/gas/arc/textinsn3op.s: Likewise.
	* testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using
	-mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags.

binutils* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400
	case.

ld	* testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400.
	* testsuite/ld-arc/nps-1b.d: Likewise.

include	* opcode/arc.h: Add nps400 extension and instruction
	subclass.
	Remove ARC_OPCODE_NPS400
	* elf/arc.h: Remove E_ARC_MACH_NPS400

opcodes	* arc-dis.c (arc_insn_length): Add comment on instruction length.
	Use same method for determining	instruction length on ARC700 and
	NPS-400.
	(arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400.
	* arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions
	with the NPS400 subclass.
	* arc-opc.c: Likewise.

bfd	* archures.c: Remove bfd_mach_arc_nps400.
	* bfd-in2.h: Likewise.
	* cpu-arc.c (arch_info_struct): Likewise.
	* elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing):
	Likewise.

5 files changed, 10 insertions, 11 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 85d2cea2eef..2b87660cfc2 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,11 @@
+2016-06-21  Graham Markall  <graham.markall@embecosm.com>
+
+	* archures.c: Remove bfd_mach_arc_nps400.
+	* bfd-in2.h: Likewise.
+	* cpu-arc.c (arch_info_struct): Likewise.
+	* elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing):
+	Likewise.
+
 2016-06-20  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR ld/18250
diff --git a/bfd/archures.c b/bfd/archures.c
index a00c7126532..96c91099ac2 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -375,7 +375,6 @@ DESCRIPTION
 .#define bfd_mach_arc_arc601    4
 .#define bfd_mach_arc_arc700    3
 .#define bfd_mach_arc_arcv2     5
-.#define bfd_mach_arc_nps400    6
 . bfd_arch_m32c,     {* Renesas M16C/M32C.  *}
 .#define bfd_mach_m16c        0x75
 .#define bfd_mach_m32c        0x78
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index af950a01bad..ebed9664bb2 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2186,7 +2186,6 @@ enum bfd_architecture
 #define bfd_mach_arc_arc601    4
 #define bfd_mach_arc_arc700    3
 #define bfd_mach_arc_arcv2     5
-#define bfd_mach_arc_nps400    6
  bfd_arch_m32c,     /* Renesas M16C/M32C.  */
 #define bfd_mach_m16c        0x75
 #define bfd_mach_m32c        0x78
diff --git a/bfd/cpu-arc.c b/bfd/cpu-arc.c
index 472af8d96cc..07a052b8a50 100644
--- a/bfd/cpu-arc.c
+++ b/bfd/cpu-arc.c
@@ -47,9 +47,8 @@ static const bfd_arch_info_type arch_info_struct[] =
   ARC (bfd_mach_arc_arc601, "ARC601", FALSE, &arch_info_struct[3]),
   ARC (bfd_mach_arc_arc700, "ARC700", FALSE, &arch_info_struct[4]),
   ARC (bfd_mach_arc_arc700, "A7",     FALSE, &arch_info_struct[5]),
-  ARC (bfd_mach_arc_nps400, "NPS400", FALSE, &arch_info_struct[6]),
-  ARC (bfd_mach_arc_arcv2,  "ARCv2",  FALSE, &arch_info_struct[7]),
-  ARC (bfd_mach_arc_arcv2,  "EM",     FALSE, &arch_info_struct[8]),
+  ARC (bfd_mach_arc_arcv2,  "ARCv2",  FALSE, &arch_info_struct[6]),
+  ARC (bfd_mach_arc_arcv2,  "EM",     FALSE, &arch_info_struct[7]),
   ARC (bfd_mach_arc_arcv2,  "HS",     FALSE, NULL),
 };
 
diff --git a/bfd/elf32-arc.c b/bfd/elf32-arc.c
index 82bfe026153..0161832ca73 100644
--- a/bfd/elf32-arc.c
+++ b/bfd/elf32-arc.c
@@ -621,9 +621,6 @@ arc_elf_object_p (bfd * abfd)
 	  case E_ARC_MACH_ARC700:
 	    mach = bfd_mach_arc_arc700;
 	    break;
-	  case E_ARC_MACH_NPS400:
-	    mach = bfd_mach_arc_nps400;
-	    break;
 	  case EF_ARC_CPU_ARCV2HS:
 	  case EF_ARC_CPU_ARCV2EM:
 	    mach = bfd_mach_arc_arcv2;
@@ -673,9 +670,6 @@ arc_elf_final_write_processing (bfd * abfd,
     case bfd_mach_arc_arc700:
       emf = EM_ARC_COMPACT;
       break;
-    case bfd_mach_arc_nps400:
-      emf = EM_ARC_COMPACT;
-      break;
     case bfd_mach_arc_arcv2:
       emf = EM_ARC_COMPACT2;
       break;