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authorJan Beulich <jbeulich@suse.com>2020-06-09 08:57:22 +0200
committerJan Beulich <jbeulich@suse.com>2020-06-09 08:57:22 +0200
commit97e6786a6e354de573a1ec8c5021addf0066417a (patch)
treec0e7c7c5a2bfa29d2a702c233c3f7ead876ee6b3
parentbf926894b63fef2559685909ea2e9f794648a256 (diff)
downloadbinutils-gdb-97e6786a6e354de573a1ec8c5021addf0066417a.tar.gz
x86: utilize X macro in EVEX decoding
For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
-rw-r--r--opcodes/ChangeLog60
-rw-r--r--opcodes/i386-dis-evex-mod.h24
-rw-r--r--opcodes/i386-dis-evex-prefix.h124
-rw-r--r--opcodes/i386-dis-evex-w.h234
-rw-r--r--opcodes/i386-dis-evex.h24
-rw-r--r--opcodes/i386-dis.c72
6 files changed, 127 insertions, 411 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index feda626dfb2..dcfa7616c3c 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,65 @@
2020-06-09 Jan Beulich <jbeulich@suse.com>
+ * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
+ MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
+ (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
+ PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
+ PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
+ PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
+ EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
+ EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
+ EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
+ EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
+ EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
+ EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
+ EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
+ EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
+ EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
+ EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
+ EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
+ EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
+ EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
+ EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
+ EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
+ EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
+ EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
+ EVEX_W_0FC6_P_2): Delete.
+ (print_insn): Add EVEX.W vs embedded prefix consistency check
+ to prefix validation.
+ * i386-dis-evex.h (evex_table): Don't further descend for
+ vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
+ and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
+ and 0F2B.
+ * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
+ * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
+ vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
+ vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
+ 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
+ Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
+ PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
+ PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
+ PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
+ * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
+ EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
+ EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
+ EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
+ EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
+ EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
+ EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
+ EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
+ EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
+ EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
+ EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
+ EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
+ EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
+ EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
+ EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
+ EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
+ EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
+ EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
+
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
* i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
(vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
diff --git a/opcodes/i386-dis-evex-mod.h b/opcodes/i386-dis-evex-mod.h
index 37db98abf14..657e40a575b 100644
--- a/opcodes/i386-dis-evex-mod.h
+++ b/opcodes/i386-dis-evex-mod.h
@@ -1,14 +1,34 @@
{
/* MOD_EVEX_0F12_PREFIX_0 */
- { VEX_W_TABLE (EVEX_W_0F12_P_0_M_0) },
+ { "vmovlpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) },
},
{
+ /* MOD_EVEX_0F12_PREFIX_2 */
+ { "vmovlpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
+ },
+ {
+ /* MOD_EVEX_0F13 */
+ { "vmovlpX", { EXxmm_mq, XMM }, PREFIX_OPCODE },
+ },
+ {
/* MOD_EVEX_0F16_PREFIX_0 */
- { VEX_W_TABLE (EVEX_W_0F16_P_0_M_0) },
+ { "vmovhpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) },
},
{
+ /* MOD_EVEX_0F16_PREFIX_2 */
+ { "vmovhpX", { XMM, Vex, EXxmm_mq }, PREFIX_OPCODE },
+ },
+ {
+ /* MOD_EVEX_0F17 */
+ { "vmovhpX", { EXxmm_mq, XMM }, PREFIX_OPCODE },
+ },
+ {
+ /* MOD_EVEX_0F2B */
+ { "vmovntpX", { EXx, XM }, PREFIX_OPCODE },
+ },
+ {
/* MOD_EVEX_0F38C6_REG_1 */
{ PREFIX_TABLE (PREFIX_EVEX_0F38C6_REG_1) },
},
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 1ab70470658..e988c099fe3 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -1,65 +1,29 @@
/* PREFIX_EVEX_0F10 */
{
- { VEX_W_TABLE (EVEX_W_0F10_P_0) },
+ { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F10_P_1) },
- { VEX_W_TABLE (EVEX_W_0F10_P_2) },
+ { "vmovupX", { XM, EXEvexXNoBcst }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F10_P_3) },
},
/* PREFIX_EVEX_0F11 */
{
- { VEX_W_TABLE (EVEX_W_0F11_P_0) },
+ { "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F11_P_1) },
- { VEX_W_TABLE (EVEX_W_0F11_P_2) },
+ { "vmovupX", { EXxS, XM }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F11_P_3) },
},
/* PREFIX_EVEX_0F12 */
{
{ MOD_TABLE (MOD_EVEX_0F12_PREFIX_0) },
{ VEX_W_TABLE (EVEX_W_0F12_P_1) },
- { VEX_W_TABLE (EVEX_W_0F12_P_2) },
+ { MOD_TABLE (MOD_EVEX_0F12_PREFIX_2) },
{ VEX_W_TABLE (EVEX_W_0F12_P_3) },
},
- /* PREFIX_EVEX_0F13 */
- {
- { VEX_W_TABLE (EVEX_W_0F13_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F13_P_2) },
- },
- /* PREFIX_EVEX_0F14 */
- {
- { VEX_W_TABLE (EVEX_W_0F14_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F14_P_2) },
- },
- /* PREFIX_EVEX_0F15 */
- {
- { VEX_W_TABLE (EVEX_W_0F15_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F15_P_2) },
- },
/* PREFIX_EVEX_0F16 */
{
{ MOD_TABLE (MOD_EVEX_0F16_PREFIX_0) },
{ VEX_W_TABLE (EVEX_W_0F16_P_1) },
- { VEX_W_TABLE (EVEX_W_0F16_P_2) },
- },
- /* PREFIX_EVEX_0F17 */
- {
- { VEX_W_TABLE (EVEX_W_0F17_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F17_P_2) },
- },
- /* PREFIX_EVEX_0F28 */
- {
- { VEX_W_TABLE (EVEX_W_0F28_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F28_P_2) },
- },
- /* PREFIX_EVEX_0F29 */
- {
- { VEX_W_TABLE (EVEX_W_0F29_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F29_P_2) },
+ { MOD_TABLE (MOD_EVEX_0F16_PREFIX_2) },
},
/* PREFIX_EVEX_0F2A */
{
@@ -68,12 +32,6 @@
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F2A_P_3) },
},
- /* PREFIX_EVEX_0F2B */
- {
- { VEX_W_TABLE (EVEX_W_0F2B_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F2B_P_2) },
- },
/* PREFIX_EVEX_0F2C */
{
{ Bad_Opcode },
@@ -90,59 +48,35 @@
},
/* PREFIX_EVEX_0F2E */
{
- { VEX_W_TABLE (EVEX_W_0F2E_P_0) },
+ { "vucomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F2E_P_2) },
+ { "vucomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
},
/* PREFIX_EVEX_0F2F */
{
- { VEX_W_TABLE (EVEX_W_0F2F_P_0) },
+ { "vcomisX", { XMScalar, EXxmm_md, EXxEVexS }, PREFIX_OPCODE },
{ Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F2F_P_2) },
+ { "vcomisX", { XMScalar, EXxmm_mq, EXxEVexS }, PREFIX_OPCODE },
},
/* PREFIX_EVEX_0F51 */
{
- { VEX_W_TABLE (EVEX_W_0F51_P_0) },
+ { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F51_P_1) },
- { VEX_W_TABLE (EVEX_W_0F51_P_2) },
+ { "vsqrtpX", { XM, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F51_P_3) },
},
- /* PREFIX_EVEX_0F54 */
- {
- { VEX_W_TABLE (EVEX_W_0F54_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F54_P_2) },
- },
- /* PREFIX_EVEX_0F55 */
- {
- { VEX_W_TABLE (EVEX_W_0F55_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F55_P_2) },
- },
- /* PREFIX_EVEX_0F56 */
- {
- { VEX_W_TABLE (EVEX_W_0F56_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F56_P_2) },
- },
- /* PREFIX_EVEX_0F57 */
- {
- { VEX_W_TABLE (EVEX_W_0F57_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0F57_P_2) },
- },
/* PREFIX_EVEX_0F58 */
{
- { VEX_W_TABLE (EVEX_W_0F58_P_0) },
+ { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F58_P_1) },
- { VEX_W_TABLE (EVEX_W_0F58_P_2) },
+ { "vaddpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F58_P_3) },
},
/* PREFIX_EVEX_0F59 */
{
- { VEX_W_TABLE (EVEX_W_0F59_P_0) },
+ { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F59_P_1) },
- { VEX_W_TABLE (EVEX_W_0F59_P_2) },
+ { "vmulpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F59_P_3) },
},
/* PREFIX_EVEX_0F5A */
@@ -160,30 +94,30 @@
},
/* PREFIX_EVEX_0F5C */
{
- { VEX_W_TABLE (EVEX_W_0F5C_P_0) },
+ { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5C_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5C_P_2) },
+ { "vsubpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5C_P_3) },
},
/* PREFIX_EVEX_0F5D */
{
- { VEX_W_TABLE (EVEX_W_0F5D_P_0) },
+ { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5D_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5D_P_2) },
+ { "vminpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5D_P_3) },
},
/* PREFIX_EVEX_0F5E */
{
- { VEX_W_TABLE (EVEX_W_0F5E_P_0) },
+ { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5E_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5E_P_2) },
+ { "vdivpX", { XM, Vex, EXx, EXxEVexR }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5E_P_3) },
},
/* PREFIX_EVEX_0F5F */
{
- { VEX_W_TABLE (EVEX_W_0F5F_P_0) },
+ { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5F_P_1) },
- { VEX_W_TABLE (EVEX_W_0F5F_P_2) },
+ { "vmaxpX", { XM, Vex, EXx, EXxEVexS }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0F5F_P_3) },
},
/* PREFIX_EVEX_0F60 */
@@ -423,9 +357,9 @@
},
/* PREFIX_EVEX_0FC2 */
{
- { VEX_W_TABLE (EVEX_W_0FC2_P_0) },
+ { "vcmppX", { XMask, Vex, EXx, EXxEVexS, VCMP }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0FC2_P_1) },
- { VEX_W_TABLE (EVEX_W_0FC2_P_2) },
+ { "vcmppX", { XMask, Vex, EXx, EXxEVexS, VCMP }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0FC2_P_3) },
},
/* PREFIX_EVEX_0FC4 */
@@ -440,12 +374,6 @@
{ Bad_Opcode },
{ "vpextrw", { Gdq, XS, Ib }, 0 },
},
- /* PREFIX_EVEX_0FC6 */
- {
- { VEX_W_TABLE (EVEX_W_0FC6_P_0) },
- { Bad_Opcode },
- { VEX_W_TABLE (EVEX_W_0FC6_P_2) },
- },
/* PREFIX_EVEX_0FD1 */
{
{ Bad_Opcode },
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 5aa2a634e95..ed9ec2c378d 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -1,43 +1,21 @@
- /* EVEX_W_0F10_P_0 */
- {
- { "vmovups", { XM, EXEvexXNoBcst }, 0 },
- },
/* EVEX_W_0F10_P_1 */
{
{ "vmovss", { XMVexScalar, VexScalar, EXdScalar }, 0 },
},
- /* EVEX_W_0F10_P_2 */
- {
- { Bad_Opcode },
- { "vmovupd", { XM, EXEvexXNoBcst }, 0 },
- },
/* EVEX_W_0F10_P_3 */
{
{ Bad_Opcode },
{ "vmovsd", { XMVexScalar, VexScalar, EXqScalar }, 0 },
},
- /* EVEX_W_0F11_P_0 */
- {
- { "vmovups", { EXxS, XM }, 0 },
- },
/* EVEX_W_0F11_P_1 */
{
{ "vmovss", { EXdVexScalarS, VexScalar, XMScalar }, 0 },
},
- /* EVEX_W_0F11_P_2 */
- {
- { Bad_Opcode },
- { "vmovupd", { EXxS, XM }, 0 },
- },
/* EVEX_W_0F11_P_3 */
{
{ Bad_Opcode },
{ "vmovsd", { EXqVexScalarS, VexScalar, XMScalar }, 0 },
},
- /* EVEX_W_0F12_P_0_M_0 */
- {
- { "vmovlps", { XMM, Vex, EXxmm_mq }, 0 },
- },
/* EVEX_W_0F12_P_0_M_1 */
{
{ "vmovhlps", { XMM, Vex, EXxmm_mq }, 0 },
@@ -46,47 +24,11 @@
{
{ "vmovsldup", { XM, EXEvexXNoBcst }, 0 },
},
- /* EVEX_W_0F12_P_2 */
- {
- { Bad_Opcode },
- { "vmovlpd", { XMM, Vex, EXxmm_mq }, 0 },
- },
/* EVEX_W_0F12_P_3 */
{
{ Bad_Opcode },
{ "vmovddup", { XM, EXymmq }, 0 },
},
- /* EVEX_W_0F13_P_0 */
- {
- { "vmovlps", { EXxmm_mq, XMM }, 0 },
- },
- /* EVEX_W_0F13_P_2 */
- {
- { Bad_Opcode },
- { "vmovlpd", { EXxmm_mq, XMM }, 0 },
- },
- /* EVEX_W_0F14_P_0 */
- {
- { "vunpcklps", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F14_P_2 */
- {
- { Bad_Opcode },
- { "vunpcklpd", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F15_P_0 */
- {
- { "vunpckhps", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F15_P_2 */
- {
- { Bad_Opcode },
- { "vunpckhpd", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F16_P_0_M_0 */
- {
- { "vmovhps", { XMM, Vex, EXxmm_mq }, 0 },
- },
/* EVEX_W_0F16_P_0_M_1 */
{
{ "vmovlhps", { XMM, Vex, EXx }, 0 },
@@ -95,155 +37,33 @@
{
{ "vmovshdup", { XM, EXx }, 0 },
},
- /* EVEX_W_0F16_P_2 */
- {
- { Bad_Opcode },
- { "vmovhpd", { XMM, Vex, EXxmm_mq }, 0 },
- },
- /* EVEX_W_0F17_P_0 */
- {
- { "vmovhps", { EXxmm_mq, XMM }, 0 },
- },
- /* EVEX_W_0F17_P_2 */
- {
- { Bad_Opcode },
- { "vmovhpd", { EXxmm_mq, XMM }, 0 },
- },
- /* EVEX_W_0F28_P_0 */
- {
- { "vmovaps", { XM, EXx }, 0 },
- },
- /* EVEX_W_0F28_P_2 */
- {
- { Bad_Opcode },
- { "vmovapd", { XM, EXx }, 0 },
- },
- /* EVEX_W_0F29_P_0 */
- {
- { "vmovaps", { EXxS, XM }, 0 },
- },
- /* EVEX_W_0F29_P_2 */
- {
- { Bad_Opcode },
- { "vmovapd", { EXxS, XM }, 0 },
- },
/* EVEX_W_0F2A_P_3 */
{
{ "vcvtsi2sd%LQ", { XMScalar, VexScalar, Ed }, 0 },
{ "vcvtsi2sd%LQ", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
},
- /* EVEX_W_0F2B_P_0 */
- {
- { "vmovntps", { EXx, XM }, 0 },
- },
- /* EVEX_W_0F2B_P_2 */
- {
- { Bad_Opcode },
- { "vmovntpd", { EXx, XM }, 0 },
- },
- /* EVEX_W_0F2E_P_0 */
- {
- { "vucomiss", { XMScalar, EXxmm_md, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F2E_P_2 */
- {
- { Bad_Opcode },
- { "vucomisd", { XMScalar, EXxmm_mq, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F2F_P_0 */
- {
- { "vcomiss", { XMScalar, EXxmm_md, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F2F_P_2 */
- {
- { Bad_Opcode },
- { "vcomisd", { XMScalar, EXxmm_mq, EXxEVexS }, 0 },
- },
- /* EVEX_W_0F51_P_0 */
- {
- { "vsqrtps", { XM, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F51_P_1 */
{
{ "vsqrtss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
},
- /* EVEX_W_0F51_P_2 */
- {
- { Bad_Opcode },
- { "vsqrtpd", { XM, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F51_P_3 */
{
{ Bad_Opcode },
{ "vsqrtsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
},
- /* EVEX_W_0F54_P_0 */
- {
- { "vandps", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F54_P_2 */
- {
- { Bad_Opcode },
- { "vandpd", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F55_P_0 */
- {
- { "vandnps", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F55_P_2 */
- {
- { Bad_Opcode },
- { "vandnpd", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F56_P_0 */
- {
- { "vorps", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F56_P_2 */
- {
- { Bad_Opcode },
- { "vorpd", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F57_P_0 */
- {
- { "vxorps", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F57_P_2 */
- {
- { Bad_Opcode },
- { "vxorpd", { XM, Vex, EXx }, 0 },
- },
- /* EVEX_W_0F58_P_0 */
- {
- { "vaddps", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F58_P_1 */
{
{ "vaddss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
},
- /* EVEX_W_0F58_P_2 */
- {
- { Bad_Opcode },
- { "vaddpd", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F58_P_3 */
{
{ Bad_Opcode },
{ "vaddsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
},
- /* EVEX_W_0F59_P_0 */
- {
- { "vmulps", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F59_P_1 */
{
{ "vmulss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
},
- /* EVEX_W_0F59_P_2 */
- {
- { Bad_Opcode },
- { "vmulpd", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F59_P_3 */
{
{ Bad_Opcode },
@@ -280,73 +100,37 @@
{
{ "vcvtps2dq", { XM, EXx, EXxEVexR }, 0 },
},
- /* EVEX_W_0F5C_P_0 */
- {
- { "vsubps", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F5C_P_1 */
{
{ "vsubss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
},
- /* EVEX_W_0F5C_P_2 */
- {
- { Bad_Opcode },
- { "vsubpd", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F5C_P_3 */
{
{ Bad_Opcode },
{ "vsubsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
},
- /* EVEX_W_0F5D_P_0 */
- {
- { "vminps", { XM, Vex, EXx, EXxEVexS }, 0 },
- },
/* EVEX_W_0F5D_P_1 */
{
{ "vminss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
},
- /* EVEX_W_0F5D_P_2 */
- {
- { Bad_Opcode },
- { "vminpd", { XM, Vex, EXx, EXxEVexS }, 0 },
- },
/* EVEX_W_0F5D_P_3 */
{
{ Bad_Opcode },
{ "vminsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS }, 0 },
},
- /* EVEX_W_0F5E_P_0 */
- {
- { "vdivps", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F5E_P_1 */
{
{ "vdivss", { XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
},
- /* EVEX_W_0F5E_P_2 */
- {
- { Bad_Opcode },
- { "vdivpd", { XM, Vex, EXx, EXxEVexR }, 0 },
- },
/* EVEX_W_0F5E_P_3 */
{
{ Bad_Opcode },
{ "vdivsd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexR }, 0 },
},
- /* EVEX_W_0F5F_P_0 */
- {
- { "vmaxps", { XM, Vex, EXx, EXxEVexS }, 0 },
- },
/* EVEX_W_0F5F_P_1 */
{
{ "vmaxss", { XMScalar, VexScalar, EXxmm_md, EXxEVexS }, 0 },
},
- /* EVEX_W_0F5F_P_2 */
- {
- { Bad_Opcode },
- { "vmaxpd", { XM, Vex, EXx, EXxEVexS }, 0 },
- },
/* EVEX_W_0F5F_P_3 */
{
{ Bad_Opcode },
@@ -484,33 +268,15 @@
{ "vmovdqu8", { EXxS, XM }, 0 },
{ "vmovdqu16", { EXxS, XM }, 0 },
},
- /* EVEX_W_0FC2_P_0 */
- {
- { "vcmpps", { XMask, Vex, EXx, EXxEVexS, VCMP }, 0 },
- },
/* EVEX_W_0FC2_P_1 */
{
{ "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, VCMP }, 0 },
},
- /* EVEX_W_0FC2_P_2 */
- {
- { Bad_Opcode },
- { "vcmppd", { XMask, Vex, EXx, EXxEVexS, VCMP }, 0 },
- },
/* EVEX_W_0FC2_P_3 */
{
{ Bad_Opcode },
{ "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, VCMP }, 0 },
},
- /* EVEX_W_0FC6_P_0 */
- {
- { "vshufps", { XM, Vex, EXx, Ib }, 0 },
- },
- /* EVEX_W_0FC6_P_2 */
- {
- { Bad_Opcode },
- { "vshufpd", { XM, Vex, EXx, Ib }, 0 },
- },
/* EVEX_W_0FD2_P_2 */
{
{ "vpsrld", { XM, Vex, EXxmm }, 0 },
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 5de4cc56b19..6f1fe944d64 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -23,11 +23,11 @@ static const struct dis386 evex_table[][256] = {
{ PREFIX_TABLE (PREFIX_EVEX_0F10) },
{ PREFIX_TABLE (PREFIX_EVEX_0F11) },
{ PREFIX_TABLE (PREFIX_EVEX_0F12) },
- { PREFIX_TABLE (PREFIX_EVEX_0F13) },
- { PREFIX_TABLE (PREFIX_EVEX_0F14) },
- { PREFIX_TABLE (PREFIX_EVEX_0F15) },
+ { MOD_TABLE (MOD_EVEX_0F13) },
+ { "vunpcklpX", { XM, Vex, EXx }, PREFIX_OPCODE },
+ { "vunpckhpX", { XM, Vex, EXx }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_EVEX_0F16) },
- { PREFIX_TABLE (PREFIX_EVEX_0F17) },
+ { MOD_TABLE (MOD_EVEX_0F17) },
/* 18 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -47,10 +47,10 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
/* 28 */
- { PREFIX_TABLE (PREFIX_EVEX_0F28) },
- { PREFIX_TABLE (PREFIX_EVEX_0F29) },
+ { "vmovapX", { XM, EXx }, PREFIX_OPCODE },
+ { "vmovapX", { EXxS, XM }, PREFIX_OPCODE },
{ PREFIX_TABLE (PREFIX_EVEX_0F2A) },
- { PREFIX_TABLE (PREFIX_EVEX_0F2B) },
+ { MOD_TABLE (MOD_EVEX_0F2B) },
{ PREFIX_TABLE (PREFIX_EVEX_0F2C) },
{ PREFIX_TABLE (PREFIX_EVEX_0F2D) },
{ PREFIX_TABLE (PREFIX_EVEX_0F2E) },
@@ -96,10 +96,10 @@ static const struct dis386 evex_table[][256] = {
{ PREFIX_TABLE (PREFIX_EVEX_0F51) },
{ Bad_Opcode },
{ Bad_Opcode },
- { PREFIX_TABLE (PREFIX_EVEX_0F54) },
- { PREFIX_TABLE (PREFIX_EVEX_0F55) },
- { PREFIX_TABLE (PREFIX_EVEX_0F56) },
- { PREFIX_TABLE (PREFIX_EVEX_0F57) },
+ { "vandpX", { XM, Vex, EXx }, PREFIX_OPCODE },
+ { "vandnpX", { XM, Vex, EXx }, PREFIX_OPCODE },
+ { "vorpX", { XM, Vex, EXx }, PREFIX_OPCODE },
+ { "vxorpX", { XM, Vex, EXx }, PREFIX_OPCODE },
/* 58 */
{ PREFIX_TABLE (PREFIX_EVEX_0F58) },
{ PREFIX_TABLE (PREFIX_EVEX_0F59) },
@@ -224,7 +224,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_EVEX_0FC4) },
{ PREFIX_TABLE (PREFIX_EVEX_0FC5) },
- { PREFIX_TABLE (PREFIX_EVEX_0FC6) },
+ { "vshufpX", { XM, Vex, EXx, Ib }, PREFIX_OPCODE },
{ Bad_Opcode },
/* C8 */
{ Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 799d9d4a4d8..f6a0c51d2fb 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -930,7 +930,12 @@ enum
MOD_VEX_W_1_0F3A33_P_2_LEN_0,
MOD_EVEX_0F12_PREFIX_0,
+ MOD_EVEX_0F12_PREFIX_2,
+ MOD_EVEX_0F13,
MOD_EVEX_0F16_PREFIX_0,
+ MOD_EVEX_0F16_PREFIX_2,
+ MOD_EVEX_0F17,
+ MOD_EVEX_0F2B,
MOD_EVEX_0F38C6_REG_1,
MOD_EVEX_0F38C6_REG_2,
MOD_EVEX_0F38C6_REG_5,
@@ -1415,24 +1420,13 @@ enum
PREFIX_EVEX_0F10,
PREFIX_EVEX_0F11,
PREFIX_EVEX_0F12,
- PREFIX_EVEX_0F13,
- PREFIX_EVEX_0F14,
- PREFIX_EVEX_0F15,
PREFIX_EVEX_0F16,
- PREFIX_EVEX_0F17,
- PREFIX_EVEX_0F28,
- PREFIX_EVEX_0F29,
PREFIX_EVEX_0F2A,
- PREFIX_EVEX_0F2B,
PREFIX_EVEX_0F2C,
PREFIX_EVEX_0F2D,
PREFIX_EVEX_0F2E,
PREFIX_EVEX_0F2F,
PREFIX_EVEX_0F51,
- PREFIX_EVEX_0F54,
- PREFIX_EVEX_0F55,
- PREFIX_EVEX_0F56,
- PREFIX_EVEX_0F57,
PREFIX_EVEX_0F58,
PREFIX_EVEX_0F59,
PREFIX_EVEX_0F5A,
@@ -1482,7 +1476,6 @@ enum
PREFIX_EVEX_0FC2,
PREFIX_EVEX_0FC4,
PREFIX_EVEX_0FC5,
- PREFIX_EVEX_0FC6,
PREFIX_EVEX_0FD1,
PREFIX_EVEX_0FD2,
PREFIX_EVEX_0FD3,
@@ -2040,61 +2033,21 @@ enum
VEX_W_0F3ACE_P_2,
VEX_W_0F3ACF_P_2,
- EVEX_W_0F10_P_0,
EVEX_W_0F10_P_1,
- EVEX_W_0F10_P_2,
EVEX_W_0F10_P_3,
- EVEX_W_0F11_P_0,
EVEX_W_0F11_P_1,
- EVEX_W_0F11_P_2,
EVEX_W_0F11_P_3,
- EVEX_W_0F12_P_0_M_0,
EVEX_W_0F12_P_0_M_1,
EVEX_W_0F12_P_1,
- EVEX_W_0F12_P_2,
EVEX_W_0F12_P_3,
- EVEX_W_0F13_P_0,
- EVEX_W_0F13_P_2,
- EVEX_W_0F14_P_0,
- EVEX_W_0F14_P_2,
- EVEX_W_0F15_P_0,
- EVEX_W_0F15_P_2,
- EVEX_W_0F16_P_0_M_0,
EVEX_W_0F16_P_0_M_1,
EVEX_W_0F16_P_1,
- EVEX_W_0F16_P_2,
- EVEX_W_0F17_P_0,
- EVEX_W_0F17_P_2,
- EVEX_W_0F28_P_0,
- EVEX_W_0F28_P_2,
- EVEX_W_0F29_P_0,
- EVEX_W_0F29_P_2,
EVEX_W_0F2A_P_3,
- EVEX_W_0F2B_P_0,
- EVEX_W_0F2B_P_2,
- EVEX_W_0F2E_P_0,
- EVEX_W_0F2E_P_2,
- EVEX_W_0F2F_P_0,
- EVEX_W_0F2F_P_2,
- EVEX_W_0F51_P_0,
EVEX_W_0F51_P_1,
- EVEX_W_0F51_P_2,
EVEX_W_0F51_P_3,
- EVEX_W_0F54_P_0,
- EVEX_W_0F54_P_2,
- EVEX_W_0F55_P_0,
- EVEX_W_0F55_P_2,
- EVEX_W_0F56_P_0,
- EVEX_W_0F56_P_2,
- EVEX_W_0F57_P_0,
- EVEX_W_0F57_P_2,
- EVEX_W_0F58_P_0,
EVEX_W_0F58_P_1,
- EVEX_W_0F58_P_2,
EVEX_W_0F58_P_3,
- EVEX_W_0F59_P_0,
EVEX_W_0F59_P_1,
- EVEX_W_0F59_P_2,
EVEX_W_0F59_P_3,
EVEX_W_0F5A_P_0,
EVEX_W_0F5A_P_1,
@@ -2103,21 +2056,13 @@ enum
EVEX_W_0F5B_P_0,
EVEX_W_0F5B_P_1,
EVEX_W_0F5B_P_2,
- EVEX_W_0F5C_P_0,
EVEX_W_0F5C_P_1,
- EVEX_W_0F5C_P_2,
EVEX_W_0F5C_P_3,
- EVEX_W_0F5D_P_0,
EVEX_W_0F5D_P_1,
- EVEX_W_0F5D_P_2,
EVEX_W_0F5D_P_3,
- EVEX_W_0F5E_P_0,
EVEX_W_0F5E_P_1,
- EVEX_W_0F5E_P_2,
EVEX_W_0F5E_P_3,
- EVEX_W_0F5F_P_0,
EVEX_W_0F5F_P_1,
- EVEX_W_0F5F_P_2,
EVEX_W_0F5F_P_3,
EVEX_W_0F62_P_2,
EVEX_W_0F66_P_2,
@@ -2147,12 +2092,8 @@ enum
EVEX_W_0F7F_P_1,
EVEX_W_0F7F_P_2,
EVEX_W_0F7F_P_3,
- EVEX_W_0FC2_P_0,
EVEX_W_0FC2_P_1,
- EVEX_W_0FC2_P_2,
EVEX_W_0FC2_P_3,
- EVEX_W_0FC6_P_0,
- EVEX_W_0FC6_P_2,
EVEX_W_0FD2_P_2,
EVEX_W_0FD3_P_2,
EVEX_W_0FD4_P_2,
@@ -12278,7 +12219,8 @@ print_insn (bfd_vma pc, disassemble_info *info)
: ((prefixes
& (PREFIX_REPZ | PREFIX_REPNZ | PREFIX_DATA))
== PREFIX_DATA))
- && (used_prefixes & PREFIX_DATA) == 0))))
+ && (used_prefixes & PREFIX_DATA) == 0))
+ || (vex.evex && !vex.w != !(used_prefixes & PREFIX_DATA))))
{
(*info->fprintf_func) (info->stream, "(bad)");
return end_codep - priv.the_buffer;