Fix the generation of alignment frags in code sections for AArch64.users/linaro/binutils-2_25-branch

	PR gas/20364
	* config/tc-aarch64.c (s_ltorg): Change the mapping state after
	aligning the frag.
	(aarch64_init): Treat rs_align frags in code sections as
	containing code, not data.
	* testsuite/gas/aarch64/pr20364.s: New test.
	* testsuite/gas/aarch64/pr20364.d: New test driver.

Cherry-pick of 7ea12e5c3ad54da440c08f32da09534e63e515ca

Change-Id: I6bb37f33419cbf54e52c8d54ef0d1c18fdc85878

4 files changed, 58 insertions, 3 deletions

diff --git a/gas/ChangeLog.linaro b/gas/ChangeLog.linaro
index c1ebb2194b0..c475961cabf 100644
--- a/gas/ChangeLog.linaro
+++ b/gas/ChangeLog.linaro
@@ -2,6 +2,16 @@
 
 	Backport from master.
 
+	2016-08-05  Nick Clifton  <nickc@redhat.com>
+
+	PR gas/20364
+	* config/tc-aarch64.c (s_ltorg): Change the mapping state after
+	aligning the frag.
+	(aarch64_init): Treat rs_align frags in code sections as
+	containing code, not data.
+	* testsuite/gas/aarch64/pr20364.s: New test.
+	* testsuite/gas/aarch64/pr20364.d: New test driver.
+
 	2015-03-13  Jiong Wang  <jiong.wang@arm.com>
 
 	* config/tc-aarch64.h (SUB_SEGMENT_ALIGN): Define to be zero.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 4c785a6ede4..8a74fd190bd 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -1747,13 +1747,13 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
       if (pool == NULL || pool->symbol == NULL || pool->next_free_entry == 0)
 	continue;
 
-      mapping_state (MAP_DATA);
-
       /* Align pool as you have word accesses.
          Only make a frag if we have to.  */
       if (!need_pass_2)
 	frag_align (align, 0, 0);
 
+      mapping_state (MAP_DATA);
+
       record_alignment (now_seg, align);
 
       sprintf (sym_name, "$$lit_\002%x", pool->id);
@@ -5984,11 +5984,15 @@ aarch64_init_frag (fragS * fragP, int max_chars)
 
   switch (fragP->fr_type)
     {
-    case rs_align:
     case rs_align_test:
     case rs_fill:
       mapping_state_2 (MAP_DATA, max_chars);
       break;
+    case rs_align:
+      /* PR 20364: We can get alignment frags in code sections,
+	 so do not just assume that we should use the MAP_DATA state.  */
+      mapping_state_2 (subseg_text_p (now_seg) ? MAP_INSN : MAP_DATA, max_chars);
+      break;
     case rs_align_code:
       mapping_state_2 (MAP_INSN, max_chars);
       break;
diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
new file mode 100644
index 00000000000..babcff10304
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pr20364.d
@@ -0,0 +1,13 @@
+# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
+#name: PR20364 
+#objdump: -d
+
+.*:     file format .*
+
+Disassembly of section \.vectors:
+
+0+000 <.*>:
+   0:	d2800000 	mov	x0, #0x0                   	// #0
+   4:	94000000 	bl	0 <plat_report_exception>
+   8:	17fffffe 	b	0 <bl1_exceptions>
+
diff --git a/gas/testsuite/gas/aarch64/pr20364.s b/gas/testsuite/gas/aarch64/pr20364.s
new file mode 100644
index 00000000000..594ad7cdbcd
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/pr20364.s
@@ -0,0 +1,28 @@
+ .macro vector_base label
+ .section .vectors, "ax"
+ .align 11, 0
+ \label:
+ .endm
+
+ .macro vector_entry label
+ .section .vectors, "ax"
+ .align 7, 0
+ \label:
+ .endm
+
+ .macro check_vector_size since
+   .if (. - \since) > (32 * 4)
+     .error "Vector exceeds 32 instructions"
+   .endif
+ .endm
+
+ .globl bl1_exceptions
+
+vector_base bl1_exceptions
+
+vector_entry SynchronousExceptionSP0
+ mov x0, #0x0
+ bl plat_report_exception
+ b SynchronousExceptionSP0
+ check_vector_size SynchronousExceptionSP0
+