delta/beignet.git - gitlab.freedesktop.org: beignet/beignet.git

	Commit message (Expand)	Author	Age	Files	Lines
*	runtime: fix one bug in BDW image.	Zhigang Gong	2014-11-12	1	-2/+4
*	Revert "BDW: Change the default tiling mode to TILING_Y on BDW."	Zhigang Gong	2014-11-12	1	-8/+4
*	License: adjust all license version to LGPL v2.1+.	Zhigang Gong	2014-11-11	57	-57/+57
*	Revert "fix issue to create cl image from libva with non-zero offset"	Zhigang Gong	2014-11-11	4	-7/+9
*	use posix_memalign instead of aligned_alloc to be more compatible	Guo Yejun	2014-11-10	1	-7/+11
*	BDW: Change the default tiling mode to TILING_Y on BDW.	Yang Rong	2014-11-10	1	-4/+8
*	fix issue to create cl image from libva with non-zero offset	Guo Yejun	2014-11-10	4	-9/+7
*	fix a bug in clCompileProgram().	Luo Xionghu	2014-11-10	1	-0/+4
*	fix piglit clCreateProgramWithBinary fail.	Luo Xionghu	2014-11-10	1	-0/+8
*	enable CL_DEVICE_HOST_UNIFIED_MEMORY when userptr is supported	Guo Yejun	2014-11-07	2	-0/+21
*	support CL_MEM_USE_HOST_PTR with userptr for cl buffer	Guo Yejun	2014-11-07	9	-16/+78
*	BDW: Set the URB/REST size to 384K/384K when SLM disable.	Yang Rong	2014-11-07	1	-1/+2
*	add building dependency GIT_SHA1	Meng Mengmeng	2014-11-05	1	-0/+1
*	Remove intel_gpgpu_check_binded_buf_address()	Zhenyu Wang	2014-10-31	1	-9/+10
*	IVB/HSW/BYT: Revert the Dynamic state Base Addr and relative buffers address ...	Yang Rong	2014-10-29	1	-7/+45
*	Fix a size assert when setup bti.	Yang Rong	2014-10-28	2	-2/+14
*	Refine the intel gpgpu delete.	Yang Rong	2014-10-28	5	-82/+169
*	GBE: fix a wrong type of cl_device_info.	Zhigang Gong	2014-10-27	1	-1/+1
*	Fix AUX buffer for page alignment	Zhenyu Wang	2014-10-24	1	-3/+6
*	Use pread/pwrite for buffer enqueue read/write	Zhenyu Wang	2014-10-24	4	-26/+10
*	Clear batch buffer pointer after unmap	Zhenyu Wang	2014-10-24	1	-1/+2
*	Make use of write enable flag for mem bo map	Zhenyu Wang	2014-10-24	6	-22/+27
*	create GIT_SHA1 without any dependency	Meng Mengmeng	2014-10-24	2	-5/+4
*	add beignet GIT_HAL1 if there is .git directory	Meng Mengmeng	2014-10-23	3	-2/+35
*	Fix the bug of 1D array slice pitch	Junyan He	2014-10-23	5	-14/+50
*	Refine the the error handling in function cl_command_queue_ND_range_gen7.	Yang Rong	2014-10-17	1	-3/+5
*	BDW: Also need set Shader Channel Select for constant buffer in BDW.	Yang Rong	2014-10-16	1	-0/+6
*	BDW: Change BDW's max work group size to 512.	Yang Rong	2014-10-15	1	-3/+5
*	Fix a HSW constant buffer regression.	Yang Rong	2014-10-15	1	-1/+35
*	Fit the printf bug in loop	Junyan He	2014-10-15	1	-0/+8
*	Fix HSW thread_n <= 64 assert.	Yang Rong	2014-10-14	1	-3/+7
*	BDW: Add gen8 into intel_driver_init	Junyan He	2014-10-10	2	-2/+4
*	Modify the bind sampler logic for gen8	Junyan He	2014-10-10	1	-5/+135
*	Add sampler state and tile define for gen8.	Junyan He	2014-10-10	2	-0/+60
*	BDW: Need not restore SLM setting in BDW.	Yang Rong	2014-10-10	1	-3/+3
*	BDW: Correct BDW device name.	Yang Rong	2014-10-10	1	-15/+15
*	BDW: Correct scratch buffer of BDW.	Yang Rong	2014-10-10	1	-4/+18
*	BDW: Add device's sub slice field, for cl_get_kernel_max_wg_sz.	Yang Rong	2014-10-10	2	-2/+12
*	BDW: enable SLM in BDW.	Yang Rong	2014-10-10	2	-19/+34
*	BDW: add some BDW function.	Yang Rong	2014-10-10	2	-53/+227
*	BDW: Refine intel_gpgpu_setup_bti and add intel_gpgpu_set_base_address for BDW.	Yang Rong	2014-10-10	3	-168/+97
*	BDW: Add function intel_gpgpu_bind_buf for gen8.	Junyan He	2014-10-10	1	-9/+27
*	BDW: Correct surface base address set in setup bti.	Junyan He	2014-10-10	1	-3/+3
*	BDW: Add function intel_gpgpu_setup_bti for gen8.	Junyan He	2014-10-10	2	-0/+55
*	BDW: refine the gen8_surface_state_t.	Junyan He	2014-10-10	1	-59/+59
*	BDW: Add gen8 surface state struct.	Junyan He	2014-10-10	1	-0/+161
*	BDW: Add BDW pci ids and BDW device struct.	Yang Rong	2014-10-10	2	-4/+136
*	fix one bug at cl_get_kernel_workgroup_info.	Luo Xionghu	2014-09-17	1	-0/+1
*	fix piglit get kernel info FUNCTION ATTRIBUTE fail.	Luo	2014-09-12	5	-0/+19
*	runtime: fix build status handling.	Zhigang Gong	2014-09-12	3	-23/+35